RE: [PATCH V3 06/14] ARM: dts: stm32: Add QSPI NOR on AV96

[Patrick DELAUNAY]

Hi,

> -Original Message-
> From: Marek Vasut 
> Sent: mardi 31 mars 2020 19:51
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Manivannan Sadhasivam
> ; Patrick DELAUNAY
> ; Patrice CHOTARD 
> Subject: [PATCH V3 06/14] ARM: dts: stm32: Add QSPI NOR on AV96
> Importance: High
> 
> The DH Electronics DHCOR SOM has QSPI NOR on the SoM itself, add it into the
> DT.
> 
> Signed-off-by: Marek Vasut 
> Cc: Manivannan Sadhasivam 
> Cc: Patrick Delaunay 
> Cc: Patrice Chotard 
> ---
> V2: Drop the explicit flash type in DT node, use spi-flash
> V3: Reduce the SPI NOR window to 2 MiB
> ---

Applied to u-boot-stm/master, thanks!

Regards

Patrick

RE: [PATCH V3 06/14] ARM: dts: stm32: Add QSPI NOR on AV96

[Patrick DELAUNAY]

Hi Marek,

> From: Marek Vasut 
> Sent: mardi 31 mars 2020 19:51
> 
> The DH Electronics DHCOR SOM has QSPI NOR on the SoM itself, add it into the
> DT.
> 
> Signed-off-by: Marek Vasut 
> Cc: Manivannan Sadhasivam 
> Cc: Patrick Delaunay 
> Cc: Patrice Chotard 
> ---
> V2: Drop the explicit flash type in DT node, use spi-flash
> V3: Reduce the SPI NOR window to 2 MiB
> ---


Reviewed-by: Patrick Delaunay 

Thanks

Patrick

[PATCH V3 06/14] ARM: dts: stm32: Add QSPI NOR on AV96

[Marek Vasut]

The DH Electronics DHCOR SOM has QSPI NOR on the SoM itself, add it
into the DT.

Signed-off-by: Marek Vasut 
Cc: Manivannan Sadhasivam 
Cc: Patrick Delaunay 
Cc: Patrice Chotard 
---
V2: Drop the explicit flash type in DT node, use spi-flash
V3: Reduce the SPI NOR window to 2 MiB
---
 arch/arm/dts/stm32mp157a-avenger96.dts | 20 
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts 
b/arch/arm/dts/stm32mp157a-avenger96.dts
index 3fca1ed56d..023390a662 100644
--- a/arch/arm/dts/stm32mp157a-avenger96.dts
+++ b/arch/arm/dts/stm32mp157a-avenger96.dts
@@ -20,6 +20,7 @@
mmc0 = &sdmmc1;
serial0 = &uart4;
serial1 = &uart7;
+   spi0 = &qspi;
};
 
chosen {
@@ -300,6 +301,25 @@
vdd_3v3_usbfs-supply = <&vdd_usb>;
 };
 
+&qspi {
+   pinctrl-names = "default", "sleep";
+   pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
+   pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
+   reg = <0x58003000 0x1000>, <0x7000 0x20>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "okay";
+
+   flash0: spi-flash@0 {
+   compatible = "jedec,spi-nor";
+   reg = <0>;
+   spi-rx-bus-width = <4>;
+   spi-max-frequency = <10800>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   };
+};
+
 &rng1 {
status = "okay";
 };
-- 
2.25.1