Re: [PATCH u-boot-mvebu 00/10] Turris Omnia DDR training changes

2024-04-16 Thread Tony Dinh
Hi Marek,

On Tue, Apr 16, 2024 at 3:11 AM Marek Behún  wrote:
>
> Hi Tony,
>
> hmm no I did not change the version number.
>
> The changes are only relevant for debug messages, there is no
> functional changes in how the DDR training is done, unless I made a
> mistake.
>
> I am not sure that changing the version is a good idea unless this is
> also done for the upstream where I sent the PR. But who knows if
> Marvell will have some people assigned to merge the PR.
>
> Since U-Boot prints its own version, people can easily reproduce the
> code for a given binary from U-Boot version string.

OK, sounds good.

Tested-by: Tony Dinh  # regression test for DS116

All the best,
Tony

>
> Marek
>
> On Mon, 15 Apr 2024 15:20:49 -0700
> Tony Dinh  wrote:
>
> > Hi Marek,
> >
> > I'm running a regression test with this patch on another Armada 385
> > board (Synology DS116). And
> > it is running without problem.
> >
> > I noticed that there is no version bump. Is this still 14.0.0? It's kind of
> > hard to see which version we are using without a minor revision such as 
> > 14.0.1.
> >
> > All the best,
> > Tony
> >
> > On Mon, Apr 15, 2024 at 9:39 AM Marek Behún  wrote:
> > >
> > > Hi Stefan,
> > >
> > > this series adds some changes to DDR3 training for Armada 38x and
> > > Turris Omnia.
> > >
> > > - patches 1-4 are meant to allow for reducing another 10 KiB in the
> > >   SPL binary. They were also sent to mv-ddr-marvell, via PR on github,
> > >   https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/45/
> > >   but I am told that Armada team has left Marvell, so who knows if this
> > >   will ever be merged there
> > > - patch 5 enables this reduction for Turris Omnia
> > > - patches 6-8 import old DDR3 training code and make some changes so
> > >   that it works with U-Boot. The reason why this is being done is
> > >   explained in patch 6
> > > - patch 9 glues the old DDR3 training code to current U-Boot
> > > - patch 10 allows for dynamic selection of old DDR3 training code on
> > >   Turris Omnia, via an U-Boot environment variable
> > >
> > > Marek
> > >
> > > Marek Behún (10):
> > >   ddr: marvell: a38x: debug: return from ddr3_tip_print_log() early if
> > > we won't print anything
> > >   ddr: marvell: a38x: debug: Remove unused variables
> > >   ddr: marvell: a38x: debug: Define DDR_VIEWER_TOOL variables only if
> > > needed, and make them static
> > >   ddr: marvell: a38x: debug: Allow compiling with immutable debug
> > > settings to reduce binary size
> > >   arm: mvebu: turris_omnia: Enable immutable debug settings in DDR3
> > > training by default
> > >   ddr: marvell: a38x: Import old DDR training code from 2017 version of
> > > U-Boot
> > >   ddr: marvell: a38x: old: Fix some compiler warning of the old code
> > >   ddr: marvell: a38x: old: Backport immutable debug settings
> > >   arm: mvebu: a38x: Add optional support for using old DDR3 training
> > > code
> > >   arm: mvebu: turris_omnia: Support old DDR3 training, selectable via
> > > env var
> > >
> > >  arch/arm/mach-mvebu/Kconfig   |   15 +
> > >  arch/arm/mach-mvebu/include/mach/cpu.h|1 +
> > >  arch/arm/mach-mvebu/spl.c |   37 +-
> > >  board/CZ.NIC/turris_omnia/Makefile|1 +
> > >  board/CZ.NIC/turris_omnia/old_ddr3_training.c |   79 +
> > >  board/CZ.NIC/turris_omnia/turris_omnia.c  |2 +-
> > >  configs/turris_omnia_defconfig|1 +
> > >  drivers/ddr/marvell/a38x/Makefile |2 +
> > >  drivers/ddr/marvell/a38x/ddr3_debug.c |   30 +-
> > >  drivers/ddr/marvell/a38x/ddr3_init.c  |3 +-
> > >  drivers/ddr/marvell/a38x/ddr3_init.h  |   43 +-
> > >  drivers/ddr/marvell/a38x/old/Makefile |   29 +
> > >  drivers/ddr/marvell/a38x/old/ddr3_a38x.c  |  738 +
> > >  drivers/ddr/marvell/a38x/old/ddr3_a38x.h  |   93 +
> > >  .../marvell/a38x/old/ddr3_a38x_mc_static.h|  226 ++
> > >  .../ddr/marvell/a38x/old/ddr3_a38x_topology.h |   22 +
> > >  .../ddr/marvell/a38x/old/ddr3_a38x_training.c |   40 +
> > >  drivers/ddr/marvell/a38x/old/ddr3_debug.c | 1545 ++
> > >  .../marvell/a38x/old/ddr3_hws_hw_training.c   |  148 +
> > >  .../marvell/a38x/old/ddr3_hws_hw_training.h   |   49 +
> > >  .../a38x/old/ddr3_hws_hw_training_def.h   |  464 +++
> > >  .../marvell/a38x/old/ddr3_hws_sil_training.h  |   17 +
> > >  drivers/ddr/marvell/a38x/old/ddr3_init.c  |  770 +
> > >  drivers/ddr/marvell/a38x/old/ddr3_init.h  |  405 +++
> > >  .../ddr/marvell/a38x/old/ddr3_logging_def.h   |  101 +
> > >  .../marvell/a38x/old/ddr3_patterns_64bit.h|  924 ++
> > >  .../ddr/marvell/a38x/old/ddr3_topology_def.h  |   76 +
> > >  drivers/ddr/marvell/a38x/old/ddr3_training.c  | 2651 +
> > >  .../ddr/marvell/a38x/old/ddr3_training_bist.c |  289 ++
> > >  .../a38x/old/ddr3_training_centralization.c   |  712 +
> > >  

Re: [PATCH u-boot-mvebu 00/10] Turris Omnia DDR training changes

2024-04-16 Thread Marek Behún
Hi Tony,

hmm no I did not change the version number.

The changes are only relevant for debug messages, there is no
functional changes in how the DDR training is done, unless I made a
mistake.

I am not sure that changing the version is a good idea unless this is
also done for the upstream where I sent the PR. But who knows if
Marvell will have some people assigned to merge the PR.

Since U-Boot prints its own version, people can easily reproduce the
code for a given binary from U-Boot version string.

Marek

On Mon, 15 Apr 2024 15:20:49 -0700
Tony Dinh  wrote:

> Hi Marek,
> 
> I'm running a regression test with this patch on another Armada 385
> board (Synology DS116). And
> it is running without problem.
> 
> I noticed that there is no version bump. Is this still 14.0.0? It's kind of
> hard to see which version we are using without a minor revision such as 
> 14.0.1.
> 
> All the best,
> Tony
> 
> On Mon, Apr 15, 2024 at 9:39 AM Marek Behún  wrote:
> >
> > Hi Stefan,
> >
> > this series adds some changes to DDR3 training for Armada 38x and
> > Turris Omnia.
> >
> > - patches 1-4 are meant to allow for reducing another 10 KiB in the
> >   SPL binary. They were also sent to mv-ddr-marvell, via PR on github,
> >   https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/45/
> >   but I am told that Armada team has left Marvell, so who knows if this
> >   will ever be merged there
> > - patch 5 enables this reduction for Turris Omnia
> > - patches 6-8 import old DDR3 training code and make some changes so
> >   that it works with U-Boot. The reason why this is being done is
> >   explained in patch 6
> > - patch 9 glues the old DDR3 training code to current U-Boot
> > - patch 10 allows for dynamic selection of old DDR3 training code on
> >   Turris Omnia, via an U-Boot environment variable
> >
> > Marek
> >
> > Marek Behún (10):
> >   ddr: marvell: a38x: debug: return from ddr3_tip_print_log() early if
> > we won't print anything
> >   ddr: marvell: a38x: debug: Remove unused variables
> >   ddr: marvell: a38x: debug: Define DDR_VIEWER_TOOL variables only if
> > needed, and make them static
> >   ddr: marvell: a38x: debug: Allow compiling with immutable debug
> > settings to reduce binary size
> >   arm: mvebu: turris_omnia: Enable immutable debug settings in DDR3
> > training by default
> >   ddr: marvell: a38x: Import old DDR training code from 2017 version of
> > U-Boot
> >   ddr: marvell: a38x: old: Fix some compiler warning of the old code
> >   ddr: marvell: a38x: old: Backport immutable debug settings
> >   arm: mvebu: a38x: Add optional support for using old DDR3 training
> > code
> >   arm: mvebu: turris_omnia: Support old DDR3 training, selectable via
> > env var
> >
> >  arch/arm/mach-mvebu/Kconfig   |   15 +
> >  arch/arm/mach-mvebu/include/mach/cpu.h|1 +
> >  arch/arm/mach-mvebu/spl.c |   37 +-
> >  board/CZ.NIC/turris_omnia/Makefile|1 +
> >  board/CZ.NIC/turris_omnia/old_ddr3_training.c |   79 +
> >  board/CZ.NIC/turris_omnia/turris_omnia.c  |2 +-
> >  configs/turris_omnia_defconfig|1 +
> >  drivers/ddr/marvell/a38x/Makefile |2 +
> >  drivers/ddr/marvell/a38x/ddr3_debug.c |   30 +-
> >  drivers/ddr/marvell/a38x/ddr3_init.c  |3 +-
> >  drivers/ddr/marvell/a38x/ddr3_init.h  |   43 +-
> >  drivers/ddr/marvell/a38x/old/Makefile |   29 +
> >  drivers/ddr/marvell/a38x/old/ddr3_a38x.c  |  738 +
> >  drivers/ddr/marvell/a38x/old/ddr3_a38x.h  |   93 +
> >  .../marvell/a38x/old/ddr3_a38x_mc_static.h|  226 ++
> >  .../ddr/marvell/a38x/old/ddr3_a38x_topology.h |   22 +
> >  .../ddr/marvell/a38x/old/ddr3_a38x_training.c |   40 +
> >  drivers/ddr/marvell/a38x/old/ddr3_debug.c | 1545 ++
> >  .../marvell/a38x/old/ddr3_hws_hw_training.c   |  148 +
> >  .../marvell/a38x/old/ddr3_hws_hw_training.h   |   49 +
> >  .../a38x/old/ddr3_hws_hw_training_def.h   |  464 +++
> >  .../marvell/a38x/old/ddr3_hws_sil_training.h  |   17 +
> >  drivers/ddr/marvell/a38x/old/ddr3_init.c  |  770 +
> >  drivers/ddr/marvell/a38x/old/ddr3_init.h  |  405 +++
> >  .../ddr/marvell/a38x/old/ddr3_logging_def.h   |  101 +
> >  .../marvell/a38x/old/ddr3_patterns_64bit.h|  924 ++
> >  .../ddr/marvell/a38x/old/ddr3_topology_def.h  |   76 +
> >  drivers/ddr/marvell/a38x/old/ddr3_training.c  | 2651 +
> >  .../ddr/marvell/a38x/old/ddr3_training_bist.c |  289 ++
> >  .../a38x/old/ddr3_training_centralization.c   |  712 +
> >  .../ddr/marvell/a38x/old/ddr3_training_db.c   |  652 
> >  .../marvell/a38x/old/ddr3_training_hw_algo.c  |  686 +
> >  .../marvell/a38x/old/ddr3_training_hw_algo.h  |   14 +
> >  .../ddr/marvell/a38x/old/ddr3_training_ip.h   |  178 ++
> >  .../marvell/a38x/old/ddr3_training_ip_bist.h  |   54 +
> >  .../old/ddr3_training_ip_centralization.h |   15 +
> >  

Re: [PATCH u-boot-mvebu 00/10] Turris Omnia DDR training changes

2024-04-15 Thread Tony Dinh
Hi Marek,

I'm running a regression test with this patch on another Armada 385
board (Synology DS116). And
it is running without problem.

I noticed that there is no version bump. Is this still 14.0.0? It's kind of
hard to see which version we are using without a minor revision such as 14.0.1.

All the best,
Tony

On Mon, Apr 15, 2024 at 9:39 AM Marek Behún  wrote:
>
> Hi Stefan,
>
> this series adds some changes to DDR3 training for Armada 38x and
> Turris Omnia.
>
> - patches 1-4 are meant to allow for reducing another 10 KiB in the
>   SPL binary. They were also sent to mv-ddr-marvell, via PR on github,
>   https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/45/
>   but I am told that Armada team has left Marvell, so who knows if this
>   will ever be merged there
> - patch 5 enables this reduction for Turris Omnia
> - patches 6-8 import old DDR3 training code and make some changes so
>   that it works with U-Boot. The reason why this is being done is
>   explained in patch 6
> - patch 9 glues the old DDR3 training code to current U-Boot
> - patch 10 allows for dynamic selection of old DDR3 training code on
>   Turris Omnia, via an U-Boot environment variable
>
> Marek
>
> Marek Behún (10):
>   ddr: marvell: a38x: debug: return from ddr3_tip_print_log() early if
> we won't print anything
>   ddr: marvell: a38x: debug: Remove unused variables
>   ddr: marvell: a38x: debug: Define DDR_VIEWER_TOOL variables only if
> needed, and make them static
>   ddr: marvell: a38x: debug: Allow compiling with immutable debug
> settings to reduce binary size
>   arm: mvebu: turris_omnia: Enable immutable debug settings in DDR3
> training by default
>   ddr: marvell: a38x: Import old DDR training code from 2017 version of
> U-Boot
>   ddr: marvell: a38x: old: Fix some compiler warning of the old code
>   ddr: marvell: a38x: old: Backport immutable debug settings
>   arm: mvebu: a38x: Add optional support for using old DDR3 training
> code
>   arm: mvebu: turris_omnia: Support old DDR3 training, selectable via
> env var
>
>  arch/arm/mach-mvebu/Kconfig   |   15 +
>  arch/arm/mach-mvebu/include/mach/cpu.h|1 +
>  arch/arm/mach-mvebu/spl.c |   37 +-
>  board/CZ.NIC/turris_omnia/Makefile|1 +
>  board/CZ.NIC/turris_omnia/old_ddr3_training.c |   79 +
>  board/CZ.NIC/turris_omnia/turris_omnia.c  |2 +-
>  configs/turris_omnia_defconfig|1 +
>  drivers/ddr/marvell/a38x/Makefile |2 +
>  drivers/ddr/marvell/a38x/ddr3_debug.c |   30 +-
>  drivers/ddr/marvell/a38x/ddr3_init.c  |3 +-
>  drivers/ddr/marvell/a38x/ddr3_init.h  |   43 +-
>  drivers/ddr/marvell/a38x/old/Makefile |   29 +
>  drivers/ddr/marvell/a38x/old/ddr3_a38x.c  |  738 +
>  drivers/ddr/marvell/a38x/old/ddr3_a38x.h  |   93 +
>  .../marvell/a38x/old/ddr3_a38x_mc_static.h|  226 ++
>  .../ddr/marvell/a38x/old/ddr3_a38x_topology.h |   22 +
>  .../ddr/marvell/a38x/old/ddr3_a38x_training.c |   40 +
>  drivers/ddr/marvell/a38x/old/ddr3_debug.c | 1545 ++
>  .../marvell/a38x/old/ddr3_hws_hw_training.c   |  148 +
>  .../marvell/a38x/old/ddr3_hws_hw_training.h   |   49 +
>  .../a38x/old/ddr3_hws_hw_training_def.h   |  464 +++
>  .../marvell/a38x/old/ddr3_hws_sil_training.h  |   17 +
>  drivers/ddr/marvell/a38x/old/ddr3_init.c  |  770 +
>  drivers/ddr/marvell/a38x/old/ddr3_init.h  |  405 +++
>  .../ddr/marvell/a38x/old/ddr3_logging_def.h   |  101 +
>  .../marvell/a38x/old/ddr3_patterns_64bit.h|  924 ++
>  .../ddr/marvell/a38x/old/ddr3_topology_def.h  |   76 +
>  drivers/ddr/marvell/a38x/old/ddr3_training.c  | 2651 +
>  .../ddr/marvell/a38x/old/ddr3_training_bist.c |  289 ++
>  .../a38x/old/ddr3_training_centralization.c   |  712 +
>  .../ddr/marvell/a38x/old/ddr3_training_db.c   |  652 
>  .../marvell/a38x/old/ddr3_training_hw_algo.c  |  686 +
>  .../marvell/a38x/old/ddr3_training_hw_algo.h  |   14 +
>  .../ddr/marvell/a38x/old/ddr3_training_ip.h   |  178 ++
>  .../marvell/a38x/old/ddr3_training_ip_bist.h  |   54 +
>  .../old/ddr3_training_ip_centralization.h |   15 +
>  .../marvell/a38x/old/ddr3_training_ip_db.h|   34 +
>  .../marvell/a38x/old/ddr3_training_ip_def.h   |  173 ++
>  .../a38x/old/ddr3_training_ip_engine.c| 1355 +
>  .../a38x/old/ddr3_training_ip_engine.h|   85 +
>  .../marvell/a38x/old/ddr3_training_ip_flow.h  |  349 +++
>  .../marvell/a38x/old/ddr3_training_ip_pbs.h   |   41 +
>  .../a38x/old/ddr3_training_ip_prv_if.h|  107 +
>  .../a38x/old/ddr3_training_ip_static.h|   31 +
>  .../marvell/a38x/old/ddr3_training_leveling.c | 1837 
>  .../marvell/a38x/old/ddr3_training_leveling.h |   17 +
>  .../ddr/marvell/a38x/old/ddr3_training_pbs.c  |  995 +++
>  .../marvell/a38x/old/ddr3_training_static.c   |  538 
>  

[PATCH u-boot-mvebu 00/10] Turris Omnia DDR training changes

2024-04-15 Thread Marek Behún
Hi Stefan,

this series adds some changes to DDR3 training for Armada 38x and
Turris Omnia.

- patches 1-4 are meant to allow for reducing another 10 KiB in the
  SPL binary. They were also sent to mv-ddr-marvell, via PR on github,
  https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/45/
  but I am told that Armada team has left Marvell, so who knows if this
  will ever be merged there
- patch 5 enables this reduction for Turris Omnia
- patches 6-8 import old DDR3 training code and make some changes so
  that it works with U-Boot. The reason why this is being done is
  explained in patch 6
- patch 9 glues the old DDR3 training code to current U-Boot
- patch 10 allows for dynamic selection of old DDR3 training code on
  Turris Omnia, via an U-Boot environment variable

Marek

Marek Behún (10):
  ddr: marvell: a38x: debug: return from ddr3_tip_print_log() early if
we won't print anything
  ddr: marvell: a38x: debug: Remove unused variables
  ddr: marvell: a38x: debug: Define DDR_VIEWER_TOOL variables only if
needed, and make them static
  ddr: marvell: a38x: debug: Allow compiling with immutable debug
settings to reduce binary size
  arm: mvebu: turris_omnia: Enable immutable debug settings in DDR3
training by default
  ddr: marvell: a38x: Import old DDR training code from 2017 version of
U-Boot
  ddr: marvell: a38x: old: Fix some compiler warning of the old code
  ddr: marvell: a38x: old: Backport immutable debug settings
  arm: mvebu: a38x: Add optional support for using old DDR3 training
code
  arm: mvebu: turris_omnia: Support old DDR3 training, selectable via
env var

 arch/arm/mach-mvebu/Kconfig   |   15 +
 arch/arm/mach-mvebu/include/mach/cpu.h|1 +
 arch/arm/mach-mvebu/spl.c |   37 +-
 board/CZ.NIC/turris_omnia/Makefile|1 +
 board/CZ.NIC/turris_omnia/old_ddr3_training.c |   79 +
 board/CZ.NIC/turris_omnia/turris_omnia.c  |2 +-
 configs/turris_omnia_defconfig|1 +
 drivers/ddr/marvell/a38x/Makefile |2 +
 drivers/ddr/marvell/a38x/ddr3_debug.c |   30 +-
 drivers/ddr/marvell/a38x/ddr3_init.c  |3 +-
 drivers/ddr/marvell/a38x/ddr3_init.h  |   43 +-
 drivers/ddr/marvell/a38x/old/Makefile |   29 +
 drivers/ddr/marvell/a38x/old/ddr3_a38x.c  |  738 +
 drivers/ddr/marvell/a38x/old/ddr3_a38x.h  |   93 +
 .../marvell/a38x/old/ddr3_a38x_mc_static.h|  226 ++
 .../ddr/marvell/a38x/old/ddr3_a38x_topology.h |   22 +
 .../ddr/marvell/a38x/old/ddr3_a38x_training.c |   40 +
 drivers/ddr/marvell/a38x/old/ddr3_debug.c | 1545 ++
 .../marvell/a38x/old/ddr3_hws_hw_training.c   |  148 +
 .../marvell/a38x/old/ddr3_hws_hw_training.h   |   49 +
 .../a38x/old/ddr3_hws_hw_training_def.h   |  464 +++
 .../marvell/a38x/old/ddr3_hws_sil_training.h  |   17 +
 drivers/ddr/marvell/a38x/old/ddr3_init.c  |  770 +
 drivers/ddr/marvell/a38x/old/ddr3_init.h  |  405 +++
 .../ddr/marvell/a38x/old/ddr3_logging_def.h   |  101 +
 .../marvell/a38x/old/ddr3_patterns_64bit.h|  924 ++
 .../ddr/marvell/a38x/old/ddr3_topology_def.h  |   76 +
 drivers/ddr/marvell/a38x/old/ddr3_training.c  | 2651 +
 .../ddr/marvell/a38x/old/ddr3_training_bist.c |  289 ++
 .../a38x/old/ddr3_training_centralization.c   |  712 +
 .../ddr/marvell/a38x/old/ddr3_training_db.c   |  652 
 .../marvell/a38x/old/ddr3_training_hw_algo.c  |  686 +
 .../marvell/a38x/old/ddr3_training_hw_algo.h  |   14 +
 .../ddr/marvell/a38x/old/ddr3_training_ip.h   |  178 ++
 .../marvell/a38x/old/ddr3_training_ip_bist.h  |   54 +
 .../old/ddr3_training_ip_centralization.h |   15 +
 .../marvell/a38x/old/ddr3_training_ip_db.h|   34 +
 .../marvell/a38x/old/ddr3_training_ip_def.h   |  173 ++
 .../a38x/old/ddr3_training_ip_engine.c| 1355 +
 .../a38x/old/ddr3_training_ip_engine.h|   85 +
 .../marvell/a38x/old/ddr3_training_ip_flow.h  |  349 +++
 .../marvell/a38x/old/ddr3_training_ip_pbs.h   |   41 +
 .../a38x/old/ddr3_training_ip_prv_if.h|  107 +
 .../a38x/old/ddr3_training_ip_static.h|   31 +
 .../marvell/a38x/old/ddr3_training_leveling.c | 1837 
 .../marvell/a38x/old/ddr3_training_leveling.h |   17 +
 .../ddr/marvell/a38x/old/ddr3_training_pbs.c  |  995 +++
 .../marvell/a38x/old/ddr3_training_static.c   |  538 
 .../ddr/marvell/a38x/old/ddr_topology_def.h   |  121 +
 .../ddr/marvell/a38x/old/ddr_training_ip_db.h |   16 +
 .../marvell/a38x/old/glue_symbol_renames.h|  247 ++
 drivers/ddr/marvell/a38x/old/silicon_if.h |   17 +
 drivers/ddr/marvell/a38x/old/xor.h|   92 +
 53 files changed, 17138 insertions(+), 29 deletions(-)
 create mode 100644 board/CZ.NIC/turris_omnia/old_ddr3_training.c
 create mode 100644 drivers/ddr/marvell/a38x/old/Makefile
 create mode 100644 drivers/ddr/marvell/a38x/old/ddr3_a38x.c
 create mode 100644