On Wed, Jan 5, 2022 at 1:50 AM Pali Rohár wrote:
>
> Register 0x43c in its low 24 bits contains PCI class code.
>
> Update code to set all 24 bits of PCI class code and not only upper 16 bits
> of PCI class code.
>
> Use standard U-Boot macro (PCI_CLASS_BRIDGE_PCI << 8) for constructing all
> 24-bits of PCI class for PCI bridge Normal decode.
>
> Signed-off-by: Pali Rohár
>
> ---
> Roman helped me with this change and confirmed that class code is stored
> really in bits [23:0] of custom register 0x43c (normally class code is
> stored in bits [31:8] of pci register 0x08).
> ---
> drivers/pci/pcie_iproc.c | 9 -
> 1 file changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pci/pcie_iproc.c b/drivers/pci/pcie_iproc.c
> index be03dcbd97c0..fe68e417ae80 100644
> --- a/drivers/pci/pcie_iproc.c
> +++ b/drivers/pci/pcie_iproc.c
> @@ -1127,15 +1127,14 @@ static int iproc_pcie_check_link(struct iproc_pcie
> *pcie)
> u32 link_status, class;
>
> pcie->link_is_active = false;
> - /* force class to PCI_CLASS_BRIDGE_PCI (0x0604) */
> + /* force class to PCI bridge Normal decode (0x060400) */
> #define PCI_BRIDGE_CTRL_REG_OFFSET 0x43c
> -#define PCI_CLASS_BRIDGE_MASK 0x00
> -#define PCI_CLASS_BRIDGE_SHIFT 8
> +#define PCI_BRIDGE_CTRL_REG_CLASS_MASK 0xff
> iproc_pci_raw_config_read32(pcie, 0,
> PCI_BRIDGE_CTRL_REG_OFFSET,
> 4, );
> - class &= ~PCI_CLASS_BRIDGE_MASK;
> - class |= (PCI_CLASS_BRIDGE_PCI << PCI_CLASS_BRIDGE_SHIFT);
> + class &= ~PCI_BRIDGE_CTRL_REG_CLASS_MASK;
> + class |= (PCI_CLASS_BRIDGE_PCI << 8);
> iproc_pci_raw_config_write32(pcie, 0,
> PCI_BRIDGE_CTRL_REG_OFFSET,
> 4, class);
> --
> 2.20.1
>
Acked-by: Roman Bacik
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