Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Tue, Jun 13, 2023 at 07:28:34AM -0600, Rob Herring wrote:
> On Mon, Jun 12, 2023 at 3:23 PM Conor Dooley wrote:
> > On Thu, Jun 08, 2023 at 08:30:28PM +0100, Conor Dooley wrote:
> > > On Thu, Jun 08, 2023 at 01:15:37PM -0600, Rob Herring wrote:
> > > > On Tue, May 30, 2023 at 03:12:12PM +0100, Conor Dooley wrote:
> > > > > On Thu, May 18, 2023 at 10:42:34PM +0100, Conor Dooley wrote:
> > > > > > On Thu, May 18, 2023 at 02:30:53PM -0400, Sean Anderson wrote:
> > > > >
> > > > > > >
> > > > > > > Why not just have something like
> > > > > > >
> > > > > > > mycpu {
> > > > > > > ...
> > > > > > > riscv,isa {
> > > > > > > i;
> > > > > > > m;
> > > > > > > a;
> > > > > > > zicsr;
> > > > > > > ...
> > > >
> > > > I prefer property names be globally unique. The tools are geared towards
> > > > that too. That's largely a symptom of having 0 type information in the
> > > > DT.
> > > >
> > > > For example if you had an extension called 'reg', it would be a problem.
> > >
> > > Per the current ISA rules, that'd not be valid. But then again, I do
> > > have trust issues & it's not like "reg" is the only property name in DT
> > > land.
> >
> > ...you say "prefer" here. Is that a NAK, or a "you keep the pieces"?
>
> Don't do the above node.
Yeah, that's more helpful wording than "prefer" for sure!
If that's a no-go & so are the booleans prefixed with "riscv,whatever-",
since people have size concerns, I guess that leaves your string
suggestion (there is a helper in Linux at least, haven't checked
elsewhere yet).
I guess that means something like:
riscv,isa-extensions:
$ref: /schemas/types.yaml#/definitions/string-array
minItems: 1
description: Extensions supported by the hart.
items:
anyOf:
- const: i
description: foo
- const: m
description: foo
- const: a
description: foo
- const: f
description: foo
- const: d
description: foo
- const: c
description: foo
- const: zifencei
description: foo
- etc
Obviously with "foo" replaced by the existing descriptions in this
patch.
signature.asc
Description: PGP signature
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Mon, Jun 12, 2023 at 3:23 PM Conor Dooley wrote:
>
> Rob,
> Before I press on with more versions...
>
> On Thu, Jun 08, 2023 at 08:30:28PM +0100, Conor Dooley wrote:
> > On Thu, Jun 08, 2023 at 01:15:37PM -0600, Rob Herring wrote:
> > > On Tue, May 30, 2023 at 03:12:12PM +0100, Conor Dooley wrote:
> > > > On Thu, May 18, 2023 at 10:42:34PM +0100, Conor Dooley wrote:
> > > > > On Thu, May 18, 2023 at 02:30:53PM -0400, Sean Anderson wrote:
> > > >
> > > > > >
> > > > > > Why not just have something like
> > > > > >
> > > > > > mycpu {
> > > > > > ...
> > > > > > riscv,isa {
> > > > > > i;
> > > > > > m;
> > > > > > a;
> > > > > > zicsr;
> > > > > > ...
> > >
> > > I prefer property names be globally unique. The tools are geared towards
> > > that too. That's largely a symptom of having 0 type information in the
> > > DT.
> > >
> > > For example if you had an extension called 'reg', it would be a problem.
> >
> > Per the current ISA rules, that'd not be valid. But then again, I do
> > have trust issues & it's not like "reg" is the only property name in DT
> > land.
>
> ...you say "prefer" here. Is that a NAK, or a "you keep the pieces"?
Don't do the above node.
Rob
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
Rob,
Before I press on with more versions...
On Thu, Jun 08, 2023 at 08:30:28PM +0100, Conor Dooley wrote:
> On Thu, Jun 08, 2023 at 01:15:37PM -0600, Rob Herring wrote:
> > On Tue, May 30, 2023 at 03:12:12PM +0100, Conor Dooley wrote:
> > > On Thu, May 18, 2023 at 10:42:34PM +0100, Conor Dooley wrote:
> > > > On Thu, May 18, 2023 at 02:30:53PM -0400, Sean Anderson wrote:
> > >
> > > > >
> > > > > Why not just have something like
> > > > >
> > > > > mycpu {
> > > > > ...
> > > > > riscv,isa {
> > > > > i;
> > > > > m;
> > > > > a;
> > > > > zicsr;
> > > > > ...
> >
> > I prefer property names be globally unique. The tools are geared towards
> > that too. That's largely a symptom of having 0 type information in the
> > DT.
> >
> > For example if you had an extension called 'reg', it would be a problem.
>
> Per the current ISA rules, that'd not be valid. But then again, I do
> have trust issues & it's not like "reg" is the only property name in DT
> land.
...you say "prefer" here. Is that a NAK, or a "you keep the pieces"?
signature.asc
Description: PGP signature
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Thu, Jun 08, 2023 at 01:15:37PM -0600, Rob Herring wrote:
> On Tue, May 30, 2023 at 03:12:12PM +0100, Conor Dooley wrote:
> > On Thu, May 18, 2023 at 10:42:34PM +0100, Conor Dooley wrote:
> > > On Thu, May 18, 2023 at 02:30:53PM -0400, Sean Anderson wrote:
> >
> > > >
> > > > Why not just have something like
> > > >
> > > > mycpu {
> > > > ...
> > > > riscv,isa {
> > > > i;
> > > > m;
> > > > a;
> > > > zicsr;
> > > > ...
>
> I prefer property names be globally unique. The tools are geared towards
> that too. That's largely a symptom of having 0 type information in the
> DT.
>
> For example if you had an extension called 'reg', it would be a problem.
Per the current ISA rules, that'd not be valid. But then again, I do
have trust issues & it's not like "reg" is the only property name in DT
land.
> > > Naming of the node aside (perhaps that could be riscv,isa-extensions)
> > > there's not something hitting me immediately as to why that is a no-no.
> > > If the size is a concern, this would certainly be more efficient & not
> > > like the probing would be anything other than trivial more difficult
> > > what I have in my proposal.
> >
> > Having started messing around with this, one of the main advantages, to
> > me, of this approach is proper validation.
> > cpus.yaml has additionalProperties: true in it, which would have had to
> > be sorted out, or worked around, but creating a child-node with the
> > properties in it allows setting additionalProperties: false.
>
> That's an issue on my radar to fix. I started that for the Arm cpus.yaml
> a while back. Sadly it involves adding all the misc properties vendors
> added. It's not a lot, but still better to get in front of that for
> Risc-V.
Yeah, guess I can append that to my todo list.
> > > Rob's AFK at the moment, and I was hoping that he would take a look at
> > > the idea, so I won't respin til he is back, but I'll give this a go in
> > > the interim.
> >
> > Mechanically, the conversion of the patch isn't difficult, but I'll still
> > wait for Rob to come back before sending a v2. But that v2 will more
> > than likely implement your suggestion.
>
> I haven't read the whole thread, but the initial proposal looks okay to
> me.
>
> Another way you could do this is a list of strings:
>
> riscv,isa-ext = "i", "m", "zicsr";
>
> I think we have a helper to test is a string in the list.
Perhaps I should've waited a bit longer than a month for a v2 - I sent
one this afternoon doing what Sean suggested:
https://lore.kernel.org/all/20230608-sitting-bath-31eddc03c5a5@spud/
I'll do some poking at the strings and see what I think of it.
Cheers,
Conor.
signature.asc
Description: PGP signature
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Tue, May 30, 2023 at 03:12:12PM +0100, Conor Dooley wrote:
> On Thu, May 18, 2023 at 10:42:34PM +0100, Conor Dooley wrote:
> > On Thu, May 18, 2023 at 02:30:53PM -0400, Sean Anderson wrote:
>
> > >
> > > Why not just have something like
> > >
> > > mycpu {
> > > ...
> > > riscv,isa {
> > > i;
> > > m;
> > > a;
> > > zicsr;
> > > ...
I prefer property names be globally unique. The tools are geared towards
that too. That's largely a symptom of having 0 type information in the
DT.
For example if you had an extension called 'reg', it would be a problem.
> > > };
> > > };
> >
> > Naming of the node aside (perhaps that could be riscv,isa-extensions)
> > there's not something hitting me immediately as to why that is a no-no.
> > If the size is a concern, this would certainly be more efficient & not
> > like the probing would be anything other than trivial more difficult
> > what I have in my proposal.
>
> Having started messing around with this, one of the main advantages, to
> me, of this approach is proper validation.
> cpus.yaml has additionalProperties: true in it, which would have had to
> be sorted out, or worked around, but creating a child-node with the
> properties in it allows setting additionalProperties: false.
That's an issue on my radar to fix. I started that for the Arm cpus.yaml
a while back. Sadly it involves adding all the misc properties vendors
added. It's not a lot, but still better to get in front of that for
Risc-V.
> > Rob's AFK at the moment, and I was hoping that he would take a look at
> > the idea, so I won't respin til he is back, but I'll give this a go in
> > the interim.
>
> Mechanically, the conversion of the patch isn't difficult, but I'll still
> wait for Rob to come back before sending a v2. But that v2 will more
> than likely implement your suggestion.
I haven't read the whole thread, but the initial proposal looks okay to
me.
Another way you could do this is a list of strings:
riscv,isa-ext = "i", "m", "zicsr";
I think we have a helper to test is a string in the list.
Rob
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Thu, May 18, 2023 at 10:42:34PM +0100, Conor Dooley wrote:
> On Thu, May 18, 2023 at 02:30:53PM -0400, Sean Anderson wrote:
> >
> > Why not just have something like
> >
> > mycpu {
> > ...
> > riscv,isa {
> > i;
> > m;
> > a;
> > zicsr;
> > ...
> > };
> > };
>
> Naming of the node aside (perhaps that could be riscv,isa-extensions)
> there's not something hitting me immediately as to why that is a no-no.
> If the size is a concern, this would certainly be more efficient & not
> like the probing would be anything other than trivial more difficult
> what I have in my proposal.
Having started messing around with this, one of the main advantages, to
me, of this approach is proper validation.
cpus.yaml has additionalProperties: true in it, which would have had to
be sorted out, or worked around, but creating a child-node with the
properties in it allows setting additionalProperties: false.
> Rob's AFK at the moment, and I was hoping that he would take a look at
> the idea, so I won't respin til he is back, but I'll give this a go in
> the interim.
Mechanically, the conversion of the patch isn't difficult, but I'll still
wait for Rob to come back before sending a v2. But that v2 will more
than likely implement your suggestion.
Cheers,
Conor.
signature.asc
Description: PGP signature
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Thu, May 18, 2023 at 02:30:53PM -0400, Sean Anderson wrote: > On 5/18/23 10:06, Conor Dooley wrote: > > On Thu, May 18, 2023 at 07:13:15PM +0530, Anup Patel wrote: > >> On Thu, May 18, 2023 at 4:02 PM Andrew Jones > >> wrote: > >> > On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote: > > > >> > > - riscv,isa: > >> > > -description: > >> > > - Identifies the specific RISC-V instruction set architecture > >> > > - supported by the hart. These are documented in the RISC-V > >> > > - User-Level ISA document, available from > >> > > - https://riscv.org/specifications/ > >> > > - > >> > > - Due to revisions of the ISA specification, some deviations > >> > > - have arisen over time. > >> > > - Notably, riscv,isa was defined prior to the creation of the > >> > > - Zicsr and Zifencei extensions and thus "i" implies > >> > > - "zicsr_zifencei". > >> > > - > >> > > - While the isa strings in ISA specification are case > >> > > - insensitive, letters in the riscv,isa string must be all > >> > > - lowercase to simplify parsing. > >> > > -$ref: "/schemas/types.yaml#/definitions/string" > >> > > -pattern: > >> > > ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[hsxz](?:[a-z])+)*$ > >> > > - > >> > ># RISC-V requires 'timebase-frequency' in /cpus, so disallow it here > >> > >timebase-frequency: false > >> > > > >> > > @@ -133,8 +117,13 @@ properties: > >> > >DMIPS/MHz, relative to highest capacity-dmips-mhz > >> > >in the system. > >> > > > >> > > +oneOf: > >> > > + - required: > >> > > + - riscv,isa > >> > > >> > This is the part Anup keeps reminding me about. We can create better ways > >> > to handle extensions in DT and ACPI, but we'll still need to parse ISA > >> > strings to handle legacy DTs and holdouts that keep creating ISA strings, > >> > at least during the deprecation period, since ISA strings are still "the > >> > way to do it" according to the spec. > >> > >> Coming up with an alternate way in DT is fine but we can't deprecate > >> ISA strings since ISA strings are widely used: > >> 1) Various bootloaders > > > > Aye, for the reason, as I mentioned earlier and in the RFC thread, > > removing existing parsers isn't a good idea. > > > >> 2) It is part of /proc/cpuinfo > > > > That is irrelevant. > > > >> 3) Hypervisors use it to communicate HW features to Guest/VM. > >> Hypervisors can't get away from generating ISA strings because > >> Hypervisors don't know what is running inside Guest/VM. > > > > Generate both :) As things stand, your guests could interpret what you > > communicate to them via riscv,isa differently! > > > >> In the case of ACPI, it is a very different situation. Like Sunil > >> mentioned, > >> ACPI will always follow mechanisms defined by RVI (such as ISA string). > >> Other ACPI approaches such as GUID for ISA extension are simply not > >> scalable and will take a lot more memory for ACPI tables compared to > >> ISA strings. > > > > My proposal should actually suit ACPI, at least for Linux, as it would > > be a chance to align currently misaligned definitions. I won't speak to > > GUIDs or whatever as that's someone else's problem :) > > > >> > Also, if we assume the wording in the spec does get shored up, then, > >> > unless I'm missing something, the list of advantages for this boolean > >> > proposal from your commit message would be > >> > >> IMO, we should try our best to have the wordings changed in RVI spec. > > > > Yes, doing so is beneficial for all of us regardless of what happens > > here. I do think that it is partially orthogonal - it allows us to not > > design an interface that needs to be capable of communicating a wide > > variety of versions, but I don't think it solves some of the issues > > that riscv,isa has. If I thought it did, I would not have gone to the > > trouble of respinning this patch out of the other approach. > > > >> > * More character choices for name -- probably not a huge gain for > >> > ratified > >> > extensions, since the boolean properties will likely still use the same > >> > name as the ISA string (riscv,isa-extension-). But, for vendor > >> > extensions, this is indeed a major improvement, since vendor extension > >> > boolean property names may need to be extended in unambiguous ways to > >> > handle changes in the extension. > >> > > >> > * Simpler, more complete DT validation (but we still need a best effort > >> > for legacy ISA strings) > >> > > >> > * Simpler DT parsing (but we still need the current parser for legacy ISA > >> > strings) > >> > > >> > > + - required: > >> > > + - riscv,isa-base > >> > > + > >> > > required: > >> > > - - riscv,isa > >> > >- interrupt-controller > >> > > > >> > > additionalProperties: true > >> > > @@ -177,7 +166,13 @@ examples: > >> > > i-tlb-size = <32>; > >> > > mmu-type = "riscv,sv39"; > >> > >
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On 5/18/23 10:06, Conor Dooley wrote: > On Thu, May 18, 2023 at 07:13:15PM +0530, Anup Patel wrote: >> On Thu, May 18, 2023 at 4:02 PM Andrew Jones wrote: >> > On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote: > >> > > - riscv,isa: >> > > -description: >> > > - Identifies the specific RISC-V instruction set architecture >> > > - supported by the hart. These are documented in the RISC-V >> > > - User-Level ISA document, available from >> > > - https://riscv.org/specifications/ >> > > - >> > > - Due to revisions of the ISA specification, some deviations >> > > - have arisen over time. >> > > - Notably, riscv,isa was defined prior to the creation of the >> > > - Zicsr and Zifencei extensions and thus "i" implies >> > > - "zicsr_zifencei". >> > > - >> > > - While the isa strings in ISA specification are case >> > > - insensitive, letters in the riscv,isa string must be all >> > > - lowercase to simplify parsing. >> > > -$ref: "/schemas/types.yaml#/definitions/string" >> > > -pattern: >> > > ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[hsxz](?:[a-z])+)*$ >> > > - >> > ># RISC-V requires 'timebase-frequency' in /cpus, so disallow it here >> > >timebase-frequency: false >> > > >> > > @@ -133,8 +117,13 @@ properties: >> > >DMIPS/MHz, relative to highest capacity-dmips-mhz >> > >in the system. >> > > >> > > +oneOf: >> > > + - required: >> > > + - riscv,isa >> > >> > This is the part Anup keeps reminding me about. We can create better ways >> > to handle extensions in DT and ACPI, but we'll still need to parse ISA >> > strings to handle legacy DTs and holdouts that keep creating ISA strings, >> > at least during the deprecation period, since ISA strings are still "the >> > way to do it" according to the spec. >> >> Coming up with an alternate way in DT is fine but we can't deprecate >> ISA strings since ISA strings are widely used: >> 1) Various bootloaders > > Aye, for the reason, as I mentioned earlier and in the RFC thread, > removing existing parsers isn't a good idea. > >> 2) It is part of /proc/cpuinfo > > That is irrelevant. > >> 3) Hypervisors use it to communicate HW features to Guest/VM. >> Hypervisors can't get away from generating ISA strings because >> Hypervisors don't know what is running inside Guest/VM. > > Generate both :) As things stand, your guests could interpret what you > communicate to them via riscv,isa differently! > >> In the case of ACPI, it is a very different situation. Like Sunil mentioned, >> ACPI will always follow mechanisms defined by RVI (such as ISA string). >> Other ACPI approaches such as GUID for ISA extension are simply not >> scalable and will take a lot more memory for ACPI tables compared to >> ISA strings. > > My proposal should actually suit ACPI, at least for Linux, as it would > be a chance to align currently misaligned definitions. I won't speak to > GUIDs or whatever as that's someone else's problem :) > >> > Also, if we assume the wording in the spec does get shored up, then, >> > unless I'm missing something, the list of advantages for this boolean >> > proposal from your commit message would be >> >> IMO, we should try our best to have the wordings changed in RVI spec. > > Yes, doing so is beneficial for all of us regardless of what happens > here. I do think that it is partially orthogonal - it allows us to not > design an interface that needs to be capable of communicating a wide > variety of versions, but I don't think it solves some of the issues > that riscv,isa has. If I thought it did, I would not have gone to the > trouble of respinning this patch out of the other approach. > >> > * More character choices for name -- probably not a huge gain for ratified >> > extensions, since the boolean properties will likely still use the same >> > name as the ISA string (riscv,isa-extension-). But, for vendor >> > extensions, this is indeed a major improvement, since vendor extension >> > boolean property names may need to be extended in unambiguous ways to >> > handle changes in the extension. >> > >> > * Simpler, more complete DT validation (but we still need a best effort >> > for legacy ISA strings) >> > >> > * Simpler DT parsing (but we still need the current parser for legacy ISA >> > strings) >> > >> > > + - required: >> > > + - riscv,isa-base >> > > + >> > > required: >> > > - - riscv,isa >> > >- interrupt-controller >> > > >> > > additionalProperties: true >> > > @@ -177,7 +166,13 @@ examples: >> > > i-tlb-size = <32>; >> > > mmu-type = "riscv,sv39"; >> > > reg = <1>; >> > > -riscv,isa = "rv64imafdc"; >> > > +riscv,isa-base = "rv64i"; >> > > +riscv,isa-extension-i; >> > > +riscv,isa-extension-m; >> > > +riscv,isa-extension-a; >> > > +
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Thu, May 18, 2023 at 07:41:17AM -0700, Palmer Dabbelt wrote: > On Thu, 18 May 2023 07:06:17 PDT (-0700), Conor Dooley wrote: > > On Thu, May 18, 2023 at 07:13:15PM +0530, Anup Patel wrote: > > > On Thu, May 18, 2023 at 4:02 PM Andrew Jones > > > wrote: > > > > On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote: > > > One downside of this new approach is it will increase the size of DTB. > > > Imaging 50 such DT properties in 46 CPU DT nodes. > > > > I should do a comparison between 50 extensions in riscv,isa and doing > > this 50 times and see what the sizes are. > > I'm not sure how sensitive people are to DT size (presumably it'd be DTB > size)? > > It's also not clear what we can do about it: RISC-V has lots of extensions, > that's going to take encoding space. Sticking with an ambiguous encoding > because it's smaller seems like a way to get burned in the long run. I did actually go an look at this. I cheated a little and renamed the properties to "riscv,isa-ext-foo", which is about as communicative IMO as the longer name I currently have, but may seem more agreeable to the size conscious. I added 30 cpu nodes to mpfs.dtsi, each with 100 extensions of 6 chars long. With just the string, containing "rv64imafdc_zabcde_...", it was unreadable, but "only" took up 46k. I then removed the multiletter extensions from riscv,isa & switched to riscv,isa-base & 100 booleans. IMO it was more readable (although still quite bad!), but took up 62k. Removing all of the boolean properties, leaving me with 30 addtional harts with "rv64imafdc" only, was 26k. I think the generic limit for dtb files is 2 MiB? To me the size increase doesn't sound like a bit problem. signature.asc Description: PGP signature
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Thu, 18 May 2023 07:06:17 PDT (-0700), Conor Dooley wrote: On Thu, May 18, 2023 at 07:13:15PM +0530, Anup Patel wrote: On Thu, May 18, 2023 at 4:02 PM Andrew Jones wrote: > On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote: > > - riscv,isa: > > -description: > > - Identifies the specific RISC-V instruction set architecture > > - supported by the hart. These are documented in the RISC-V > > - User-Level ISA document, available from > > - https://riscv.org/specifications/ > > - > > - Due to revisions of the ISA specification, some deviations > > - have arisen over time. > > - Notably, riscv,isa was defined prior to the creation of the > > - Zicsr and Zifencei extensions and thus "i" implies > > - "zicsr_zifencei". > > - > > - While the isa strings in ISA specification are case > > - insensitive, letters in the riscv,isa string must be all > > - lowercase to simplify parsing. > > -$ref: "/schemas/types.yaml#/definitions/string" > > -pattern: ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[hsxz](?:[a-z])+)*$ > > - > ># RISC-V requires 'timebase-frequency' in /cpus, so disallow it here > >timebase-frequency: false > > > > @@ -133,8 +117,13 @@ properties: > >DMIPS/MHz, relative to highest capacity-dmips-mhz > >in the system. > > > > +oneOf: > > + - required: > > + - riscv,isa > > This is the part Anup keeps reminding me about. We can create better ways > to handle extensions in DT and ACPI, but we'll still need to parse ISA > strings to handle legacy DTs and holdouts that keep creating ISA strings, > at least during the deprecation period, since ISA strings are still "the > way to do it" according to the spec. Coming up with an alternate way in DT is fine but we can't deprecate ISA strings since ISA strings are widely used: 1) Various bootloaders Aye, for the reason, as I mentioned earlier and in the RFC thread, removing existing parsers isn't a good idea. Removing and deprecating are different. We can deprecate stuff. 2) It is part of /proc/cpuinfo That is irrelevant. 3) Hypervisors use it to communicate HW features to Guest/VM. Hypervisors can't get away from generating ISA strings because Hypervisors don't know what is running inside Guest/VM. Generate both :) As things stand, your guests could interpret what you communicate to them via riscv,isa differently! In the case of ACPI, it is a very different situation. Like Sunil mentioned, ACPI will always follow mechanisms defined by RVI (such as ISA string). Other ACPI approaches such as GUID for ISA extension are simply not scalable and will take a lot more memory for ACPI tables compared to ISA strings. My proposal should actually suit ACPI, at least for Linux, as it would be a chance to align currently misaligned definitions. I won't speak to GUIDs or whatever as that's someone else's problem :) We talked a bit in the patchwork meeting with Drew about ACPI. Any actual spec/encoding would need to be different, of course, but conceptually it seems to fit fine. It's also broadly similar to what we've done with riscv_hwprobe() for userspace, which is nice. > Also, if we assume the wording in the spec does get shored up, then, > unless I'm missing something, the list of advantages for this boolean > proposal from your commit message would be IMO, we should try our best to have the wordings changed in RVI spec. Yes, doing so is beneficial for all of us regardless of what happens here. I do think that it is partially orthogonal - it allows us to not design an interface that needs to be capable of communicating a wide variety of versions, but I don't think it solves some of the issues that riscv,isa has. If I thought it did, I would not have gone to the trouble of respinning this patch out of the other approach. > * More character choices for name -- probably not a huge gain for ratified > extensions, since the boolean properties will likely still use the same > name as the ISA string (riscv,isa-extension-). But, for vendor > extensions, this is indeed a major improvement, since vendor extension > boolean property names may need to be extended in unambiguous ways to > handle changes in the extension. > > * Simpler, more complete DT validation (but we still need a best effort > for legacy ISA strings) > > * Simpler DT parsing (but we still need the current parser for legacy ISA > strings) > > > + - required: > > + - riscv,isa-base > > + > > required: > > - - riscv,isa > >- interrupt-controller > > > > additionalProperties: true > > @@ -177,7 +166,13 @@ examples: > > i-tlb-size = <32>; > > mmu-type = "riscv,sv39"; > > reg = <1>; > > -riscv,isa = "rv64imafdc"; > > +riscv,isa-base = "rv64i"; > > +riscv,isa-extension-i; > > +riscv,isa-extension-m; > > +
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Thu, May 18, 2023 at 07:13:15PM +0530, Anup Patel wrote: > On Thu, May 18, 2023 at 4:02 PM Andrew Jones wrote: > > On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote: > > > - riscv,isa: > > > -description: > > > - Identifies the specific RISC-V instruction set architecture > > > - supported by the hart. These are documented in the RISC-V > > > - User-Level ISA document, available from > > > - https://riscv.org/specifications/ > > > - > > > - Due to revisions of the ISA specification, some deviations > > > - have arisen over time. > > > - Notably, riscv,isa was defined prior to the creation of the > > > - Zicsr and Zifencei extensions and thus "i" implies > > > - "zicsr_zifencei". > > > - > > > - While the isa strings in ISA specification are case > > > - insensitive, letters in the riscv,isa string must be all > > > - lowercase to simplify parsing. > > > -$ref: "/schemas/types.yaml#/definitions/string" > > > -pattern: > > > ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[hsxz](?:[a-z])+)*$ > > > - > > ># RISC-V requires 'timebase-frequency' in /cpus, so disallow it here > > >timebase-frequency: false > > > > > > @@ -133,8 +117,13 @@ properties: > > >DMIPS/MHz, relative to highest capacity-dmips-mhz > > >in the system. > > > > > > +oneOf: > > > + - required: > > > + - riscv,isa > > > > This is the part Anup keeps reminding me about. We can create better ways > > to handle extensions in DT and ACPI, but we'll still need to parse ISA > > strings to handle legacy DTs and holdouts that keep creating ISA strings, > > at least during the deprecation period, since ISA strings are still "the > > way to do it" according to the spec. > > Coming up with an alternate way in DT is fine but we can't deprecate > ISA strings since ISA strings are widely used: > 1) Various bootloaders Aye, for the reason, as I mentioned earlier and in the RFC thread, removing existing parsers isn't a good idea. > 2) It is part of /proc/cpuinfo That is irrelevant. > 3) Hypervisors use it to communicate HW features to Guest/VM. > Hypervisors can't get away from generating ISA strings because > Hypervisors don't know what is running inside Guest/VM. Generate both :) As things stand, your guests could interpret what you communicate to them via riscv,isa differently! > In the case of ACPI, it is a very different situation. Like Sunil mentioned, > ACPI will always follow mechanisms defined by RVI (such as ISA string). > Other ACPI approaches such as GUID for ISA extension are simply not > scalable and will take a lot more memory for ACPI tables compared to > ISA strings. My proposal should actually suit ACPI, at least for Linux, as it would be a chance to align currently misaligned definitions. I won't speak to GUIDs or whatever as that's someone else's problem :) > > Also, if we assume the wording in the spec does get shored up, then, > > unless I'm missing something, the list of advantages for this boolean > > proposal from your commit message would be > > IMO, we should try our best to have the wordings changed in RVI spec. Yes, doing so is beneficial for all of us regardless of what happens here. I do think that it is partially orthogonal - it allows us to not design an interface that needs to be capable of communicating a wide variety of versions, but I don't think it solves some of the issues that riscv,isa has. If I thought it did, I would not have gone to the trouble of respinning this patch out of the other approach. > > * More character choices for name -- probably not a huge gain for ratified > > extensions, since the boolean properties will likely still use the same > > name as the ISA string (riscv,isa-extension-). But, for vendor > > extensions, this is indeed a major improvement, since vendor extension > > boolean property names may need to be extended in unambiguous ways to > > handle changes in the extension. > > > > * Simpler, more complete DT validation (but we still need a best effort > > for legacy ISA strings) > > > > * Simpler DT parsing (but we still need the current parser for legacy ISA > > strings) > > > > > + - required: > > > + - riscv,isa-base > > > + > > > required: > > > - - riscv,isa > > >- interrupt-controller > > > > > > additionalProperties: true > > > @@ -177,7 +166,13 @@ examples: > > > i-tlb-size = <32>; > > > mmu-type = "riscv,sv39"; > > > reg = <1>; > > > -riscv,isa = "rv64imafdc"; > > > +riscv,isa-base = "rv64i"; > > > +riscv,isa-extension-i; > > > +riscv,isa-extension-m; > > > +riscv,isa-extension-a; > > > +riscv,isa-extension-f; > > > +riscv,isa-extension-d; > > > +riscv,isa-extension-c; > > One downside of this new approach is it will increase the size of
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Thu, May 18, 2023 at 4:02 PM Andrew Jones wrote: > > On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote: > > intro > > = > > > > When the RISC-V dt-bindings were accepted upstream in Linux, the base > > ISA etc had yet to be ratified. By the ratification of the base ISA, > > incompatible changes had snuck into the specifications - for example the > > Zicsr and Zifencei extensions were spun out of the base ISA. > > > > Fast forward to today, and the reason for this patch. > > Currently the riscv,isa dt property permits only a specific subset of > > the ISA string - in particular it excludes version numbering. > > With the current constraints, it is not possible to discern whether > > "rv64i" means that the hart supports the fence.i instruction, for > > example. > > Future systems may choose to implement their own instruction fencing, > > perhaps using a vendor extension, or they may not implement the optional > > counter extensions. Software needs a way to determine this. > > > > versioning schemes > > == > > > > "Use the extension versions that are described in the ISA manual" you > > may say, and it's not like this has not been considered. > > Firstly, software that parses the riscv,isa property at runtime will > > need to contain a lookup table of some sort that maps arbitrary versions > > to versions it understands. There is not a consistent application of > > version number applied to extensions, with a higgledy-piggledy > > collection of tags, "bare" and version documents awaiting the reader on > > the "recently ratified extensions" page: > > https://wiki.riscv.org/display/HOME/Recently+Ratified+Extensions > > > > As an aside, this is reflected in the patch too, since many > > extensions have yet to appear in a release of the ISA specs, > > and are defined by commits in their respective "working draft" > > repositories. > > > > Secondly, there is an issue of backwards compatibility, whereby allowing > > numbers in the ISA string, some parsers may be broken. This would > > require an additional property to be created to even use the versions in > > this manner. > > > > boolean properties > > == > > > > If a new property is needed, the whole approach may as well be looked at > > from the bottom up. A string with limited character choices etc is > > hardly the best approach for communicating extension information to > > software. > > > > Switching to using boolean properties, one per extension, allows us to > > define explicit meanings for the DT representation of each extension - > > rather than the current situation where different operating systems or > > other bits of software may impart different meanings to characters in > > the string. Clearly the best source of meanings is the specifications > > themselves, this just provides us the ability to choose at what point > > in time the meaning is set. If an extension changes incompatibility in > > the future, a new property will be required. > > > > Off-list, some of the RVI folks have committed to shoring up the wording > > in either the ISA specifications, the riscv-isa-manual or > > so that in the future, modifications to and additions or removals of > > features will require a new extension. Codifying that assertion > > somewhere would make it quite unlikely that compatibility would be > > broken, but we have the tools required to deal with it, if & when it > > crops up. > > It is in our collective interest, as consumers of extension meanings, to > > define a scheme that enforces compatibility. > > > > The use of boolean properties, rather than elements in a string, will > > also permit validation that the strings have a meaning, as well as > > potentially reject mutually exclusive combinations, or enforce > > dependencies between instructions. That would not be possible with the > > current dt-schema infrastructure for arbitrary strings, as we would need > > to add a riscv,isa parser to dt-validate! > > That's not implemented in this patch, but rather left as > > future work! > > > > acpi > > > > > > The current ACPI ECR is based on having a string unfortunately, but > > ideally ACPI will move to another method, perhaps GUIDs, that give > > explicit meaning to extensions. > > > > parser simplicity > > = > > > > Many systems that parse DT at runtime already implement an function that > > can check for the presence of boolean properties, rather than having to > > implement - although unfortunately for backwards compatibility with old > > dtbs, existing parsers may not be removable - which may greatly simplify > > dt parsing code. For example, in Linux, checking for an extension > > becomes as simple as: > > of_property_present(node, "riscv,isa-extension-zicbom") > > > > vendor extensions > > = > > > > Compared to riscv,isa, this proposed scheme promotes vendor extensions, > > oft touted as the strength of RISC-V, to
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote: > intro > = > > When the RISC-V dt-bindings were accepted upstream in Linux, the base > ISA etc had yet to be ratified. By the ratification of the base ISA, > incompatible changes had snuck into the specifications - for example the > Zicsr and Zifencei extensions were spun out of the base ISA. > > Fast forward to today, and the reason for this patch. > Currently the riscv,isa dt property permits only a specific subset of > the ISA string - in particular it excludes version numbering. > With the current constraints, it is not possible to discern whether > "rv64i" means that the hart supports the fence.i instruction, for > example. > Future systems may choose to implement their own instruction fencing, > perhaps using a vendor extension, or they may not implement the optional > counter extensions. Software needs a way to determine this. > > versioning schemes > == > > "Use the extension versions that are described in the ISA manual" you > may say, and it's not like this has not been considered. > Firstly, software that parses the riscv,isa property at runtime will > need to contain a lookup table of some sort that maps arbitrary versions > to versions it understands. There is not a consistent application of > version number applied to extensions, with a higgledy-piggledy > collection of tags, "bare" and version documents awaiting the reader on > the "recently ratified extensions" page: > https://wiki.riscv.org/display/HOME/Recently+Ratified+Extensions > > As an aside, this is reflected in the patch too, since many > extensions have yet to appear in a release of the ISA specs, > and are defined by commits in their respective "working draft" > repositories. > > Secondly, there is an issue of backwards compatibility, whereby allowing > numbers in the ISA string, some parsers may be broken. This would > require an additional property to be created to even use the versions in > this manner. > > boolean properties > == > > If a new property is needed, the whole approach may as well be looked at > from the bottom up. A string with limited character choices etc is > hardly the best approach for communicating extension information to > software. > > Switching to using boolean properties, one per extension, allows us to > define explicit meanings for the DT representation of each extension - > rather than the current situation where different operating systems or > other bits of software may impart different meanings to characters in > the string. Clearly the best source of meanings is the specifications > themselves, this just provides us the ability to choose at what point > in time the meaning is set. If an extension changes incompatibility in > the future, a new property will be required. > > Off-list, some of the RVI folks have committed to shoring up the wording > in either the ISA specifications, the riscv-isa-manual or > so that in the future, modifications to and additions or removals of > features will require a new extension. Codifying that assertion > somewhere would make it quite unlikely that compatibility would be > broken, but we have the tools required to deal with it, if & when it > crops up. > It is in our collective interest, as consumers of extension meanings, to > define a scheme that enforces compatibility. > > The use of boolean properties, rather than elements in a string, will > also permit validation that the strings have a meaning, as well as > potentially reject mutually exclusive combinations, or enforce > dependencies between instructions. That would not be possible with the > current dt-schema infrastructure for arbitrary strings, as we would need > to add a riscv,isa parser to dt-validate! > That's not implemented in this patch, but rather left as > future work! > > acpi > > > The current ACPI ECR is based on having a string unfortunately, but > ideally ACPI will move to another method, perhaps GUIDs, that give > explicit meaning to extensions. > > parser simplicity > = > > Many systems that parse DT at runtime already implement an function that > can check for the presence of boolean properties, rather than having to > implement - although unfortunately for backwards compatibility with old > dtbs, existing parsers may not be removable - which may greatly simplify > dt parsing code. For example, in Linux, checking for an extension > becomes as simple as: > of_property_present(node, "riscv,isa-extension-zicbom") > > vendor extensions > = > > Compared to riscv,isa, this proposed scheme promotes vendor extensions, > oft touted as the strength of RISC-V, to first-class citizens. > At present, extensions are defined as meaning what the RISC-V ISA > specifications say they do. There is no realistic way of using that > interface to provide cross-platform definitions for what vendor > extensions mean.
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
On Thu, May 18, 2023 at 12:31:51PM +0200, Andrew Jones wrote: > > + # Additional Standard Extensions, sorted by category then alphabetically > > Can we just do pure alphabetically? And the single-letter extensions above > don't have a "sorted by" comment above them. I guess they need one, or > maybe they can also be alphabetical? Maybe it is just me, but my brain is too used to seeing those ones in something approaching canonical order. I'd rather keep them that way & then alphanumerical for everything else? I also noticed that the CMO stuff wasn't actually in the comment's order anyway, so needs a re-sort to begin with. A vote in favour of alphanumerical. signature.asc Description: PGP signature
Re: [PATCH v1] dt-bindings: riscv: deprecate riscv,isa
Hey Drew, On Thu, May 18, 2023 at 12:31:51PM +0200, Andrew Jones wrote: > On Thu, May 18, 2023 at 09:58:30AM +0100, Conor Dooley wrote: > > - riscv,isa: > > -description: > > - Identifies the specific RISC-V instruction set architecture > > - supported by the hart. These are documented in the RISC-V > > - User-Level ISA document, available from > > - https://riscv.org/specifications/ > > - > > - Due to revisions of the ISA specification, some deviations > > - have arisen over time. > > - Notably, riscv,isa was defined prior to the creation of the > > - Zicsr and Zifencei extensions and thus "i" implies > > - "zicsr_zifencei". > > - > > - While the isa strings in ISA specification are case > > - insensitive, letters in the riscv,isa string must be all > > - lowercase to simplify parsing. > > -$ref: "/schemas/types.yaml#/definitions/string" > > -pattern: > > ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[hsxz](?:[a-z])+)*$ > > - > ># RISC-V requires 'timebase-frequency' in /cpus, so disallow it here > >timebase-frequency: false > > > > @@ -133,8 +117,13 @@ properties: > >DMIPS/MHz, relative to highest capacity-dmips-mhz > >in the system. > > > > +oneOf: > > + - required: > > + - riscv,isa > > This is the part Anup keeps reminding me about. We can create better ways > to handle extensions in DT and ACPI, but we'll still need to parse ISA > strings to handle legacy DTs and holdouts that keep creating ISA strings, > at least during the deprecation period, Yeah, we cannot remove the string parser from the kernel as we will break existing users. I don't see keeping it as a problem, we should be nice to people rather than intentionally trip them up. Let them trip themselves up when their implicit meaning doesn't match whatever bit of software they are running's. > since ISA strings are still "the > way to do it" according to the spec. I am not sure what this means, dt-bindings determine the DT ABI, not what RVI puts in specs. > Also, if we assume the wording in the spec does get shored up, then, > unless I'm missing something, the list of advantages for this boolean > proposal from your commit message would be Well, shored up _AND_ adhered to. Actions speak far, far louder than words in that respect unfortunately! > * More character choices for name -- probably not a huge gain for ratified > extensions, since the boolean properties will likely still use the same > name as the ISA string (riscv,isa-extension-). But, for vendor > extensions, this is indeed a major improvement, since vendor extension > boolean property names may need to be extended in unambiguous ways to > handle changes in the extension. > > * Simpler, more complete DT validation (but we still need a best effort > for legacy ISA strings) The "best effort" validation via dt-bindings is the current regex. I've intentionally marked it deprecated, rather than delete it partly for that reason & partly out of consideration for other users. > * Simpler DT parsing (but we still need the current parser for legacy ISA > strings) Speaking only about Linux, we can use these meanings here for interpreting the strings and then apply the fixups that correspond to the difference between the defined meanings & those at the time of the dt-binding originally being merged - unconditionally setting zifencei, zicsr, zicntr, etc. If you don't implement those things, then expect to fall over. Other operating systems etc may have different implicit meanings and their own decisions to make! Oh, and if the "foo" bit of "riscv,isa-extension-foo" doesn't match what you put in riscv,isa then you keep the pieces. For example, if a vendor has a vendor extension Xconor where version 1.0.1 is incompatible with v1.0.0, the properties may be "riscv,isa-extension-xconor" and "riscv,isa-extension-xconor-no-insnx". In that case, for Linux, I would assert that there should/would be no way to get the later version of that extension via riscv,isa. There are no existing situations like this, so no backwards compatibility is broken here. If/when it happens, the property is deprecated and we can direct such cases to the new interface :) Basically the same as: https://lore.kernel.org/linux-riscv/20230504-oncoming-antihero-1ed69bb8f57d@spud/ That reminds me, I need to re-spin that with more extensions set unconditionally. If some new OS comes along, they don't need to implement riscv,isa at all as it's deprecated. I'd like to add another one: * Unified meaning of extensions across bits of software. I actually have no idea what versions of things other OSes map the characters to. > > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml > > b/Documentation/devicetree/bindings/riscv/extensions.yaml > > new file mode 100644 > > index ..1b4d726f7174 > > --- /dev/null > > +++
[PATCH v1] dt-bindings: riscv: deprecate riscv,isa
intro = When the RISC-V dt-bindings were accepted upstream in Linux, the base ISA etc had yet to be ratified. By the ratification of the base ISA, incompatible changes had snuck into the specifications - for example the Zicsr and Zifencei extensions were spun out of the base ISA. Fast forward to today, and the reason for this patch. Currently the riscv,isa dt property permits only a specific subset of the ISA string - in particular it excludes version numbering. With the current constraints, it is not possible to discern whether "rv64i" means that the hart supports the fence.i instruction, for example. Future systems may choose to implement their own instruction fencing, perhaps using a vendor extension, or they may not implement the optional counter extensions. Software needs a way to determine this. versioning schemes == "Use the extension versions that are described in the ISA manual" you may say, and it's not like this has not been considered. Firstly, software that parses the riscv,isa property at runtime will need to contain a lookup table of some sort that maps arbitrary versions to versions it understands. There is not a consistent application of version number applied to extensions, with a higgledy-piggledy collection of tags, "bare" and version documents awaiting the reader on the "recently ratified extensions" page: https://wiki.riscv.org/display/HOME/Recently+Ratified+Extensions As an aside, this is reflected in the patch too, since many extensions have yet to appear in a release of the ISA specs, and are defined by commits in their respective "working draft" repositories. Secondly, there is an issue of backwards compatibility, whereby allowing numbers in the ISA string, some parsers may be broken. This would require an additional property to be created to even use the versions in this manner. boolean properties == If a new property is needed, the whole approach may as well be looked at from the bottom up. A string with limited character choices etc is hardly the best approach for communicating extension information to software. Switching to using boolean properties, one per extension, allows us to define explicit meanings for the DT representation of each extension - rather than the current situation where different operating systems or other bits of software may impart different meanings to characters in the string. Clearly the best source of meanings is the specifications themselves, this just provides us the ability to choose at what point in time the meaning is set. If an extension changes incompatibility in the future, a new property will be required. Off-list, some of the RVI folks have committed to shoring up the wording in either the ISA specifications, the riscv-isa-manual or so that in the future, modifications to and additions or removals of features will require a new extension. Codifying that assertion somewhere would make it quite unlikely that compatibility would be broken, but we have the tools required to deal with it, if & when it crops up. It is in our collective interest, as consumers of extension meanings, to define a scheme that enforces compatibility. The use of boolean properties, rather than elements in a string, will also permit validation that the strings have a meaning, as well as potentially reject mutually exclusive combinations, or enforce dependencies between instructions. That would not be possible with the current dt-schema infrastructure for arbitrary strings, as we would need to add a riscv,isa parser to dt-validate! That's not implemented in this patch, but rather left as future work! acpi The current ACPI ECR is based on having a string unfortunately, but ideally ACPI will move to another method, perhaps GUIDs, that give explicit meaning to extensions. parser simplicity = Many systems that parse DT at runtime already implement an function that can check for the presence of boolean properties, rather than having to implement - although unfortunately for backwards compatibility with old dtbs, existing parsers may not be removable - which may greatly simplify dt parsing code. For example, in Linux, checking for an extension becomes as simple as: of_property_present(node, "riscv,isa-extension-zicbom") vendor extensions = Compared to riscv,isa, this proposed scheme promotes vendor extensions, oft touted as the strength of RISC-V, to first-class citizens. At present, extensions are defined as meaning what the RISC-V ISA specifications say they do. There is no realistic way of using that interface to provide cross-platform definitions for what vendor extensions mean. Vendor extensions may also have even less consistency than RVI do in terms of versioning, or no care about backwards compatibility. A boolean property allows us to assign explicit meanings on a per vendor extension basis, backed up by a description of
