Re: [PATCH v1 17/43] x86: pinctrl: Add a way to get the pinctrl reg address

2020-06-30 Thread Bin Meng 
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass  wrote:
>
> At present we can query the offset of a pinctrl register within the p2sb.
> For ACPI we need to get the actual address of the register. Add a function
> to handle this and rename the old one to more accurately reflect its
> purpose.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/include/asm/intel_pinctrl.h | 16 ++--
>  drivers/gpio/intel_gpio.c| 15 +++
>  drivers/misc/p2sb-uclass.c   | 16 
>  drivers/pinctrl/intel/pinctrl.c  | 11 +--
>  include/p2sb.h   |  9 +
>  5 files changed, 51 insertions(+), 16 deletions(-)
>

Reviewed-by: Bin Meng

Re: [PATCH v1 17/43] x86: pinctrl: Add a way to get the pinctrl reg address

2020-06-25 Thread Wolfgang Wallner 
Hi Simon,

-"Simon Glass"  schrieb: -
> Betreff: [PATCH v1 17/43] x86: pinctrl: Add a way to get the pinctrl reg 
> address
> 
> At present we can query the offset of a pinctrl register within the p2sb.
> For ACPI we need to get the actual address of the register. Add a function
> to handle this and rename the old one to more accurately reflect its
> purpose.
> 
> Signed-off-by: Simon Glass 
> ---
> 
>  arch/x86/include/asm/intel_pinctrl.h | 16 ++--
>  drivers/gpio/intel_gpio.c| 15 +++
>  drivers/misc/p2sb-uclass.c   | 16 
>  drivers/pinctrl/intel/pinctrl.c  | 11 +--
>  include/p2sb.h   |  9 +
>  5 files changed, 51 insertions(+), 16 deletions(-)
> 
> diff --git a/arch/x86/include/asm/intel_pinctrl.h 
> b/arch/x86/include/asm/intel_pinctrl.h
> index e2524b089d..f39ebde539 100644
> --- a/arch/x86/include/asm/intel_pinctrl.h
> +++ b/arch/x86/include/asm/intel_pinctrl.h
> @@ -263,11 +263,23 @@ int pinctrl_read_pads(struct udevice *dev, ofnode node, 
> const char *prop,
>  int pinctrl_count_pads(struct udevice *dev, u32 *pads, int size);
>  
>  /**
> - * intel_pinctrl_get_config_reg_addr() - Get address of the pin config 
> registers
> + * intel_pinctrl_get_config_reg_offset() - Get offset of pin config registers
>   *
> + * This works out the register offset of a pin within the p2sb region.
> + *
> + * @dev: Pinctrl device
> + * @offset: GPIO offset within this device
> + * @return register offset of first register within the GPIO p2sb region
> + */
> +u32 intel_pinctrl_get_config_reg_offset(struct udevice *dev, uint offset);
> +
> +/**
> + * intel_pinctrl_get_config_reg_offset() - Get address of pin config 
> registers

Copy/Paste error: intel_pinctrl_get_config_reg_addr()

> + *
> + * This works out the absolute address of the registers for a pin
>   * @dev: Pinctrl device
>   * @offset: GPIO offset within this device
> - * @return register offset within the GPIO p2sb region
> + * @return register offset of first register within the GPIO p2sb region

Copy/Paste error: should be address, not offset

>   */
>  u32 intel_pinctrl_get_config_reg_addr(struct udevice *dev, uint offset);

[snip]

Reviewed-by: Wolfgang Wallner

[PATCH v1 17/43] x86: pinctrl: Add a way to get the pinctrl reg address

2020-06-14 Thread Simon Glass 
At present we can query the offset of a pinctrl register within the p2sb.
For ACPI we need to get the actual address of the register. Add a function
to handle this and rename the old one to more accurately reflect its
purpose.

Signed-off-by: Simon Glass 
---

 arch/x86/include/asm/intel_pinctrl.h | 16 ++--
 drivers/gpio/intel_gpio.c| 15 +++
 drivers/misc/p2sb-uclass.c   | 16 
 drivers/pinctrl/intel/pinctrl.c  | 11 +--
 include/p2sb.h   |  9 +
 5 files changed, 51 insertions(+), 16 deletions(-)

diff --git a/arch/x86/include/asm/intel_pinctrl.h 
b/arch/x86/include/asm/intel_pinctrl.h
index e2524b089d..f39ebde539 100644
--- a/arch/x86/include/asm/intel_pinctrl.h
+++ b/arch/x86/include/asm/intel_pinctrl.h
@@ -263,11 +263,23 @@ int pinctrl_read_pads(struct udevice *dev, ofnode node, 
const char *prop,
 int pinctrl_count_pads(struct udevice *dev, u32 *pads, int size);
 
 /**
- * intel_pinctrl_get_config_reg_addr() - Get address of the pin config 
registers
+ * intel_pinctrl_get_config_reg_offset() - Get offset of pin config registers
  *
+ * This works out the register offset of a pin within the p2sb region.
+ *
+ * @dev: Pinctrl device
+ * @offset: GPIO offset within this device
+ * @return register offset of first register within the GPIO p2sb region
+ */
+u32 intel_pinctrl_get_config_reg_offset(struct udevice *dev, uint offset);
+
+/**
+ * intel_pinctrl_get_config_reg_offset() - Get address of pin config registers
+ *
+ * This works out the absolute address of the registers for a pin
  * @dev: Pinctrl device
  * @offset: GPIO offset within this device
- * @return register offset within the GPIO p2sb region
+ * @return register offset of first register within the GPIO p2sb region
  */
 u32 intel_pinctrl_get_config_reg_addr(struct udevice *dev, uint offset);
 
diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c
index 711fea1b58..b4d5be97da 100644
--- a/drivers/gpio/intel_gpio.c
+++ b/drivers/gpio/intel_gpio.c
@@ -24,7 +24,9 @@
 static int intel_gpio_direction_input(struct udevice *dev, uint offset)
 {
struct udevice *pinctrl = dev_get_parent(dev);
-   uint config_offset = intel_pinctrl_get_config_reg_addr(pinctrl, offset);
+   uint config_offset;
+
+   config_offset = intel_pinctrl_get_config_reg_offset(pinctrl, offset);
 
pcr_clrsetbits32(pinctrl, config_offset,
 PAD_CFG0_MODE_MASK | PAD_CFG0_TX_STATE |
@@ -38,7 +40,9 @@ static int intel_gpio_direction_output(struct udevice *dev, 
uint offset,
   int value)
 {
struct udevice *pinctrl = dev_get_parent(dev);
-   uint config_offset = intel_pinctrl_get_config_reg_addr(pinctrl, offset);
+   uint config_offset;
+
+   config_offset = intel_pinctrl_get_config_reg_offset(pinctrl, offset);
 
pcr_clrsetbits32(pinctrl, config_offset,
 PAD_CFG0_MODE_MASK | PAD_CFG0_RX_STATE |
@@ -68,10 +72,13 @@ static int intel_gpio_get_value(struct udevice *dev, uint 
offset)
return 0;
 }
 
-static int intel_gpio_set_value(struct udevice *dev, unsigned offset, int 
value)
+static int intel_gpio_set_value(struct udevice *dev, unsigned int offset,
+   int value)
 {
struct udevice *pinctrl = dev_get_parent(dev);
-   uint config_offset = intel_pinctrl_get_config_reg_addr(pinctrl, offset);
+   uint config_offset;
+
+   config_offset = intel_pinctrl_get_config_reg_offset(pinctrl, offset);
 
pcr_clrsetbits32(pinctrl, config_offset, PAD_CFG0_TX_STATE,
 value ? PAD_CFG0_TX_STATE : 0);
diff --git a/drivers/misc/p2sb-uclass.c b/drivers/misc/p2sb-uclass.c
index 06b1e8d9ad..d5fe12ebd8 100644
--- a/drivers/misc/p2sb-uclass.c
+++ b/drivers/misc/p2sb-uclass.c
@@ -18,7 +18,7 @@
 
 #define PCR_COMMON_IOSF_1_01
 
-static void *_pcr_reg_address(struct udevice *dev, uint offset)
+void *pcr_reg_address(struct udevice *dev, uint offset)
 {
struct p2sb_child_platdata *pplat = dev_get_parent_platdata(dev);
struct udevice *p2sb = dev_get_parent(dev);
@@ -55,7 +55,7 @@ uint pcr_read32(struct udevice *dev, uint offset)
/* Ensure the PCR offset is correctly aligned */
assert(IS_ALIGNED(offset, sizeof(uint32_t)));
 
-   ptr = _pcr_reg_address(dev, offset);
+   ptr = pcr_reg_address(dev, offset);
val = readl(ptr);
unmap_sysmem(ptr);
 
@@ -67,7 +67,7 @@ uint pcr_read16(struct udevice *dev, uint offset)
/* Ensure the PCR offset is correctly aligned */
check_pcr_offset_align(offset, sizeof(uint16_t));
 
-   return readw(_pcr_reg_address(dev, offset));
+   return readw(pcr_reg_address(dev, offset));
 }
 
 uint pcr_read8(struct udevice *dev, uint offset)
@@ -75,7 +75,7 @@ uint pcr_read8(struct udevice *dev, uint offset)
/* Ensure the PCR offset is correctly aligned */