Re: [PATCH v1 u-boot-marvell 5/5] arm: mvebu: turris_mox: fix PCIe ranges in device tree

2020-04-14 Thread Stefan Roese

On 08.04.20 19:25, Marek Behún wrote:

Use the new a3700_fdt_fix_pcie_regions function in turris_mox.c so that
MOX boards with 4 GB RAM are fully supported.

Signed-off-by: Marek Behún 


Reviewed-by: Stefan Roese 

Thanks,
Stefan


---
  board/CZ.NIC/turris_mox/turris_mox.c | 11 +++
  1 file changed, 11 insertions(+)

diff --git a/board/CZ.NIC/turris_mox/turris_mox.c 
b/board/CZ.NIC/turris_mox/turris_mox.c
index 8e4c023103..470ea32f9c 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -4,6 +4,7 @@
   */
  
  #include 

+#include 
  #include 
  #include 
  #include 
@@ -104,6 +105,11 @@ int board_fix_fdt(void *blob)
return 0;
}
  
+	if (a3700_fdt_fix_pcie_regions(blob) < 0) {

+   printf("Cannot fix PCIe regions in U-Boot's device tree!\n");
+   return 0;
+   }
+
return 0;
  }
  #endif
@@ -708,6 +714,11 @@ int ft_board_setup(void *blob, bd_t *bd)
res = fdt_setprop_string(blob, node, "status", "okay");
if (res < 0)
return res;
+
+   /* Fix PCIe regions for devices with 4 GB RAM */
+   res = a3700_fdt_fix_pcie_regions(blob);
+   if (res < 0)
+   return res;
}
  
  	/*





Viele Grüße,
Stefan

--
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[PATCH v1 u-boot-marvell 5/5] arm: mvebu: turris_mox: fix PCIe ranges in device tree

2020-04-08 Thread Marek Behún
Use the new a3700_fdt_fix_pcie_regions function in turris_mox.c so that
MOX boards with 4 GB RAM are fully supported.

Signed-off-by: Marek Behún 
---
 board/CZ.NIC/turris_mox/turris_mox.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/board/CZ.NIC/turris_mox/turris_mox.c 
b/board/CZ.NIC/turris_mox/turris_mox.c
index 8e4c023103..470ea32f9c 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -4,6 +4,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -104,6 +105,11 @@ int board_fix_fdt(void *blob)
return 0;
}
 
+   if (a3700_fdt_fix_pcie_regions(blob) < 0) {
+   printf("Cannot fix PCIe regions in U-Boot's device tree!\n");
+   return 0;
+   }
+
return 0;
 }
 #endif
@@ -708,6 +714,11 @@ int ft_board_setup(void *blob, bd_t *bd)
res = fdt_setprop_string(blob, node, "status", "okay");
if (res < 0)
return res;
+
+   /* Fix PCIe regions for devices with 4 GB RAM */
+   res = a3700_fdt_fix_pcie_regions(blob);
+   if (res < 0)
+   return res;
}
 
/*
-- 
2.24.1