RE: [PATCH v2] arm: dts: Aspeed: add Bletchley dts

2022-01-19 Thread 賴柏廷 
Hi Tom,
Thank you for the reply.
It looks like some of changes are only appeared in openbmc u-boot repo.


Hi Joel,
Could you advise how to send the patch to openbmc u-boot repo? Thank you.

BRs,
Potin
-Original Message-
From: Tom Rini  
Sent: Wednesday, January 19, 2022 1:48 AM
To: Potin Lai (賴柏廷) 
Cc: Albert Aribaud ; Chia-Wei, Wang 
; Dylan Hung ; Klaus 
Heinrich Kiwi ; Joel Stanley ; 
Patrick Williams ; u-boot@lists.denx.de
Subject: Re: [PATCH v2] arm: dts: Aspeed: add Bletchley dts

On Tue, Jan 04, 2022 at 06:03:17PM +0800, Potin Lai wrote:
> Initial introduction of Bletchley equipped with Aspeed 2600 BMC SoC.
> 
> Signed-off-by: Potin Lai 
> Reviewed-by: Patrick Williams 
> ---
> 
> Change since v1:
> - Disable mdio0, mdio1, mdio2
> - Remove mac0, mac1, mac3 (keep disabled)
> - Enable mac2, and set to fixed-link
> ---
>  arch/arm/dts/Makefile  |   3 +-
>  arch/arm/dts/ast2600-bletchley.dts | 285 
> +
>  2 files changed, 287 insertions(+), 1 deletion(-)  create mode 100644 
> arch/arm/dts/ast2600-bletchley.dts
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 
> df844065cd..a172a9f8c6 100755
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -685,7 +685,8 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
>   ast2600-rainier.dtb \
>   ast2600-slt.dtb \
>   ast2600-tacoma.dtb \
> - ast2600-intel.dtb
> + ast2600-intel.dtb \
> + ast2600-bletchley.dtb
>  
>  dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb

Does this depend on other changes that I missed?  We don't have those lines in 
the Makefile today, thanks.

--
Tom

Re: [PATCH v2] arm: dts: Aspeed: add Bletchley dts

2022-01-18 Thread Tom Rini 
On Tue, Jan 04, 2022 at 06:03:17PM +0800, Potin Lai wrote:
> Initial introduction of Bletchley equipped with
> Aspeed 2600 BMC SoC.
> 
> Signed-off-by: Potin Lai 
> Reviewed-by: Patrick Williams 
> ---
> 
> Change since v1:
> - Disable mdio0, mdio1, mdio2
> - Remove mac0, mac1, mac3 (keep disabled)
> - Enable mac2, and set to fixed-link
> ---
>  arch/arm/dts/Makefile  |   3 +-
>  arch/arm/dts/ast2600-bletchley.dts | 285 +
>  2 files changed, 287 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/ast2600-bletchley.dts
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index df844065cd..a172a9f8c6 100755
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -685,7 +685,8 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
>   ast2600-rainier.dtb \
>   ast2600-slt.dtb \
>   ast2600-tacoma.dtb \
> - ast2600-intel.dtb
> + ast2600-intel.dtb \
> + ast2600-bletchley.dtb
>  
>  dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb

Does this depend on other changes that I missed?  We don't have those
lines in the Makefile today, thanks.

-- 
Tom


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Re: [PATCH v2] arm: dts: Aspeed: add Bletchley dts

2022-01-05 Thread Patrick Williams 
On Tue, Jan 04, 2022 at 06:03:17PM +0800, Potin Lai wrote:
> Initial introduction of Bletchley equipped with
> Aspeed 2600 BMC SoC.
> 
> Signed-off-by: Potin Lai 
> 
> ---
> 
> Change since v1:
> - Disable mdio0, mdio1, mdio2
> - Remove mac0, mac1, mac3 (keep disabled)
> - Enable mac2, and set to fixed-link
> ---
>  arch/arm/dts/Makefile  |   3 +-
>  arch/arm/dts/ast2600-bletchley.dts | 285 +
>  2 files changed, 287 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/ast2600-bletchley.dts
> 

Reviewed-by: Patrick Williams 

-- 
Patrick Williams


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[PATCH v2] arm: dts: Aspeed: add Bletchley dts

2022-01-04 Thread Potin Lai 
Initial introduction of Bletchley equipped with
Aspeed 2600 BMC SoC.

Signed-off-by: Potin Lai 

---

Change since v1:
- Disable mdio0, mdio1, mdio2
- Remove mac0, mac1, mac3 (keep disabled)
- Enable mac2, and set to fixed-link
---
 arch/arm/dts/Makefile  |   3 +-
 arch/arm/dts/ast2600-bletchley.dts | 285 +
 2 files changed, 287 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/ast2600-bletchley.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index df844065cd..a172a9f8c6 100755
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -685,7 +685,8 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
ast2600-rainier.dtb \
ast2600-slt.dtb \
ast2600-tacoma.dtb \
-   ast2600-intel.dtb
+   ast2600-intel.dtb \
+   ast2600-bletchley.dtb
 
 dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
 
diff --git a/arch/arm/dts/ast2600-bletchley.dts 
b/arch/arm/dts/ast2600-bletchley.dts
new file mode 100644
index 00..ec14898400
--- /dev/null
+++ b/arch/arm/dts/ast2600-bletchley.dts
@@ -0,0 +1,285 @@
+/dts-v1/;
+
+#include "ast2600-u-boot.dtsi"
+
+/ {
+model = "AST2600 EVB";
+compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
+
+   memory {
+   device_type = "memory";
+   reg = <0x8000 0x4000>;
+   };
+
+   chosen {
+   stdout-path = 
+   };
+
+   aliases {
+   mmc0 = _slot0;
+   mmc1 = _slot0;
+   mmc2 = _slot1;
+   spi0 = 
+   spi1 = 
+   spi2 = 
+   ethernet0 = 
+   ethernet1 = 
+   ethernet2 = 
+   ethernet3 = 
+   };
+
+   cpus {
+   cpu@0 {
+   clock-frequency = <8>;
+   };
+   cpu@1 {
+   clock-frequency = <8>;
+   };
+   };
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   status = "okay";
+};
+
+ {
+   clock-frequency = <4>;
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   pinctrl-names = "default";
+   pinctrl-0 = <_mdio4_default>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+};
+
+ {
+   status = "okay";
+   phy-mode = "rgmii";
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii3_default _mac3link_default>;
+   fixed-link {
+   speed = <1000>;
+   full-duplex;
+   };
+};
+
+ {
+   status = "okay";
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_fmcquad_default>;
+
+   flash@0 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <2>;
+   spi-rx-bus-width = <2>;
+   };
+
+   flash@1 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <2>;
+   spi-rx-bus-width = <2>;
+   };
+
+   flash@2 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <2>;
+   spi-rx-bus-width = <2>;
+   };
+};
+
+ {
+   status = "okay";
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_spi1_default _spi1abr_default
+   _spi1cs1_default _spi1wp_default
+   _spi1wp_default _spi1quad_default>;
+
+   flash@0 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <4>;
+   spi-rx-bus-width = <4>;
+   };
+
+   flash@1 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <4>;
+   spi-rx-bus-width = <4>;
+   };
+};
+
+ {
+   status = "okay";
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_spi2_default _spi2cs1_default
+   _spi2cs2_default _spi2quad_default>;
+
+   flash@0 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <4>;
+   spi-rx-bus-width = <4>;
+   };
+
+   flash@1 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+   spi-max-frequency = <5000>;
+   spi-tx-bus-width = <4>;
+   spi-rx-bus-width = <4>;
+   };
+
+   flash@2 {
+   compatible = "spi-flash", "sst,w25q256";
+   status = "okay";
+