Enable OF_UPSTREAM for AM64-EVM and SK-AM64 boards. Remove DT files that
are now available in dts/upstream. Update the appended files based on
version of latest OF_UPSTREAM sync point (v6.7-rc7).
Signed-off-by: Andrew Davis
---
Changes for v2:
- Rebased on latest -next to fix merge conflict
As suggested here[0].
[0] https://lore.kernel.org/all/20240304170814.GP1523872@bill-the-cat/
arch/arm/dts/Makefile |4 +-
arch/arm/dts/k3-am64-main.dtsi| 1546 -
arch/arm/dts/k3-am64-mcu.dtsi | 161 ---
arch/arm/dts/k3-am64-thermal.dtsi | 33 -
arch/arm/dts/k3-am64.dtsi | 100 --
arch/arm/dts/k3-am642-evm-u-boot.dtsi | 110 --
arch/arm/dts/k3-am642-evm.dts | 690 ---
arch/arm/dts/k3-am642-r5-evm.dts | 24 -
arch/arm/dts/k3-am642-r5-sk.dts | 12 -
arch/arm/dts/k3-am642-sk-u-boot.dtsi | 94 --
arch/arm/dts/k3-am642-sk.dts | 642 --
arch/arm/dts/k3-am642.dtsi| 66 --
arch/arm/dts/k3-am64x-binman.dtsi |6 +-
configs/am64x_evm_a53_defconfig |5 +-
14 files changed, 7 insertions(+), 3486 deletions(-)
delete mode 100644 arch/arm/dts/k3-am64-main.dtsi
delete mode 100644 arch/arm/dts/k3-am64-mcu.dtsi
delete mode 100644 arch/arm/dts/k3-am64-thermal.dtsi
delete mode 100644 arch/arm/dts/k3-am64.dtsi
delete mode 100644 arch/arm/dts/k3-am642-evm.dts
delete mode 100644 arch/arm/dts/k3-am642-sk.dts
delete mode 100644 arch/arm/dts/k3-am642.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 971a4065faf..b97ff3b07ea 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1417,9 +1417,7 @@ dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-base-board.dtb\
dtb-$(CONFIG_SOC_K3_J784S4) += k3-am69-r5-sk.dtb \
k3-j784s4-r5-evm.dtb
-dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \
- k3-am642-r5-evm.dtb \
- k3-am642-sk.dtb \
+dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-r5-evm.dtb \
k3-am642-r5-sk.dtb
dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \
diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
deleted file mode 100644
index 0df54a74182..000
--- a/arch/arm/dts/k3-am64-main.dtsi
+++ /dev/null
@@ -1,1546 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source for AM642 SoC Family Main Domain peripherals
- *
- * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
- */
-
-#include
-#include
-
-/ {
- serdes_refclk: clock-cmnrefclk {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <0>;
- };
-};
-
-&cbass_main {
- oc_sram: sram@7000 {
- compatible = "mmio-sram";
- reg = <0x00 0x7000 0x00 0x20>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x00 0x7000 0x20>;
-
- tfa-sram@1c {
- reg = <0x1c 0x2>;
- };
-
- dmsc-sram@1e {
- reg = <0x1e 0x1c000>;
- };
-
- sproxy-sram@1fc000 {
- reg = <0x1fc000 0x4000>;
- };
- };
-
- main_conf: syscon@4300 {
- compatible = "ti,j721e-system-controller", "syscon",
"simple-mfd";
- reg = <0x0 0x4300 0x0 0x2>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0x0 0x4300 0x2>;
-
- chipid@14 {
- compatible = "ti,am654-chipid";
- reg = <0x0014 0x4>;
- };
-
- serdes_ln_ctrl: mux-controller {
- compatible = "mmio-mux";
- #mux-control-cells = <1>;
- mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
- };
-
- phy_gmii_sel: phy@4044 {
- compatible = "ti,am654-phy-gmii-sel";
- reg = <0x4044 0x8>;
- #phy-cells = <1>;
- };
-
- epwm_tbclk: clock-controller@4140 {
- compatible = "ti,am64-epwm-tbclk";
- reg = <0x4130 0x4>;
- #clock-cells = <1>;
- };
- };
-
- gic500: interrupt-controller@180 {
- compatible = "arm,gic-v3";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0x00 0x0180 0x00 0x1>, /* GICD */
- <0x00 0x0184 0x00 0xC>, /* GICR */
- <0x01 0x 0x00 0x2000>,/* GICC */
-
