Re: [PATCH v2] mmc: rockchip_sdhci: Fix 4 blocks PIO mode read limit for RK35xx
On 2024/4/10 22:30, Jonas Karlman wrote:
The commit 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") introduced a limit of number of blocks to
read to fix a Data End Bit Error on RK3568 and RK3588. This had a side
affect of significant slowing down reading FIT from eMMC.
After the commit 6de9d7b2f13c ("rockchip: rk35xx: Enable eMMC HS200 mode
by default") the limit of number of blocks to read workaround is no
longer necessary and at HS200+ a Data End Bit Error is no longer
happening using PIO mode.
Change this limitation to allow reading more than 4 blocks with a single
CMD18 command in PIO mode at HS200+ speed, keep using the 4 blocks
limitation when loadig FIT from eMMC at lower speed than HS200.
Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a single
command")
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2: Move cfg->b_max configuration to set_ios_post() ops
This significantly speed up FIT loading from eMMC on RK3588 boards with
a mmc-hs200 prop in the sdhci node, and boards without a mmc-hs200 prop
continue to work.
---
drivers/mmc/rockchip_sdhci.c | 26 --
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 706fb1235796..c889c7bc9855 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -391,6 +391,8 @@ static int rk3568_sdhci_config_dll(struct sdhci_host *host,
u32 clock, bool enab
static int rk3568_sdhci_set_ios_post(struct sdhci_host *host)
{
struct mmc *mmc = host->mmc;
+ struct rockchip_sdhc_plat *plat = dev_get_plat(mmc->dev);
+ struct mmc_config *cfg = >cfg;
u32 reg;
reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
@@ -437,6 +439,20 @@ static int rk3568_sdhci_set_ios_post(struct sdhci_host
*host)
sdhci_writew(host, reg, DWCMSHC_EMMC_EMMC_CTRL);
+ /*
+* Reading more than 4 blocks with a single CMD18 command in PIO mode
+* triggers Data End Bit Error using a slower mode than HS200. Limit to
+* reading max 4 blocks in one command when using PIO mode.
+*/
+ if (!(host->flags & USE_DMA)) {
+ if (mmc->selected_mode == MMC_HS_200 ||
+ mmc->selected_mode == MMC_HS_400 ||
+ mmc->selected_mode == MMC_HS_400_ES)
+ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+ else
+ cfg->b_max = 4;
+ }
+
return 0;
}
@@ -598,16 +614,6 @@ static int rockchip_sdhci_probe(struct udevice *dev)
dev_read_bool(dev, "u-boot,spl-fifo-mode"))
host->flags &= ~USE_DMA;
- /*
-* Reading more than 4 blocks with a single CMD18 command in PIO mode
-* triggers Data End Bit Error on RK3568 and RK3588. Limit to reading
-* max 4 blocks in one command when using PIO mode.
-*/
- if (!(host->flags & USE_DMA) &&
- (device_is_compatible(dev, "rockchip,rk3568-dwcmshc") ||
-device_is_compatible(dev, "rockchip,rk3588-dwcmshc")))
- cfg->b_max = 4;
-
return sdhci_probe(dev);
}
Re: [PATCH v2] mmc: rockchip_sdhci: Fix 4 blocks PIO mode read limit for RK35xx
On 2024-04-10 16:30, Jonas Karlman wrote:
The commit 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") introduced a limit of number of blocks to
read to fix a Data End Bit Error on RK3568 and RK3588. This had a side
affect of significant slowing down reading FIT from eMMC.
After the commit 6de9d7b2f13c ("rockchip: rk35xx: Enable eMMC HS200
mode
by default") the limit of number of blocks to read workaround is no
longer necessary and at HS200+ a Data End Bit Error is no longer
happening using PIO mode.
Change this limitation to allow reading more than 4 blocks with a
single
CMD18 command in PIO mode at HS200+ speed, keep using the 4 blocks
limitation when loadig FIT from eMMC at lower speed than HS200.
Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read
in a single command")
Signed-off-by: Jonas Karlman
Looking good to me. Thanks for peforming this dynamically, based
on the actual MMC interface speed/mode.
Reviewed-by: Dragan Simic
---
v2: Move cfg->b_max configuration to set_ios_post() ops
This significantly speed up FIT loading from eMMC on RK3588 boards with
a mmc-hs200 prop in the sdhci node, and boards without a mmc-hs200 prop
continue to work.
---
drivers/mmc/rockchip_sdhci.c | 26 --
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/rockchip_sdhci.c
b/drivers/mmc/rockchip_sdhci.c
index 706fb1235796..c889c7bc9855 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -391,6 +391,8 @@ static int rk3568_sdhci_config_dll(struct
sdhci_host *host, u32 clock, bool enab
static int rk3568_sdhci_set_ios_post(struct sdhci_host *host)
{
struct mmc *mmc = host->mmc;
+ struct rockchip_sdhc_plat *plat = dev_get_plat(mmc->dev);
+ struct mmc_config *cfg = >cfg;
u32 reg;
reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
@@ -437,6 +439,20 @@ static int rk3568_sdhci_set_ios_post(struct
sdhci_host *host)
sdhci_writew(host, reg, DWCMSHC_EMMC_EMMC_CTRL);
+ /*
+* Reading more than 4 blocks with a single CMD18 command in PIO mode
+ * triggers Data End Bit Error using a slower mode than HS200. Limit
to
+* reading max 4 blocks in one command when using PIO mode.
+*/
+ if (!(host->flags & USE_DMA)) {
+ if (mmc->selected_mode == MMC_HS_200 ||
+ mmc->selected_mode == MMC_HS_400 ||
+ mmc->selected_mode == MMC_HS_400_ES)
+ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+ else
+ cfg->b_max = 4;
+ }
+
return 0;
}
@@ -598,16 +614,6 @@ static int rockchip_sdhci_probe(struct udevice
*dev)
dev_read_bool(dev, "u-boot,spl-fifo-mode"))
host->flags &= ~USE_DMA;
- /*
-* Reading more than 4 blocks with a single CMD18 command in PIO mode
-* triggers Data End Bit Error on RK3568 and RK3588. Limit to reading
-* max 4 blocks in one command when using PIO mode.
-*/
- if (!(host->flags & USE_DMA) &&
- (device_is_compatible(dev, "rockchip,rk3568-dwcmshc") ||
-device_is_compatible(dev, "rockchip,rk3588-dwcmshc")))
- cfg->b_max = 4;
-
return sdhci_probe(dev);
}
[PATCH v2] mmc: rockchip_sdhci: Fix 4 blocks PIO mode read limit for RK35xx
The commit 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") introduced a limit of number of blocks to
read to fix a Data End Bit Error on RK3568 and RK3588. This had a side
affect of significant slowing down reading FIT from eMMC.
After the commit 6de9d7b2f13c ("rockchip: rk35xx: Enable eMMC HS200 mode
by default") the limit of number of blocks to read workaround is no
longer necessary and at HS200+ a Data End Bit Error is no longer
happening using PIO mode.
Change this limitation to allow reading more than 4 blocks with a single
CMD18 command in PIO mode at HS200+ speed, keep using the 4 blocks
limitation when loadig FIT from eMMC at lower speed than HS200.
Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a
single command")
Signed-off-by: Jonas Karlman
---
v2: Move cfg->b_max configuration to set_ios_post() ops
This significantly speed up FIT loading from eMMC on RK3588 boards with
a mmc-hs200 prop in the sdhci node, and boards without a mmc-hs200 prop
continue to work.
---
drivers/mmc/rockchip_sdhci.c | 26 --
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 706fb1235796..c889c7bc9855 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -391,6 +391,8 @@ static int rk3568_sdhci_config_dll(struct sdhci_host *host,
u32 clock, bool enab
static int rk3568_sdhci_set_ios_post(struct sdhci_host *host)
{
struct mmc *mmc = host->mmc;
+ struct rockchip_sdhc_plat *plat = dev_get_plat(mmc->dev);
+ struct mmc_config *cfg = >cfg;
u32 reg;
reg = sdhci_readw(host, SDHCI_HOST_CONTROL2);
@@ -437,6 +439,20 @@ static int rk3568_sdhci_set_ios_post(struct sdhci_host
*host)
sdhci_writew(host, reg, DWCMSHC_EMMC_EMMC_CTRL);
+ /*
+* Reading more than 4 blocks with a single CMD18 command in PIO mode
+* triggers Data End Bit Error using a slower mode than HS200. Limit to
+* reading max 4 blocks in one command when using PIO mode.
+*/
+ if (!(host->flags & USE_DMA)) {
+ if (mmc->selected_mode == MMC_HS_200 ||
+ mmc->selected_mode == MMC_HS_400 ||
+ mmc->selected_mode == MMC_HS_400_ES)
+ cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+ else
+ cfg->b_max = 4;
+ }
+
return 0;
}
@@ -598,16 +614,6 @@ static int rockchip_sdhci_probe(struct udevice *dev)
dev_read_bool(dev, "u-boot,spl-fifo-mode"))
host->flags &= ~USE_DMA;
- /*
-* Reading more than 4 blocks with a single CMD18 command in PIO mode
-* triggers Data End Bit Error on RK3568 and RK3588. Limit to reading
-* max 4 blocks in one command when using PIO mode.
-*/
- if (!(host->flags & USE_DMA) &&
- (device_is_compatible(dev, "rockchip,rk3568-dwcmshc") ||
-device_is_compatible(dev, "rockchip,rk3588-dwcmshc")))
- cfg->b_max = 4;
-
return sdhci_probe(dev);
}
--
2.43.2
