Re: [PATCH v2 10/22] sunxi: introduce NCAT2 generation model

2023-10-21 Thread Samuel Holland
Hi Andre,

On 9/28/23 16:54, Andre Przywara wrote:
> Allwinner seems to typically stick to a common MMIO memory map for
> several SoCs, but from time to time does some breaking changes, which
> also introduce new generations of some peripherals. The last time this
> happened with the H6, which apart from re-organising the base addresses
> also changed the clock controller significantly. We added a
> CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits.
> 
> Now the Allwinner D1 changes the memory map again, and also extends the
> pincontroller, among other peripherals.
> To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol,
> this name is reportedly used in the Allwinner BSP code, and prevents us
> from inventing our own name.
> 
> Add this new symbol to some guards that were already checking for the H6
> generation, since many features are shared between the two (like the
> renovated clock controller).
> 
> This paves the way to introduce a first user of this generation.
> 
> Signed-off-by: Andre Przywara 
> ---
>  arch/arm/include/asm/arch-sunxi/clock.h   |  2 +-
>  arch/arm/include/asm/arch-sunxi/cpu.h |  2 +
>  .../include/asm/arch-sunxi/cpu_sunxi_ncat2.h  | 43 +++
>  arch/arm/include/asm/arch-sunxi/mmc.h |  2 +-
>  arch/arm/include/asm/arch-sunxi/prcm.h|  2 +-
>  arch/arm/include/asm/arch-sunxi/timer.h   |  2 +-
>  arch/arm/mach-sunxi/Kconfig   | 12 +-
>  arch/arm/mach-sunxi/Makefile  |  1 +
>  arch/arm/mach-sunxi/board.c   | 22 ++
>  arch/arm/mach-sunxi/clock_sun50i_h6.c |  7 ++-
>  common/spl/Kconfig|  2 +-
>  drivers/i2c/mvtwsi.c  |  3 +-
>  drivers/mmc/sunxi_mmc.c   |  7 +--
>  include/sunxi_gpio.h  |  3 ++
>  14 files changed, 90 insertions(+), 20 deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h
> 
> diff --git a/arch/arm/include/asm/arch-sunxi/clock.h 
> b/arch/arm/include/asm/arch-sunxi/clock.h
> index 2cfd5407423..3d34261b0e5 100644
> --- a/arch/arm/include/asm/arch-sunxi/clock.h
> +++ b/arch/arm/include/asm/arch-sunxi/clock.h
> @@ -16,7 +16,7 @@
>  /* clock control module regs definition */
>  #if defined(CONFIG_MACH_SUN8I_A83T)
>  #include 
> -#elif defined(CONFIG_SUN50I_GEN_H6)
> +#elif defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_SUNXI_GEN_NCAT2)
>  #include 
>  #elif defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I) || \
>defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUNIV)
> diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h 
> b/arch/arm/include/asm/arch-sunxi/cpu.h
> index b08f2023748..768c6572d6b 100644
> --- a/arch/arm/include/asm/arch-sunxi/cpu.h
> +++ b/arch/arm/include/asm/arch-sunxi/cpu.h
> @@ -10,6 +10,8 @@
>  #include 
>  #elif defined(CONFIG_SUN50I_GEN_H6)
>  #include 
> +#elif defined(CONFIG_SUNXI_GEN_NCAT2)
> +#include 
>  #else
>  #include 
>  #endif
> diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h 
> b/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h
> new file mode 100644
> index 000..ca92c39927d
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h
> @@ -0,0 +1,43 @@
> +/*
> + * (C) Copyright 2022 Arm Limited
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#ifndef _SUNXI_CPU_SUNXI_NCAT2_H
> +#define _SUNXI_CPU_SUNXI_NCAT2_H
> +
> +#define SUNXI_CCM_BASE   0x02001000
> +#define SUNXI_TIMER_BASE 0x0205
> +
> +#define SUNXI_UART0_BASE 0x0250
> +#define SUNXI_UART1_BASE 0x02500400
> +#define SUNXI_UART2_BASE 0x02500800
> +#define SUNXI_UART3_BASE 0x02500C00
> +#define SUNXI_TWI0_BASE  0x02502000
> +#define SUNXI_TWI1_BASE  0x02502400
> +#define SUNXI_TWI2_BASE  0x02502800
> +#define SUNXI_TWI3_BASE  0x02502C00
> +
> +#define SUNXI_SRAMC_BASE 0x0300
> +/* SID address space starts at 0x03006000, but e-fuse is at offset 0x200 */
> +#define SUNXI_SIDC_BASE  0x03006000
> +#define SUNXI_SID_BASE   0x03006200
> +#define SUNXI_GIC400_BASE0x0302
> +
> +#define SUNXI_MMC0_BASE  0x0402
> +#define SUNXI_MMC1_BASE  0x04021000
> +#define SUNXI_MMC2_BASE  0x04022000
> +
> +#define SUNXI_R_CPUCFG_BASE  0x07000400
> +#define SUNXI_PRCM_BASE  0x0701
> +
> +#define SUNXI_CPUCFG_BASE0x0901
> +
> +#ifndef __ASSEMBLY__
> +void sunxi_board_init(void);
> +void sunxi_reset(void);
> +int sunxi_get_sid(unsigned int *sid);
> +#endif
> +
> +#endif /* _SUNXI_CPU_SUNXI_NCAT2_H */
> diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h 
> b/arch/arm/include/asm/arch-sunxi/mmc.h
> index 5daacf10eb1..8ed3e045

[PATCH v2 10/22] sunxi: introduce NCAT2 generation model

2023-09-28 Thread Andre Przywara
Allwinner seems to typically stick to a common MMIO memory map for
several SoCs, but from time to time does some breaking changes, which
also introduce new generations of some peripherals. The last time this
happened with the H6, which apart from re-organising the base addresses
also changed the clock controller significantly. We added a
CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits.

Now the Allwinner D1 changes the memory map again, and also extends the
pincontroller, among other peripherals.
To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol,
this name is reportedly used in the Allwinner BSP code, and prevents us
from inventing our own name.

Add this new symbol to some guards that were already checking for the H6
generation, since many features are shared between the two (like the
renovated clock controller).

This paves the way to introduce a first user of this generation.

Signed-off-by: Andre Przywara 
---
 arch/arm/include/asm/arch-sunxi/clock.h   |  2 +-
 arch/arm/include/asm/arch-sunxi/cpu.h |  2 +
 .../include/asm/arch-sunxi/cpu_sunxi_ncat2.h  | 43 +++
 arch/arm/include/asm/arch-sunxi/mmc.h |  2 +-
 arch/arm/include/asm/arch-sunxi/prcm.h|  2 +-
 arch/arm/include/asm/arch-sunxi/timer.h   |  2 +-
 arch/arm/mach-sunxi/Kconfig   | 12 +-
 arch/arm/mach-sunxi/Makefile  |  1 +
 arch/arm/mach-sunxi/board.c   | 22 ++
 arch/arm/mach-sunxi/clock_sun50i_h6.c |  7 ++-
 common/spl/Kconfig|  2 +-
 drivers/i2c/mvtwsi.c  |  3 +-
 drivers/mmc/sunxi_mmc.c   |  7 +--
 include/sunxi_gpio.h  |  3 ++
 14 files changed, 90 insertions(+), 20 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h

diff --git a/arch/arm/include/asm/arch-sunxi/clock.h 
b/arch/arm/include/asm/arch-sunxi/clock.h
index 2cfd5407423..3d34261b0e5 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -16,7 +16,7 @@
 /* clock control module regs definition */
 #if defined(CONFIG_MACH_SUN8I_A83T)
 #include 
-#elif defined(CONFIG_SUN50I_GEN_H6)
+#elif defined(CONFIG_SUN50I_GEN_H6) || defined(CONFIG_SUNXI_GEN_NCAT2)
 #include 
 #elif defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I) || \
   defined(CONFIG_MACH_SUN50I) || defined(CONFIG_MACH_SUNIV)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h 
b/arch/arm/include/asm/arch-sunxi/cpu.h
index b08f2023748..768c6572d6b 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu.h
@@ -10,6 +10,8 @@
 #include 
 #elif defined(CONFIG_SUN50I_GEN_H6)
 #include 
+#elif defined(CONFIG_SUNXI_GEN_NCAT2)
+#include 
 #else
 #include 
 #endif
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h 
b/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h
new file mode 100644
index 000..ca92c39927d
--- /dev/null
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sunxi_ncat2.h
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2022 Arm Limited
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _SUNXI_CPU_SUNXI_NCAT2_H
+#define _SUNXI_CPU_SUNXI_NCAT2_H
+
+#define SUNXI_CCM_BASE 0x02001000
+#define SUNXI_TIMER_BASE   0x0205
+
+#define SUNXI_UART0_BASE   0x0250
+#define SUNXI_UART1_BASE   0x02500400
+#define SUNXI_UART2_BASE   0x02500800
+#define SUNXI_UART3_BASE   0x02500C00
+#define SUNXI_TWI0_BASE0x02502000
+#define SUNXI_TWI1_BASE0x02502400
+#define SUNXI_TWI2_BASE0x02502800
+#define SUNXI_TWI3_BASE0x02502C00
+
+#define SUNXI_SRAMC_BASE   0x0300
+/* SID address space starts at 0x03006000, but e-fuse is at offset 0x200 */
+#define SUNXI_SIDC_BASE0x03006000
+#define SUNXI_SID_BASE 0x03006200
+#define SUNXI_GIC400_BASE  0x0302
+
+#define SUNXI_MMC0_BASE0x0402
+#define SUNXI_MMC1_BASE0x04021000
+#define SUNXI_MMC2_BASE0x04022000
+
+#define SUNXI_R_CPUCFG_BASE0x07000400
+#define SUNXI_PRCM_BASE0x0701
+
+#define SUNXI_CPUCFG_BASE  0x0901
+
+#ifndef __ASSEMBLY__
+void sunxi_board_init(void);
+void sunxi_reset(void);
+int sunxi_get_sid(unsigned int *sid);
+#endif
+
+#endif /* _SUNXI_CPU_SUNXI_NCAT2_H */
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h 
b/arch/arm/include/asm/arch-sunxi/mmc.h
index 5daacf10eb1..8ed3e0459c9 100644
--- a/arch/arm/include/asm/arch-sunxi/mmc.h
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -45,7 +45,7 @@ struct sunxi_mmc {
u32 chda;   /* 0x90 */
u32 cbda;   /* 0x94 */
u32 res2[26];
-#if defined(CONFIG