Re: [PATCH v2 3/4] arm: mach-k3: Remove non-cached memory map areas

2023-12-15 Thread Tom Rini
On Tue, Nov 28, 2023 at 11:05:27AM -0600, Andrew Davis wrote:

> All normal memory areas should be mapped as such.
> 
> We added these un-cached holes in our memory map to hack around the
> remoteproc driver missing the proper cache maintenance operations.
> 
> The problem is having these non-cached memory map areas causes stability
> issues later in system operation due to the nature of the K3 coherency
> architecture. Plus these are board specific carveouts and instead
> should have been added at the board level, not here in the SoC common
> code area.
> 
> Remove these non-cached memory map areas.
> 
> Signed-off-by: Andrew Davis 
> Reviewed-by: Nishanth Menon 
> Tested-by: Nishanth Menon 

Applied to u-boot/next, thanks!

-- 
Tom


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[PATCH v2 3/4] arm: mach-k3: Remove non-cached memory map areas

2023-11-28 Thread Andrew Davis
All normal memory areas should be mapped as such.

We added these un-cached holes in our memory map to hack around the
remoteproc driver missing the proper cache maintenance operations.

The problem is having these non-cached memory map areas causes stability
issues later in system operation due to the nature of the K3 coherency
architecture. Plus these are board specific carveouts and instead
should have been added at the board level, not here in the SoC common
code area.

Remove these non-cached memory map areas.

Signed-off-by: Andrew Davis 
Reviewed-by: Nishanth Menon 
Tested-by: Nishanth Menon 
---
 arch/arm/mach-k3/arm64-mmu.c | 30 +++---
 1 file changed, 3 insertions(+), 27 deletions(-)

diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index 5c858ae0f84..2c2d75d3f41 100644
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64-mmu.c
@@ -30,13 +30,7 @@ struct mm_region am654_mem_map[] = {
}, {
.virt = 0xa000UL,
.phys = 0xa000UL,
-   .size = 0x0210UL,
-   .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
-PTE_BLOCK_INNER_SHARE
-   }, {
-   .virt = 0xa210UL,
-   .phys = 0xa210UL,
-   .size = 0x5df0UL,
+   .size = 0x6000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 PTE_BLOCK_INNER_SHARE
}, {
@@ -81,13 +75,7 @@ struct mm_region j7200_mem_map[] = {
}, {
.virt = 0xa000UL,
.phys = 0xa000UL,
-   .size = 0x0480UL,
-   .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
-PTE_BLOCK_NON_SHARE
-   }, {
-   .virt = 0xa480UL,
-   .phys = 0xa480UL,
-   .size = 0x5b80UL,
+   .size = 0x6000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 PTE_BLOCK_INNER_SHARE
}, {
@@ -129,13 +117,7 @@ struct mm_region j721e_mem_map[] = {
}, {
.virt = 0xa000UL,
.phys = 0xa000UL,
-   .size = 0x1bc0UL,
-   .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
-PTE_BLOCK_NON_SHARE
-   }, {
-   .virt = 0xbbc0UL,
-   .phys = 0xbbc0UL,
-   .size = 0x4440UL,
+   .size = 0x6000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 PTE_BLOCK_INNER_SHARE
}, {
@@ -151,12 +133,6 @@ struct mm_region j721e_mem_map[] = {
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
 PTE_BLOCK_NON_SHARE |
 PTE_BLOCK_PXN | PTE_BLOCK_UXN
-   }, {
-   .virt = 0x4d8000UL,
-   .phys = 0x4d8000UL,
-   .size = 0x000200UL,
-   .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
-PTE_BLOCK_INNER_SHARE
}, {
/* List terminator */
0,
-- 
2.39.2