Re: [PATCH v4 07/10] arm64: dts: rockchip: add rk3588 pcie and php IOMMUs

2024-06-06 Thread Kever Yang 



On 2024/5/29 01:04, Jianfeng Liu wrote:

From: Niklas Cassel 

The mmu600_pcie is connected with the five PCIe controllers.
The mmu600_php is connected with the USB3 controller, the GMAC
controllers, and the SATA controllers.

See 8.2 Block Diagram, in rk3588 TRM (Technical Reference Manual).

The IOMMUs are disabled by default, as further patches are needed to
program the SID/SSIDs in to the IOMMUs.

iommu: Default domain type: Translated
iommu: DMA domain TLB invalidation policy: strict mode
arm-smmu-v3 fc90.iommu: ias 48-bit, oas 48-bit (features 0x001c1eaf)
arm-smmu-v3 fc90.iommu: allocated 65536 entries for cmdq
arm-smmu-v3 fc90.iommu: allocated 32768 entries for evtq
arm-smmu-v3 fc90.iommu: msi_domain absent - falling back to wired irqs

Additionally, the IOMMU correctly triggers an IOMMU fault when
a PCIe device performs a write (since the device hasn't been
assigned a SID/SSID):
arm-smmu-v3 fc90.iommu: event 0x02 received:
arm-smmu-v3 fc90.iommu:  0x0102
arm-smmu-v3 fc90.iommu:  0x
arm-smmu-v3 fc90.iommu:  0x
arm-smmu-v3 fc90.iommu:  0x

While this doesn't provide much value as is, having the devices as
disabled in the device tree will allow developers to see that the rk3588
actually has IOMMUs on the SoC.

Signed-off-by: Niklas Cassel 
Link: https://lore.kernel.org/r/20240502140231.477049-2-cas...@kernel.org
Signed-off-by: Heiko Stuebner 

[ upstream commit: cd81d3a0695cc54ad6ac0ef4bbb67a7c8f55d592 ]

(cherry picked from commit ea9a34aa0d786cbf4b87f1ba528e69b07219738f)
Signed-off-by: Jianfeng Liu 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---

(no changes since v1)

  dts/upstream/src/arm64/rockchip/rk3588s.dtsi | 24 
  1 file changed, 24 insertions(+)

diff --git a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi 
b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
index b0a59ec5183..6ac5ac8b48a 100644
--- a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
+++ b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
@@ -579,6 +579,30 @@
status = "disabled";
};
  
+	mmu600_pcie: iommu@fc90 {

+   compatible = "arm,smmu-v3";
+   reg = <0x0 0xfc90 0x0 0x20>;
+   interrupts = ,
+,
+,
+;
+   interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
+   #iommu-cells = <1>;
+   status = "disabled";
+   };
+
+   mmu600_php: iommu@fcb0 {
+   compatible = "arm,smmu-v3";
+   reg = <0x0 0xfcb0 0x0 0x20>;
+   interrupts = ,
+,
+,
+;
+   interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
+   #iommu-cells = <1>;
+   status = "disabled";
+   };
+
pmu1grf: syscon@fd58a000 {
compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xfd58a000 0x0 0x1>;

[PATCH v4 07/10] arm64: dts: rockchip: add rk3588 pcie and php IOMMUs

2024-05-28 Thread Jianfeng Liu 
From: Niklas Cassel 

The mmu600_pcie is connected with the five PCIe controllers.
The mmu600_php is connected with the USB3 controller, the GMAC
controllers, and the SATA controllers.

See 8.2 Block Diagram, in rk3588 TRM (Technical Reference Manual).

The IOMMUs are disabled by default, as further patches are needed to
program the SID/SSIDs in to the IOMMUs.

iommu: Default domain type: Translated
iommu: DMA domain TLB invalidation policy: strict mode
arm-smmu-v3 fc90.iommu: ias 48-bit, oas 48-bit (features 0x001c1eaf)
arm-smmu-v3 fc90.iommu: allocated 65536 entries for cmdq
arm-smmu-v3 fc90.iommu: allocated 32768 entries for evtq
arm-smmu-v3 fc90.iommu: msi_domain absent - falling back to wired irqs

Additionally, the IOMMU correctly triggers an IOMMU fault when
a PCIe device performs a write (since the device hasn't been
assigned a SID/SSID):
arm-smmu-v3 fc90.iommu: event 0x02 received:
arm-smmu-v3 fc90.iommu:  0x0102
arm-smmu-v3 fc90.iommu:  0x
arm-smmu-v3 fc90.iommu:  0x
arm-smmu-v3 fc90.iommu:  0x

While this doesn't provide much value as is, having the devices as
disabled in the device tree will allow developers to see that the rk3588
actually has IOMMUs on the SoC.

Signed-off-by: Niklas Cassel 
Link: https://lore.kernel.org/r/20240502140231.477049-2-cas...@kernel.org
Signed-off-by: Heiko Stuebner 

[ upstream commit: cd81d3a0695cc54ad6ac0ef4bbb67a7c8f55d592 ]

(cherry picked from commit ea9a34aa0d786cbf4b87f1ba528e69b07219738f)
Signed-off-by: Jianfeng Liu 
---

(no changes since v1)

 dts/upstream/src/arm64/rockchip/rk3588s.dtsi | 24 
 1 file changed, 24 insertions(+)

diff --git a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi 
b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
index b0a59ec5183..6ac5ac8b48a 100644
--- a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
+++ b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
@@ -579,6 +579,30 @@
status = "disabled";
};
 
+   mmu600_pcie: iommu@fc90 {
+   compatible = "arm,smmu-v3";
+   reg = <0x0 0xfc90 0x0 0x20>;
+   interrupts = ,
+,
+,
+;
+   interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
+   #iommu-cells = <1>;
+   status = "disabled";
+   };
+
+   mmu600_php: iommu@fcb0 {
+   compatible = "arm,smmu-v3";
+   reg = <0x0 0xfcb0 0x0 0x20>;
+   interrupts = ,
+,
+,
+;
+   interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
+   #iommu-cells = <1>;
+   status = "disabled";
+   };
+
pmu1grf: syscon@fd58a000 {
compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xfd58a000 0x0 0x1>;
-- 
2.34.1