Re: [PATCH v4 1/3] arm: bcmbca: add bcm6856 SoC support under CONFIG_ARCH_BCMBCA
On Mon, Aug 22, 2022 at 11:31:41AM -0700, William Zhang wrote: > BCM6856 is a Broadcom B53 based PON Gateway SoC. It is part of the BCA > (Broadband Carrier Access origin) chipset family. Like other Broadband > SoC, this patch adds it under CONFIG_BCM6856 chip config and > CONFIG_ARCH_BCMBCA platform config. > > This initial support includes a bare-bone implementation and dts with > CPU subsystem, memory and Broadcom uart. This SoC is supported in the > linux-next git repository so the dts and dtsi files are copied from > linux. > > The u-boot image can be loaded from flash or network to the entry point > address in the memory and boot from there to the console. > > Signed-off-by: William Zhang > Reviewed-by: Philippe Reynes For the series, applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v4 1/3] arm: bcmbca: add bcm6856 SoC support under CONFIG_ARCH_BCMBCA
Hi William,
Le 22/08/2022 à 20:31, William Zhang a écrit :
BCM6856 is a Broadcom B53 based PON Gateway SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family. Like other Broadband
SoC, this patch adds it under CONFIG_BCM6856 chip config and
CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and Broadcom uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from
linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang
Reviewed-by: Philippe Reynes
---
Changes in v4:
-Add help in BCM6856 Kconfig option to include the list of the supported
chips.
MAINTAINERS | 1 +
arch/arm/dts/Makefile| 2 +
arch/arm/dts/bcm6856.dtsi| 103 +++
arch/arm/dts/bcm96856.dts| 30 +++
arch/arm/mach-bcmbca/Kconfig | 11 +++
arch/arm/mach-bcmbca/Makefile| 1 +
arch/arm/mach-bcmbca/bcm6856/Kconfig | 17
arch/arm/mach-bcmbca/bcm6856/Makefile| 5 ++
arch/arm/mach-bcmbca/bcm6856/mmu_table.c | 32 +++
board/broadcom/bcmbca/Kconfig| 7 ++
configs/bcm96856_defconfig | 23 +
include/configs/bcm96856.h | 11 +++
12 files changed, 243 insertions(+)
create mode 100644 arch/arm/dts/bcm6856.dtsi
create mode 100644 arch/arm/dts/bcm96856.dts
create mode 100644 arch/arm/mach-bcmbca/bcm6856/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm6856/Makefile
create mode 100644 arch/arm/mach-bcmbca/bcm6856/mmu_table.c
create mode 100644 configs/bcm96856_defconfig
create mode 100644 include/configs/bcm96856.h
diff --git a/MAINTAINERS b/MAINTAINERS
index d0a5b2352cc8..1f50dad583ce 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -230,6 +230,7 @@ N: bcm[9]?63178
N:bcm[9]?6756
N:bcm[9]?6813
N:bcm[9]?6846
+N: bcm[9]?6856
N:bcm[9]?6878
ARM BROADCOM BCMSTB
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c55bc3569662..a32bdf8c9f17 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1182,6 +1182,8 @@ dtb-$(CONFIG_BCM6813) += \
bcm96813.dtb
dtb-$(CONFIG_BCM6846) += \
bcm96846.dtb
+dtb-$(CONFIG_BCM6856) += \
+ bcm96856.dtb
dtb-$(CONFIG_BCM6878) += \
bcm96878.dtb
diff --git a/arch/arm/dts/bcm6856.dtsi b/arch/arm/dts/bcm6856.dtsi
new file mode 100644
index ..0bce6497219f
--- /dev/null
+++ b/arch/arm/dts/bcm6856.dtsi
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include
+#include
+
+/ {
+ compatible = "brcm,bcm6856", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = ,
+ ,
+ ,
+ ;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = ,
+ ;
+ interrupt-affinity = <_0>, <_1>;
+ };
+
+ clocks: clocks {
+ periph_clk:periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@8100 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x8100 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>, /* GICD */
+ <0x2000 0x2000>,
[PATCH v4 1/3] arm: bcmbca: add bcm6856 SoC support under CONFIG_ARCH_BCMBCA
BCM6856 is a Broadcom B53 based PON Gateway SoC. It is part of the BCA
(Broadband Carrier Access origin) chipset family. Like other Broadband
SoC, this patch adds it under CONFIG_BCM6856 chip config and
CONFIG_ARCH_BCMBCA platform config.
This initial support includes a bare-bone implementation and dts with
CPU subsystem, memory and Broadcom uart. This SoC is supported in the
linux-next git repository so the dts and dtsi files are copied from
linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang
---
Changes in v4:
-Add help in BCM6856 Kconfig option to include the list of the supported
chips.
MAINTAINERS | 1 +
arch/arm/dts/Makefile| 2 +
arch/arm/dts/bcm6856.dtsi| 103 +++
arch/arm/dts/bcm96856.dts| 30 +++
arch/arm/mach-bcmbca/Kconfig | 11 +++
arch/arm/mach-bcmbca/Makefile| 1 +
arch/arm/mach-bcmbca/bcm6856/Kconfig | 17
arch/arm/mach-bcmbca/bcm6856/Makefile| 5 ++
arch/arm/mach-bcmbca/bcm6856/mmu_table.c | 32 +++
board/broadcom/bcmbca/Kconfig| 7 ++
configs/bcm96856_defconfig | 23 +
include/configs/bcm96856.h | 11 +++
12 files changed, 243 insertions(+)
create mode 100644 arch/arm/dts/bcm6856.dtsi
create mode 100644 arch/arm/dts/bcm96856.dts
create mode 100644 arch/arm/mach-bcmbca/bcm6856/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm6856/Makefile
create mode 100644 arch/arm/mach-bcmbca/bcm6856/mmu_table.c
create mode 100644 configs/bcm96856_defconfig
create mode 100644 include/configs/bcm96856.h
diff --git a/MAINTAINERS b/MAINTAINERS
index d0a5b2352cc8..1f50dad583ce 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -230,6 +230,7 @@ N: bcm[9]?63178
N: bcm[9]?6756
N: bcm[9]?6813
N: bcm[9]?6846
+N: bcm[9]?6856
N: bcm[9]?6878
ARM BROADCOM BCMSTB
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c55bc3569662..a32bdf8c9f17 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1182,6 +1182,8 @@ dtb-$(CONFIG_BCM6813) += \
bcm96813.dtb
dtb-$(CONFIG_BCM6846) += \
bcm96846.dtb
+dtb-$(CONFIG_BCM6856) += \
+ bcm96856.dtb
dtb-$(CONFIG_BCM6878) += \
bcm96878.dtb
diff --git a/arch/arm/dts/bcm6856.dtsi b/arch/arm/dts/bcm6856.dtsi
new file mode 100644
index ..0bce6497219f
--- /dev/null
+++ b/arch/arm/dts/bcm6856.dtsi
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include
+#include
+
+/ {
+ compatible = "brcm,bcm6856", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = ,
+ ,
+ ,
+ ;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = ,
+ ;
+ interrupt-affinity = <_0>, <_1>;
+ };
+
+ clocks: clocks {
+ periph_clk:periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@8100 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x8100 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>, /* GICD */
+ <0x2000 0x2000>, /* GICC */
+ <0x4000 0x2000>, /* GICH */
+ <0x6000 0x2000>; /*
