Re: [PATCH v4 5/5] arm: imx8mp: Initial MSC SM2S iMX8MP support

2022-10-20 Thread Stefano Babic 

On 04.10.22 13:07, Martyn Welch wrote:

Add support for the MSC SM2S-IMX8PLUS SMARC Module. Tested in conjunction
with the MSC SM2-MB-EP1 Mini-ITX Carrier Board.


I see at least some issues:

- MAINTAINERS file is missing
- a lot of symbols are set in include/configs/msc_sm2s_imx8mp.h instead 
of moving to Kbuild. Running first CI, the following are reported:


Unmigrated symbols found in include/configs/msc_sm2s_imx8mp.h:
CONFIG_ETHPRIME
CONFIG_SPL_BSS_START_ADDR
CONFIG_SPL_STACK
CONFIG_SYS_BARGSIZE
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
CONFIG_SYS_SPL_MALLOC_SIZE
Unmigrated symbols found in include/configs/imx7ulp_spl.h:
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
CONFIG_SPL_STACK
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
CONFIG_SYS_SPL_MALLOC_SIZE

Best regards,
Stefano



Signed-off-by: Martyn Welch 
---

Changes in v2:
  - Renamed FDT to closer match kernel
  - Sync with kernel FDT
  - Update for changes made in U-Boot

Changes in v3:
  - Use imx8mp-u-boot.dtsi
  - Switch to use of DM PMIC support in SPL

Changes in v4:
  - Rebased to latest imx master branch

  arch/arm/dts/Makefile |1 +
  arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi  |   65 +
  arch/arm/dts/imx8mp-msc-sm2s.dts  |  820 
  arch/arm/mach-imx/imx8m/Kconfig   |8 +
  board/msc/sm2s_imx8mp/Kconfig |   15 +
  board/msc/sm2s_imx8mp/Makefile|   12 +
  board/msc/sm2s_imx8mp/imximage-8mp-lpddr4.cfg |8 +
  board/msc/sm2s_imx8mp/lpddr4_timing.c | 1842 +
  board/msc/sm2s_imx8mp/sm2s_imx8mp.c   |   60 +
  board/msc/sm2s_imx8mp/spl.c   |  273 +++
  configs/msc_sm2s_imx8mp_defconfig |   91 +
  include/configs/msc_sm2s_imx8mp.h |   96 +
  12 files changed, 3291 insertions(+)
  create mode 100644 arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi
  create mode 100644 arch/arm/dts/imx8mp-msc-sm2s.dts
  create mode 100644 board/msc/sm2s_imx8mp/Kconfig
  create mode 100644 board/msc/sm2s_imx8mp/Makefile
  create mode 100644 board/msc/sm2s_imx8mp/imximage-8mp-lpddr4.cfg
  create mode 100644 board/msc/sm2s_imx8mp/lpddr4_timing.c
  create mode 100644 board/msc/sm2s_imx8mp/sm2s_imx8mp.c
  create mode 100644 board/msc/sm2s_imx8mp/spl.c
  create mode 100644 configs/msc_sm2s_imx8mp_defconfig
  create mode 100644 include/configs/msc_sm2s_imx8mp.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 965895bc2a..a5de6e1b5e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -970,6 +970,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-phanbell.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-evk.dtb \
+   imx8mp-msc-sm2s.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
imx8mp-venice.dtb \
imx8mp-venice-gw74xx.dtb \
diff --git a/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi 
b/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi
new file mode 100644
index 00..cf591adf5a
--- /dev/null
+++ b/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+   model = "MSC SM2S-IMX8MPLUS";
+   compatible = "avnet,sm2s-imx8mp", "fsl,imx8mp";
+
+   wdt-reboot {
+   compatible = "wdt-reboot";
+   wdt = <&wdog1>;
+   u-boot,dm-spl;
+   };
+};
+
+®_usdhc2_vmmc {
+   u-boot,dm-spl;
+};
+
+&gpio1 {
+   u-boot,dm-spl;
+};
+
+&gpio2 {
+   u-boot,dm-spl;
+};
+
+&gpio3 {
+   u-boot,dm-spl;
+};
+
+&i2c1 {
+   u-boot,dm-spl;
+};
+
+&i2c2 {
+   u-boot,dm-spl;
+};
+
+&i2c3 {
+   u-boot,dm-spl;
+};
+
+&i2c4 {
+   u-boot,dm-spl;
+};
+
+&i2c5 {
+   u-boot,dm-spl;
+};
+
+&i2c6 {
+   u-boot,dm-spl;
+};
+
+&pinctrl_i2c6 {
+   u-boot,dm-spl;
+};
+
+&pmic {
+   u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mp-msc-sm2s.dts b/arch/arm/dts/imx8mp-msc-sm2s.dts
new file mode 100644
index 00..5dbec71747
--- /dev/null
+++ b/arch/arm/dts/imx8mp-msc-sm2s.dts
@@ -0,0 +1,820 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Avnet Embedded GmbH
+ */
+
+/dts-v1/;
+
+#include "imx8mp.dtsi"
+#include 
+
+/ {
+   aliases {
+   rtc0 = &sys_rtc;
+   rtc1 = &snvs_rtc;
+   };
+
+   chosen {
+   stdout-path = &uart2;
+   };
+
+   reg_usb0_host_vbus: regulator-usb0-vbus {
+   compatible = "regulator-fixed";
+   regulator-name = "usb0_host_vbus";
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_usb0_vbus>;
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+   enable-active-high;
+   };
+
+   reg_usb1_host_vbus: regulator-usb1-vbus {
+   compatible = "regulator-fixed";
+   regulator-name = "usb1_host_vb

[PATCH v4 5/5] arm: imx8mp: Initial MSC SM2S iMX8MP support

2022-10-04 Thread Martyn Welch 
Add support for the MSC SM2S-IMX8PLUS SMARC Module. Tested in conjunction
with the MSC SM2-MB-EP1 Mini-ITX Carrier Board.

Signed-off-by: Martyn Welch 
---

Changes in v2:
 - Renamed FDT to closer match kernel
 - Sync with kernel FDT
 - Update for changes made in U-Boot

Changes in v3:
 - Use imx8mp-u-boot.dtsi
 - Switch to use of DM PMIC support in SPL

Changes in v4:
 - Rebased to latest imx master branch

 arch/arm/dts/Makefile |1 +
 arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi  |   65 +
 arch/arm/dts/imx8mp-msc-sm2s.dts  |  820 
 arch/arm/mach-imx/imx8m/Kconfig   |8 +
 board/msc/sm2s_imx8mp/Kconfig |   15 +
 board/msc/sm2s_imx8mp/Makefile|   12 +
 board/msc/sm2s_imx8mp/imximage-8mp-lpddr4.cfg |8 +
 board/msc/sm2s_imx8mp/lpddr4_timing.c | 1842 +
 board/msc/sm2s_imx8mp/sm2s_imx8mp.c   |   60 +
 board/msc/sm2s_imx8mp/spl.c   |  273 +++
 configs/msc_sm2s_imx8mp_defconfig |   91 +
 include/configs/msc_sm2s_imx8mp.h |   96 +
 12 files changed, 3291 insertions(+)
 create mode 100644 arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi
 create mode 100644 arch/arm/dts/imx8mp-msc-sm2s.dts
 create mode 100644 board/msc/sm2s_imx8mp/Kconfig
 create mode 100644 board/msc/sm2s_imx8mp/Makefile
 create mode 100644 board/msc/sm2s_imx8mp/imximage-8mp-lpddr4.cfg
 create mode 100644 board/msc/sm2s_imx8mp/lpddr4_timing.c
 create mode 100644 board/msc/sm2s_imx8mp/sm2s_imx8mp.c
 create mode 100644 board/msc/sm2s_imx8mp/spl.c
 create mode 100644 configs/msc_sm2s_imx8mp_defconfig
 create mode 100644 include/configs/msc_sm2s_imx8mp.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 965895bc2a..a5de6e1b5e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -970,6 +970,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-phanbell.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-evk.dtb \
+   imx8mp-msc-sm2s.dtb \
imx8mp-phyboard-pollux-rdk.dtb \
imx8mp-venice.dtb \
imx8mp-venice-gw74xx.dtb \
diff --git a/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi 
b/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi
new file mode 100644
index 00..cf591adf5a
--- /dev/null
+++ b/arch/arm/dts/imx8mp-msc-sm2s-u-boot.dtsi
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+   model = "MSC SM2S-IMX8MPLUS";
+   compatible = "avnet,sm2s-imx8mp", "fsl,imx8mp";
+
+   wdt-reboot {
+   compatible = "wdt-reboot";
+   wdt = <&wdog1>;
+   u-boot,dm-spl;
+   };
+};
+
+®_usdhc2_vmmc {
+   u-boot,dm-spl;
+};
+
+&gpio1 {
+   u-boot,dm-spl;
+};
+
+&gpio2 {
+   u-boot,dm-spl;
+};
+
+&gpio3 {
+   u-boot,dm-spl;
+};
+
+&i2c1 {
+   u-boot,dm-spl;
+};
+
+&i2c2 {
+   u-boot,dm-spl;
+};
+
+&i2c3 {
+   u-boot,dm-spl;
+};
+
+&i2c4 {
+   u-boot,dm-spl;
+};
+
+&i2c5 {
+   u-boot,dm-spl;
+};
+
+&i2c6 {
+   u-boot,dm-spl;
+};
+
+&pinctrl_i2c6 {
+   u-boot,dm-spl;
+};
+
+&pmic {
+   u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mp-msc-sm2s.dts b/arch/arm/dts/imx8mp-msc-sm2s.dts
new file mode 100644
index 00..5dbec71747
--- /dev/null
+++ b/arch/arm/dts/imx8mp-msc-sm2s.dts
@@ -0,0 +1,820 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Avnet Embedded GmbH
+ */
+
+/dts-v1/;
+
+#include "imx8mp.dtsi"
+#include 
+
+/ {
+   aliases {
+   rtc0 = &sys_rtc;
+   rtc1 = &snvs_rtc;
+   };
+
+   chosen {
+   stdout-path = &uart2;
+   };
+
+   reg_usb0_host_vbus: regulator-usb0-vbus {
+   compatible = "regulator-fixed";
+   regulator-name = "usb0_host_vbus";
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_usb0_vbus>;
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+   enable-active-high;
+   };
+
+   reg_usb1_host_vbus: regulator-usb1-vbus {
+   compatible = "regulator-fixed";
+   regulator-name = "usb1_host_vbus";
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_usb1_vbus>;
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+   enable-active-high;
+   };
+
+   reg_usdhc2_vmmc: regulator-usdhc2 {
+   compatible = "regulator-fixed";
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
+   regulator-name = "VSD_3V3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+   enable-ac