Re: [PATCH v5 1/2] arm: mediatek: add mt8195 SOC support
Hello,
What happened to this series? Has it been abandoned? Also, is it
possible to get memory size installed to the board dynamically?
Best regards,
Shengyu
在 2023/8/4 19:04, Macpaul Lin 写道:
From: Fabien Parent
The MediaTek MT8195 is a ARM64-based SoC with a quad-core Cortex-A73 and
a quad-core Cortex-A53. It is including UART, SPI, USB3.0 device and hosts,
SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3
and LPDDR4 options.
Signed-off-by: Fabien Parent
Signed-off-by: Macpaul Lin
Reviewed-by: Simon Glass
---
MAINTAINERS| 2 +
arch/arm/dts/mt8195.dtsi | 370 +
arch/arm/mach-mediatek/Kconfig | 13 +-
arch/arm/mach-mediatek/Makefile| 1 +
arch/arm/mach-mediatek/mt8195/Kconfig | 13 +
arch/arm/mach-mediatek/mt8195/Makefile | 3 +
arch/arm/mach-mediatek/mt8195/init.c | 97 +++
7 files changed, 498 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/mt8195.dtsi
create mode 100644 arch/arm/mach-mediatek/mt8195/Kconfig
create mode 100644 arch/arm/mach-mediatek/mt8195/Makefile
create mode 100644 arch/arm/mach-mediatek/mt8195/init.c
Changes for v2:
- Correct node name to t-phy for u3phy0.
- Add platform compatible string "mediatek,mt8195-tphy" to all usb phy nodes.
- remove clock nodes that software cannot controlled in phy nodes.
- Test and add back "mac" for HOST only xhci nodes.
Changes for v3:
- Revise device node name from "xhciX: xhciX@" to "xhciX: xhci@".
Changes for v4:
- No change.
Changes for v5:
- Fix Copyright year to 2023.
- Fix memory map in dram_init() to support 8GB onboard memory.
- Add '#if !IS_ENABLED(CONFIG_SYSRESET)' with reset_cpu().
- Correct reset_cpu() function prototype.
- rebase patchset to v2023-10.rc1
- Add missing arch/arm/mach-mediatek/mt8195/Kconfig.
diff --git a/MAINTAINERS b/MAINTAINERS
index 47581cf6fb..4d0f017e7e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -369,8 +369,10 @@ ARM MEDIATEK
M:Ryder Lee
M:Weijie Gao
M:Chunfeng Yun
+M: Macpaul Lin
R:GSS_MTK_Uboot_upstream
S:Maintained
+F: arch/arm/dts/mt8195.dtsi
F:arch/arm/mach-mediatek/
F:arch/arm/include/asm/arch-mediatek/
F:board/mediatek/
diff --git a/arch/arm/dts/mt8195.dtsi b/arch/arm/dts/mt8195.dtsi
new file mode 100644
index 00..14cb28d008
--- /dev/null
+++ b/arch/arm/dts/mt8195.dtsi
@@ -0,0 +1,370 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2023 MediaTek Inc.
+ * Copyright (C) 2023 BayLibre, SAS
+ * Author: Ben Ho
+ * Erin Lo
+ * Fabien Parent
+ * Macpaul Lin
+ */
+
+#include
+#include
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8195";
+ interrupt-parent = <&sysirq>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+ core1 {
+ cpu = <&cpu1>;
+ };
+ core2 {
+ cpu = <&cpu2>;
+ };
+ core3 {
+ cpu = <&cpu3>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <&cpu4>;
+ };
+ core1 {
+ cpu = <&cpu5>;
+ };
+ core2 {
+ cpu = <&cpu6>;
+ };
+ core3 {
+ cpu = <&cpu7>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <741>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <741>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x002>;
+ enable-method = "psci";
+
Re: [PATCH v5 1/2] arm: mediatek: add mt8195 SOC support
Hi, On Fri, 4 Aug 2023 at 05:05, Macpaul Lin wrote: > > From: Fabien Parent > > The MediaTek MT8195 is a ARM64-based SoC with a quad-core Cortex-A73 and > a quad-core Cortex-A53. It is including UART, SPI, USB3.0 device and hosts, > SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3 > and LPDDR4 options. > > Signed-off-by: Fabien Parent > Signed-off-by: Macpaul Lin > --- > MAINTAINERS| 2 + > arch/arm/dts/mt8195.dtsi | 370 + > arch/arm/mach-mediatek/Kconfig | 13 +- > arch/arm/mach-mediatek/Makefile| 1 + > arch/arm/mach-mediatek/mt8195/Kconfig | 13 + > arch/arm/mach-mediatek/mt8195/Makefile | 3 + > arch/arm/mach-mediatek/mt8195/init.c | 97 +++ > 7 files changed, 498 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/dts/mt8195.dtsi > create mode 100644 arch/arm/mach-mediatek/mt8195/Kconfig > create mode 100644 arch/arm/mach-mediatek/mt8195/Makefile > create mode 100644 arch/arm/mach-mediatek/mt8195/init.c Reviewed-by: Simon Glass nits below > > Changes for v2: > - Correct node name to t-phy for u3phy0. > - Add platform compatible string "mediatek,mt8195-tphy" to all usb phy nodes. > - remove clock nodes that software cannot controlled in phy nodes. > - Test and add back "mac" for HOST only xhci nodes. > > Changes for v3: > - Revise device node name from "xhciX: xhciX@" to "xhciX: xhci@". > > Changes for v4: > - No change. > > Changes for v5: > - Fix Copyright year to 2023. > - Fix memory map in dram_init() to support 8GB onboard memory. > - Add '#if !IS_ENABLED(CONFIG_SYSRESET)' with reset_cpu(). > - Correct reset_cpu() function prototype. > - rebase patchset to v2023-10.rc1 > - Add missing arch/arm/mach-mediatek/mt8195/Kconfig. > > diff --git a/MAINTAINERS b/MAINTAINERS > index 47581cf6fb..4d0f017e7e 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -369,8 +369,10 @@ ARM MEDIATEK > M: Ryder Lee > M: Weijie Gao > M: Chunfeng Yun > +M: Macpaul Lin > R: GSS_MTK_Uboot_upstream > S: Maintained > +F: arch/arm/dts/mt8195.dtsi > F: arch/arm/mach-mediatek/ > F: arch/arm/include/asm/arch-mediatek/ > F: board/mediatek/ > diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig > index 04aa2fd97f..3a2af1cdee 100644 > --- a/arch/arm/mach-mediatek/Kconfig > +++ b/arch/arm/mach-mediatek/Kconfig > @@ -67,6 +67,15 @@ config TARGET_MT8183 > SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3 > and LPDDR4 options. > > +config TARGET_MT8195 > + bool "MediaTek MT8195 SoC" > + select ARM64 > + help > + The MediaTek MT8195 is a ARM64-based SoC with a quad-core > Cortex-A73 and > + a quad-core Cortex-A53. It is including UART, SPI, USB3.0 device > and hosts, > + SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3 > + and LPDDR4 options. > + > config TARGET_MT8512 > bool "MediaTek MT8512 M1 Board" > select ARM64 > @@ -105,6 +114,7 @@ config SYS_BOARD > default "mt7981" if TARGET_MT7981 > default "mt7986" if TARGET_MT7986 > default "mt8183" if TARGET_MT8183 > + default "mt8195" if TARGET_MT8195 > default "mt8512" if TARGET_MT8512 > default "mt8516" if TARGET_MT8516 > default "mt8518" if TARGET_MT8518 > @@ -122,6 +132,7 @@ config SYS_CONFIG_NAME > default "mt7981" if TARGET_MT7981 > default "mt7986" if TARGET_MT7986 > default "mt8183" if TARGET_MT8183 > + default "mt8195" if TARGET_MT8195 > default "mt8512" if TARGET_MT8512 > default "mt8516" if TARGET_MT8516 > default "mt8518" if TARGET_MT8518 > @@ -134,7 +145,7 @@ config SYS_CONFIG_NAME > config MTK_BROM_HEADER_INFO > string > default "media=nor" if TARGET_MT8518 || TARGET_MT8512 || > TARGET_MT7629 || TARGET_MT7622 > - default "media=emmc" if TARGET_MT8516 || TARGET_MT8365 || > TARGET_MT8183 > + default "media=emmc" if TARGET_MT8516 || TARGET_MT8365 || > TARGET_MT8183 || TARGET_MT8195 > default "media=snand;nandinfo=2k+64" if TARGET_MT7981 || TARGET_MT7986 > default "lk=1" if TARGET_MT7623 > > diff --git a/arch/arm/mach-mediatek/Makefile b/arch/arm/mach-mediatek/Makefile > index fc85293f71..fbbb5431d1 100644 > --- a/arch/arm/mach-mediatek/Makefile > +++ b/arch/arm/mach-mediatek/Makefile > @@ -10,5 +10,6 @@ obj-$(CONFIG_TARGET_MT7629) += mt7629/ > obj-$(CONFIG_TARGET_MT7981) += mt7981/ > obj-$(CONFIG_TARGET_MT7986) += mt7986/ > obj-$(CONFIG_TARGET_MT8183) += mt8183/ > +obj-$(CONFIG_TARGET_MT8195) += mt8195/ > obj-$(CONFIG_TARGET_MT8516) += mt8516/ > obj-$(CONFIG_TARGET_MT8518) += mt8518/ > diff --git a/arch/arm/mach-mediatek/mt8195/Kconfig > b/arch/arm/mach-mediatek/mt8195/Kconfig > new file mode 100644 > index 00..a34fa2cf2e > --- /dev/null > +++ b/arch/arm/mach-mediatek/mt8
Re: [PATCH v5 1/2] arm: mediatek: add mt8195 SOC support
Marcel Ziswiler 於 2023年11月11日 週六 上午4:24寫道： > [snip] > > Changes for v5: > > - Fix Copyright year to 2023. > > - Fix memory map in dram_init() to support 8GB onboard memory. > > - Add '#if !IS_ENABLED(CONFIG_SYSRESET)' with reset_cpu(). > > - Correct reset_cpu() function prototype. > > - rebase patchset to v2023-10.rc1 > > - Add missing arch/arm/mach-mediatek/mt8195/Kconfig. > > [snip] > > I finally got my hands on an EVK and gave this a try. However, I did not get > that far. This is with latest > downstream TF-A as I still struggle with upstream there as well. Any ideas? > > U-Boot 2024.01-rc1-00056-g5237f2b48bb (Nov 10 2023 - 15:33:34 +0100) > > CPU: MediaTek MT8195 > DRAM: 8 GiB > mtu3 usb@1120: clks of sts1 are not stable! > mtu3-peripheral ssusb@1120: device enable failed -110 > mtu3-peripheral ssusb@1120: mtu3 hw init failed:-110 > board_init: Cannot find USB device > initcall failed at call ffe46a50 (err=-110) > ### ERROR ### Please RESET the board ### > > Cheers > > Marcel I'm glad you've get a board and tested our patches. Currently we're busy on other tasks so the improvement to the patch v5 has been postponed. :~( These error is because the power supplement settings are in the later patches. Hence the clock might not stable for the cold boot up. You can just press the key on the board and warm reset it, the clock issue should be disappear. > mtu3-peripheral ssusb@1120: device enable failed -110 > mtu3-peripheral ssusb@1120: mtu3 hw init failed:-110 You can refer to the user guide and public domain code. https://mediatek.gitlab.io/aiot/doc/aiot-dev-guide/master/sw/yocto/get-started.html https://mediatek.gitlab.io/aiot/doc/aiot-dev-guide/master/sw/yocto/get-started/build-code/build-steps.html The latest u-boot code is here. https://gitlab.com/mediatek/aiot/bsp/u-boot/-/tree/mtk-v2022.10?ref_type=heads -- Best regards, Macpaul Lin
Re: [PATCH v5 1/2] arm: mediatek: add mt8195 SOC support
Hi guys On Fri, 2023-08-04 at 19:04 +0800, Macpaul Lin wrote: > From: Fabien Parent > > The MediaTek MT8195 is a ARM64-based SoC with a quad-core Cortex-A73 and > a quad-core Cortex-A53. It is including UART, SPI, USB3.0 device and hosts, > SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3 > and LPDDR4 options. > > Signed-off-by: Fabien Parent > Signed-off-by: Macpaul Lin > --- > MAINTAINERS | 2 + > arch/arm/dts/mt8195.dtsi | 370 + > arch/arm/mach-mediatek/Kconfig | 13 +- > arch/arm/mach-mediatek/Makefile | 1 + > arch/arm/mach-mediatek/mt8195/Kconfig | 13 + > arch/arm/mach-mediatek/mt8195/Makefile | 3 + > arch/arm/mach-mediatek/mt8195/init.c | 97 +++ > 7 files changed, 498 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/dts/mt8195.dtsi > create mode 100644 arch/arm/mach-mediatek/mt8195/Kconfig > create mode 100644 arch/arm/mach-mediatek/mt8195/Makefile > create mode 100644 arch/arm/mach-mediatek/mt8195/init.c > > Changes for v2: > - Correct node name to t-phy for u3phy0. > - Add platform compatible string "mediatek,mt8195-tphy" to all usb phy nodes. > - remove clock nodes that software cannot controlled in phy nodes. > - Test and add back "mac" for HOST only xhci nodes. > > Changes for v3: > - Revise device node name from "xhciX: xhciX@" to "xhciX: xhci@". > > Changes for v4: > - No change. > > Changes for v5: > - Fix Copyright year to 2023. > - Fix memory map in dram_init() to support 8GB onboard memory. > - Add '#if !IS_ENABLED(CONFIG_SYSRESET)' with reset_cpu(). > - Correct reset_cpu() function prototype. > - rebase patchset to v2023-10.rc1 > - Add missing arch/arm/mach-mediatek/mt8195/Kconfig. [snip] I finally got my hands on an EVK and gave this a try. However, I did not get that far. This is with latest downstream TF-A as I still struggle with upstream there as well. Any ideas? U-Boot 2024.01-rc1-00056-g5237f2b48bb (Nov 10 2023 - 15:33:34 +0100) CPU: MediaTek MT8195 DRAM: 8 GiB mtu3 usb@1120: clks of sts1 are not stable! mtu3-peripheral ssusb@1120: device enable failed -110 mtu3-peripheral ssusb@1120: mtu3 hw init failed:-110 board_init: Cannot find USB device initcall failed at call ffe46a50 (err=-110) ### ERROR ### Please RESET the board ### Cheers Marcel
[PATCH v5 1/2] arm: mediatek: add mt8195 SOC support
From: Fabien Parent
The MediaTek MT8195 is a ARM64-based SoC with a quad-core Cortex-A73 and
a quad-core Cortex-A53. It is including UART, SPI, USB3.0 device and hosts,
SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3
and LPDDR4 options.
Signed-off-by: Fabien Parent
Signed-off-by: Macpaul Lin
---
MAINTAINERS| 2 +
arch/arm/dts/mt8195.dtsi | 370 +
arch/arm/mach-mediatek/Kconfig | 13 +-
arch/arm/mach-mediatek/Makefile| 1 +
arch/arm/mach-mediatek/mt8195/Kconfig | 13 +
arch/arm/mach-mediatek/mt8195/Makefile | 3 +
arch/arm/mach-mediatek/mt8195/init.c | 97 +++
7 files changed, 498 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/mt8195.dtsi
create mode 100644 arch/arm/mach-mediatek/mt8195/Kconfig
create mode 100644 arch/arm/mach-mediatek/mt8195/Makefile
create mode 100644 arch/arm/mach-mediatek/mt8195/init.c
Changes for v2:
- Correct node name to t-phy for u3phy0.
- Add platform compatible string "mediatek,mt8195-tphy" to all usb phy nodes.
- remove clock nodes that software cannot controlled in phy nodes.
- Test and add back "mac" for HOST only xhci nodes.
Changes for v3:
- Revise device node name from "xhciX: xhciX@" to "xhciX: xhci@".
Changes for v4:
- No change.
Changes for v5:
- Fix Copyright year to 2023.
- Fix memory map in dram_init() to support 8GB onboard memory.
- Add '#if !IS_ENABLED(CONFIG_SYSRESET)' with reset_cpu().
- Correct reset_cpu() function prototype.
- rebase patchset to v2023-10.rc1
- Add missing arch/arm/mach-mediatek/mt8195/Kconfig.
diff --git a/MAINTAINERS b/MAINTAINERS
index 47581cf6fb..4d0f017e7e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -369,8 +369,10 @@ ARM MEDIATEK
M: Ryder Lee
M: Weijie Gao
M: Chunfeng Yun
+M: Macpaul Lin
R: GSS_MTK_Uboot_upstream
S: Maintained
+F: arch/arm/dts/mt8195.dtsi
F: arch/arm/mach-mediatek/
F: arch/arm/include/asm/arch-mediatek/
F: board/mediatek/
diff --git a/arch/arm/dts/mt8195.dtsi b/arch/arm/dts/mt8195.dtsi
new file mode 100644
index 00..14cb28d008
--- /dev/null
+++ b/arch/arm/dts/mt8195.dtsi
@@ -0,0 +1,370 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2023 MediaTek Inc.
+ * Copyright (C) 2023 BayLibre, SAS
+ * Author: Ben Ho
+ * Erin Lo
+ * Fabien Parent
+ * Macpaul Lin
+ */
+
+#include
+#include
+#include
+#include
+
+/ {
+ compatible = "mediatek,mt8195";
+ interrupt-parent = <&sysirq>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu0>;
+ };
+ core1 {
+ cpu = <&cpu1>;
+ };
+ core2 {
+ cpu = <&cpu2>;
+ };
+ core3 {
+ cpu = <&cpu3>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <&cpu4>;
+ };
+ core1 {
+ cpu = <&cpu5>;
+ };
+ core2 {
+ cpu = <&cpu6>;
+ };
+ core3 {
+ cpu = <&cpu7>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x000>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <741>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x001>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <741>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x002>;
+ enable-method = "psci";
+ capacity-dmips-mhz = <741>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53";
+ reg = <0x003>;
+
