This macro currently supports only one parameter. Based on Linux iopoll,
let's extend read_poll_timeout common API to allow multiple variable
parameters.
Signed-off-by: Ariel D'Alessandro
---
arch/arm/mach-socfpga/reset_manager_s10.c | 20 +++-
drivers/mmc/rockchip_sdhci.c | 9 +
include/linux/iopoll.h| 12 ++--
3 files changed, 22 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c
b/arch/arm/mach-socfpga/reset_manager_s10.c
index d2337bd4d62..f47fec10a0c 100644
--- a/arch/arm/mach-socfpga/reset_manager_s10.c
+++ b/arch/arm/mach-socfpga/reset_manager_s10.c
@@ -80,9 +80,9 @@ void socfpga_bridges_reset(int enable)
~0);
/* Poll until all idleack to 0 */
- read_poll_timeout(readl, socfpga_get_sysmgr_addr() +
- SYSMGR_SOC64_NOC_IDLEACK, reg, !reg, 1000,
- 30);
+ read_poll_timeout(readl, reg, !reg, 1000, 30,
+ socfpga_get_sysmgr_addr() +
+ SYSMGR_SOC64_NOC_IDLEACK);
} else {
/* set idle request to all bridges */
writel(~0,
@@ -93,18 +93,20 @@ void socfpga_bridges_reset(int enable)
writel(1, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_NOC_TIMEOUT);
/* Poll until all idleack to 1 */
- read_poll_timeout(readl, socfpga_get_sysmgr_addr() +
- SYSMGR_SOC64_NOC_IDLEACK, reg,
+ read_poll_timeout(readl, reg,
reg == (SYSMGR_NOC_H2F_MSK |
SYSMGR_NOC_LWH2F_MSK),
- 1000, 30);
+ 1000, 30,
+ socfpga_get_sysmgr_addr() +
+ SYSMGR_SOC64_NOC_IDLEACK);
/* Poll until all idlestatus to 1 */
- read_poll_timeout(readl, socfpga_get_sysmgr_addr() +
- SYSMGR_SOC64_NOC_IDLESTATUS, reg,
+ read_poll_timeout(readl, reg,
reg == (SYSMGR_NOC_H2F_MSK |
SYSMGR_NOC_LWH2F_MSK),
- 1000, 30);
+ 1000, 30,
+ socfpga_get_sysmgr_addr() +
+ SYSMGR_SOC64_NOC_IDLESTATUS);
/* Reset all bridges (except NOR DDR scheduler & F2S) */
setbits_le32(socfpga_get_rstmgr_addr() + RSTMGR_SOC64_BRGMODRST,
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index f3f9d83ba36..1fdc8415178 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -202,8 +202,8 @@ static void rk3399_emmc_phy_power_on(struct
rockchip_emmc_phy *phy, u32 clock)
/* REN Enable on STRB Line for HS400 */
writel(RK_CLRSETBITS(0, 1 << 9), >emmcphy_con[2]);
- read_poll_timeout(readl, >emmcphy_status, dllrdy,
- PHYCTRL_DLL_LOCK_WO_TMOUT(dllrdy), 1, 5000);
+ read_poll_timeout(readl, dllrdy, PHYCTRL_DLL_LOCK_WO_TMOUT(dllrdy), 1,
+ 5000, >emmcphy_status);
}
static void rk3399_emmc_phy_power_off(struct rockchip_emmc_phy *phy)
@@ -328,8 +328,9 @@ static int rk3568_sdhci_emmc_set_clock(struct sdhci_host
*host, unsigned int clo
DWCMSHC_EMMC_DLL_START;
sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CTRL);
- ret = read_poll_timeout(readl, host->ioaddr +
DWCMSHC_EMMC_DLL_STATUS0,
- val, DLL_LOCK_WO_TMOUT(val), 1, 500);
+ ret = read_poll_timeout(readl, val, DLL_LOCK_WO_TMOUT(val), 1,
+ 500,
+ host->ioaddr +
DWCMSHC_EMMC_DLL_STATUS0);
if (ret)
return ret;
diff --git a/include/linux/iopoll.h b/include/linux/iopoll.h
index 30cdea0cdc1..0ee2bddaa83 100644
--- a/include/linux/iopoll.h
+++ b/include/linux/iopoll.h
@@ -14,11 +14,11 @@
/**
* read_poll_timeout - Periodically poll an address until a condition is met
or a timeout occurs
* @op: accessor function (takes @addr as its only argument)
- * @addr: Address to poll
* @val: Variable to read the value into
* @cond: Break condition (usually involving @val)
* @sleep_us: Maximum time to sleep in us
* @timeout_us: Timeout in us, 0 means never timeout
+ * @args: arguments for @op poll
*
* Returns 0 on success and -ETIMEDOUT upon a timeout. In either
* case, the last read value at @addr is stored in @val.
@@ -26,15 +26,15 @@
* When available, you'll probably want to use one of the specialized
* macros defined below rather than this macro
