Re: [RFC PATCH v2 05/13] mmc: add nexell driver
Hi,
On 4/10/20 2:33 AM, Stefan B. wrote:
> Hi,
>
> see below my answers to your questions.
>
> Regards
> Stefan Bosch
>
>
> Hi,
>
> thanks a lot for your reply. As you already guessed I have ported the
> outdated U-Boot from FriendlyARM, see:
> https://protect2.fireeye.com/url?k=00de144b-5d1421fc-00df9f04-0cc47a3003e8-6dd6a1886465f918=1=https%3A%2F%2Fgithub.com%2Ffriendlyarm%2Fu-boot%2Ftree%2Fnanopi2-v2016.01
>
> The original MMC-driver has been nexell_dw_mmc.c, so I renamed it to
> nexell_dw_mmc_dm.c after changing to DM.
>
> I will have a closer look at your suggestions and give you feedback ASAP.
I don't know that you had received reviews about other patches.
If you want to apply new chip, then i think you need to implement drivers based
on DM.
>
>
> Regards
> Stefan Bosch
>
>
> Am 02.04.20 um 13:03 schrieb Jaehoon Chung:
>> Hi,
>>
>> On 3/28/20 6:43 PM, Stefan Bosch wrote:
>>> Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
>>> - mmc: nexell_dw_mmc.c changed to nexell_dw_mmc_dm.c (switched to DM).
>>
>> It doesn't need to add postfix as _dm.
>>
> Ok, I have renamed it to nexell_dw_mmc.c.
>
>>>
>>> Signed-off-by: Stefan Bosch
>>> ---
>>>
>>> Changes in v2:
>>> - commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted
>>> into separate commits for gpio, i2c, mmc, pwm.
>>>
>>> drivers/mmc/Kconfig | 6 +
>>> drivers/mmc/Makefile | 1 +
>>> drivers/mmc/nexell_dw_mmc_dm.c | 350
>>> +
>>> 3 files changed, 357 insertions(+)
>>> create mode 100644 drivers/mmc/nexell_dw_mmc_dm.c
>>>
>>> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
>>> index 2f0eedc..bb8e7c0 100644
>>> --- a/drivers/mmc/Kconfig
>>> +++ b/drivers/mmc/Kconfig
>>> @@ -253,6 +253,12 @@ config MMC_DW_SNPS
>>> This selects support for Synopsys DesignWare Memory Card Interface
>>> driver
>>> extensions used in various Synopsys ARC devboards.
>>> +config NEXELL_DWMMC
>>> + bool "Nexell SD/MMC controller support"
>>> + depends on ARCH_NEXELL
>>> + depends on MMC_DW
>>> + default y
>>
>> Not depends on DM_MMC?
>>
> You are right, I have inserted "depends on DM_MMC". I missed this when
> changing to DM.
>
>>> +
>>> config MMC_MESON_GX
>>> bool "Meson GX EMMC controller support"
>>> depends on DM_MMC && BLK && ARCH_MESON
>>> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
>>> index 9c1f8e5..a7b5a7b 100644
>>> --- a/drivers/mmc/Makefile
>>> +++ b/drivers/mmc/Makefile
>>> @@ -43,6 +43,7 @@ obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
>>> obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
>>> obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
>>> obj-$(CONFIG_JZ47XX_MMC) += jz_mmc.o
>>> +obj-$(CONFIG_NEXELL_DWMMC) += nexell_dw_mmc_dm.o
>>> # SDHCI
>>> obj-$(CONFIG_MMC_SDHCI) += sdhci.o
>>> diff --git a/drivers/mmc/nexell_dw_mmc_dm.c b/drivers/mmc/nexell_dw_mmc_dm.c
>>> new file mode 100644
>>> index 000..b06b60d
>>> --- /dev/null
>>> +++ b/drivers/mmc/nexell_dw_mmc_dm.c
>>> @@ -0,0 +1,350 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/*
>>> + * (C) Copyright 2016 Nexell
>>> + * Youngbok, Park
>>> + *
>>> + * (C) Copyright 2019 Stefan Bosch
>>> + */
>>> +
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +
>>> +#define DWMCI_CLKSEL 0x09C
>>> +#define DWMCI_SHIFT_0 0x0
>>> +#define DWMCI_SHIFT_1 0x1
>>> +#define DWMCI_SHIFT_2 0x2
>>> +#define DWMCI_SHIFT_3 0x3
>>> +#define DWMCI_SET_SAMPLE_CLK(x) (x)
>>> +#define DWMCI_SET_DRV_CLK(x) ((x) << 16)
>>> +#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
>>> +#define DWMCI_CLKCTRL 0x114
>>> +#define NX_MMC_CLK_DELAY(x, y, a, b) x) & 0xFF) << 0) |\
>>> + (((y) & 0x03) << 16) |\
>>> + (((a) & 0xFF) << 8) |\
>>> + (((b) & 0x03) << 24))
>>> +
>>> +struct nexell_mmc_plat {
>>> + struct mmc_config cfg;
>>> + struct mmc mmc;
>>> +};
>>> +
>>> +struct nexell_dwmmc_priv {
>>> + struct clk *clk;
>>> + struct dwmci_host host;
>>> + int fifo_size;
>>> + bool fifo_mode;
>>> + int frequency;
>>> + u32 min_freq;
>>> + u32 max_freq;
>>> + int d_delay;
>>> + int d_shift;
>>> + int s_delay;
>>> + int s_shift;
>>> +
>>> +};
>>> +
>>> +struct clk *clk_get(const char *id);
>>> +
>>> +static void set_pin_stat(int index, int bit, int value)
>>> +{
>>> +#if !defined(CONFIG_SPL_BUILD)
>>> + nx_gpio_set_pad_function(index, bit, value);
>>> +#else
>>> +#if defined(CONFIG_ARCH_S5P4418) || \
>>> + defined(CONFIG_ARCH_S5P6818)
>>> +
>>> + unsigned long base[5] = {
>>> + PHY_BASEADDR_GPIOA, PHY_BASEADDR_GPIOB,
>>> + PHY_BASEADDR_GPIOC, PHY_BASEADDR_GPIOD,
>>> + PHY_BASEADDR_GPIOE,
>>> + };
>>
>> I don't understand why gpio pin is set in mmc driver?
>> If nexell soc
Re: [RFC PATCH v2 05/13] mmc: add nexell driver
Hi,
see below my answers to your questions.
Regards
Stefan Bosch
Hi,
thanks a lot for your reply. As you already guessed I have ported the
outdated U-Boot from FriendlyARM, see:
https://github.com/friendlyarm/u-boot/tree/nanopi2-v2016.01
The original MMC-driver has been nexell_dw_mmc.c, so I renamed it to
nexell_dw_mmc_dm.c after changing to DM.
I will have a closer look at your suggestions and give you feedback ASAP.
Regards
Stefan Bosch
Am 02.04.20 um 13:03 schrieb Jaehoon Chung:
Hi,
On 3/28/20 6:43 PM, Stefan Bosch wrote:
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- mmc: nexell_dw_mmc.c changed to nexell_dw_mmc_dm.c (switched to DM).
It doesn't need to add postfix as _dm.
Ok, I have renamed it to nexell_dw_mmc.c.
Signed-off-by: Stefan Bosch
---
Changes in v2:
- commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted
into separate commits for gpio, i2c, mmc, pwm.
drivers/mmc/Kconfig| 6 +
drivers/mmc/Makefile | 1 +
drivers/mmc/nexell_dw_mmc_dm.c | 350 +
3 files changed, 357 insertions(+)
create mode 100644 drivers/mmc/nexell_dw_mmc_dm.c
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 2f0eedc..bb8e7c0 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -253,6 +253,12 @@ config MMC_DW_SNPS
This selects support for Synopsys DesignWare Memory Card Interface
driver
extensions used in various Synopsys ARC devboards.
+config NEXELL_DWMMC
+ bool "Nexell SD/MMC controller support"
+ depends on ARCH_NEXELL
+ depends on MMC_DW
+ default y
Not depends on DM_MMC?
You are right, I have inserted "depends on DM_MMC". I missed this when
changing to DM.
+
config MMC_MESON_GX
bool "Meson GX EMMC controller support"
depends on DM_MMC && BLK && ARCH_MESON
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 9c1f8e5..a7b5a7b 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
obj-$(CONFIG_JZ47XX_MMC) += jz_mmc.o
+obj-$(CONFIG_NEXELL_DWMMC) += nexell_dw_mmc_dm.o
# SDHCI
obj-$(CONFIG_MMC_SDHCI) += sdhci.o
diff --git a/drivers/mmc/nexell_dw_mmc_dm.c b/drivers/mmc/nexell_dw_mmc_dm.c
new file mode 100644
index 000..b06b60d
--- /dev/null
+++ b/drivers/mmc/nexell_dw_mmc_dm.c
@@ -0,0 +1,350 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Nexell
+ * Youngbok, Park
+ *
+ * (C) Copyright 2019 Stefan Bosch
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DWMCI_CLKSEL 0x09C
+#define DWMCI_SHIFT_0 0x0
+#define DWMCI_SHIFT_1 0x1
+#define DWMCI_SHIFT_2 0x2
+#define DWMCI_SHIFT_3 0x3
+#define DWMCI_SET_SAMPLE_CLK(x)(x)
+#define DWMCI_SET_DRV_CLK(x) ((x) << 16)
+#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
+#define DWMCI_CLKCTRL 0x114
+#define NX_MMC_CLK_DELAY(x, y, a, b) x) & 0xFF) << 0) |\
+ (((y) & 0x03) << 16) |\
+ (((a) & 0xFF) << 8) |\
+ (((b) & 0x03) << 24))
+
+struct nexell_mmc_plat {
+ struct mmc_config cfg;
+ struct mmc mmc;
+};
+
+struct nexell_dwmmc_priv {
+ struct clk *clk;
+ struct dwmci_host host;
+ int fifo_size;
+ bool fifo_mode;
+ int frequency;
+ u32 min_freq;
+ u32 max_freq;
+ int d_delay;
+ int d_shift;
+ int s_delay;
+ int s_shift;
+
+};
+
+struct clk *clk_get(const char *id);
+
+static void set_pin_stat(int index, int bit, int value)
+{
+#if !defined(CONFIG_SPL_BUILD)
+ nx_gpio_set_pad_function(index, bit, value);
+#else
+#if defined(CONFIG_ARCH_S5P4418) ||\
+ defined(CONFIG_ARCH_S5P6818)
+
+ unsigned long base[5] = {
+ PHY_BASEADDR_GPIOA, PHY_BASEADDR_GPIOB,
+ PHY_BASEADDR_GPIOC, PHY_BASEADDR_GPIOD,
+ PHY_BASEADDR_GPIOE,
+ };
I don't understand why gpio pin is set in mmc driver?
If nexell soc will change the gpio map and function value, does it needs to add
other gpio control?
+
+ dw_mmc_set_pin(base[index], bit, value);
+#endif
+#endif
+}
+
+static void nx_dw_mmc_set_pin(struct dwmci_host *host)
+{
+ debug(" %s(): dev_index == %d", __func__, host->dev_index);
+
+ switch (host->dev_index) {
+ case 0:
+ set_pin_stat(0, 29, 1);
+ set_pin_stat(0, 31, 1);
+ set_pin_stat(1, 1, 1);
+ set_pin_stat(1, 3, 1);
+ set_pin_stat(1, 5, 1);
+ set_pin_stat(1, 7, 1);
+ break;
+ case 1:
+ set_pin_stat(3, 22,
Re: [RFC PATCH v2 05/13] mmc: add nexell driver
Hi,
thanks a lot for your reply. As you already guessed I have ported the
outdated U-Boot from FriendlyARM, see:
https://github.com/friendlyarm/u-boot/tree/nanopi2-v2016.01
The original MMC-driver has been nexell_dw_mmc.c, so I renamed it to
nexell_dw_mmc_dm.c after changing to DM.
I will have a closer look at your suggestions and give you feedback ASAP.
Regards
Stefan Bosch
Am 02.04.20 um 13:03 schrieb Jaehoon Chung:
Hi,
On 3/28/20 6:43 PM, Stefan Bosch wrote:
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- mmc: nexell_dw_mmc.c changed to nexell_dw_mmc_dm.c (switched to DM).
It doesn't need to add postfix as _dm.
Signed-off-by: Stefan Bosch
---
Changes in v2:
- commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted
into separate commits for gpio, i2c, mmc, pwm.
drivers/mmc/Kconfig| 6 +
drivers/mmc/Makefile | 1 +
drivers/mmc/nexell_dw_mmc_dm.c | 350 +
3 files changed, 357 insertions(+)
create mode 100644 drivers/mmc/nexell_dw_mmc_dm.c
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 2f0eedc..bb8e7c0 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -253,6 +253,12 @@ config MMC_DW_SNPS
This selects support for Synopsys DesignWare Memory Card Interface
driver
extensions used in various Synopsys ARC devboards.
+config NEXELL_DWMMC
+ bool "Nexell SD/MMC controller support"
+ depends on ARCH_NEXELL
+ depends on MMC_DW
+ default y
Not depends on DM_MMC?
+
config MMC_MESON_GX
bool "Meson GX EMMC controller support"
depends on DM_MMC && BLK && ARCH_MESON
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 9c1f8e5..a7b5a7b 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
obj-$(CONFIG_JZ47XX_MMC) += jz_mmc.o
+obj-$(CONFIG_NEXELL_DWMMC) += nexell_dw_mmc_dm.o
# SDHCI
obj-$(CONFIG_MMC_SDHCI) += sdhci.o
diff --git a/drivers/mmc/nexell_dw_mmc_dm.c b/drivers/mmc/nexell_dw_mmc_dm.c
new file mode 100644
index 000..b06b60d
--- /dev/null
+++ b/drivers/mmc/nexell_dw_mmc_dm.c
@@ -0,0 +1,350 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Nexell
+ * Youngbok, Park
+ *
+ * (C) Copyright 2019 Stefan Bosch
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DWMCI_CLKSEL 0x09C
+#define DWMCI_SHIFT_0 0x0
+#define DWMCI_SHIFT_1 0x1
+#define DWMCI_SHIFT_2 0x2
+#define DWMCI_SHIFT_3 0x3
+#define DWMCI_SET_SAMPLE_CLK(x)(x)
+#define DWMCI_SET_DRV_CLK(x) ((x) << 16)
+#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
+#define DWMCI_CLKCTRL 0x114
+#define NX_MMC_CLK_DELAY(x, y, a, b) x) & 0xFF) << 0) |\
+ (((y) & 0x03) << 16) |\
+ (((a) & 0xFF) << 8) |\
+ (((b) & 0x03) << 24))
+
+struct nexell_mmc_plat {
+ struct mmc_config cfg;
+ struct mmc mmc;
+};
+
+struct nexell_dwmmc_priv {
+ struct clk *clk;
+ struct dwmci_host host;
+ int fifo_size;
+ bool fifo_mode;
+ int frequency;
+ u32 min_freq;
+ u32 max_freq;
+ int d_delay;
+ int d_shift;
+ int s_delay;
+ int s_shift;
+
+};
+
+struct clk *clk_get(const char *id);
+
+static void set_pin_stat(int index, int bit, int value)
+{
+#if !defined(CONFIG_SPL_BUILD)
+ nx_gpio_set_pad_function(index, bit, value);
+#else
+#if defined(CONFIG_ARCH_S5P4418) ||\
+ defined(CONFIG_ARCH_S5P6818)
+
+ unsigned long base[5] = {
+ PHY_BASEADDR_GPIOA, PHY_BASEADDR_GPIOB,
+ PHY_BASEADDR_GPIOC, PHY_BASEADDR_GPIOD,
+ PHY_BASEADDR_GPIOE,
+ };
I don't understand why gpio pin is set in mmc driver?
If nexell soc will change the gpio map and function value, does it needs to add
other gpio control?
+
+ dw_mmc_set_pin(base[index], bit, value);
+#endif
+#endif
+}
+
+static void nx_dw_mmc_set_pin(struct dwmci_host *host)
+{
+ debug(" %s(): dev_index == %d", __func__, host->dev_index);
+
+ switch (host->dev_index) {
+ case 0:
+ set_pin_stat(0, 29, 1);
+ set_pin_stat(0, 31, 1);
+ set_pin_stat(1, 1, 1);
+ set_pin_stat(1, 3, 1);
+ set_pin_stat(1, 5, 1);
+ set_pin_stat(1, 7, 1);
+ break;
+ case 1:
+ set_pin_stat(3, 22, 1);
+ set_pin_stat(3, 23, 1);
+ set_pin_stat(3, 24, 1);
+ set_pin_stat(3, 25, 1);
+ set_pin_stat(3, 26, 1);
+ set_pin_stat(3, 27, 1);
Re: [RFC PATCH v2 05/13] mmc: add nexell driver
Hi,
On 3/28/20 6:43 PM, Stefan Bosch wrote:
> Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
> - mmc: nexell_dw_mmc.c changed to nexell_dw_mmc_dm.c (switched to DM).
It doesn't need to add postfix as _dm.
>
> Signed-off-by: Stefan Bosch
> ---
>
> Changes in v2:
> - commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted
> into separate commits for gpio, i2c, mmc, pwm.
>
> drivers/mmc/Kconfig| 6 +
> drivers/mmc/Makefile | 1 +
> drivers/mmc/nexell_dw_mmc_dm.c | 350
> +
> 3 files changed, 357 insertions(+)
> create mode 100644 drivers/mmc/nexell_dw_mmc_dm.c
>
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index 2f0eedc..bb8e7c0 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -253,6 +253,12 @@ config MMC_DW_SNPS
> This selects support for Synopsys DesignWare Memory Card Interface
> driver
> extensions used in various Synopsys ARC devboards.
>
> +config NEXELL_DWMMC
> + bool "Nexell SD/MMC controller support"
> + depends on ARCH_NEXELL
> + depends on MMC_DW
> + default y
Not depends on DM_MMC?
> +
> config MMC_MESON_GX
> bool "Meson GX EMMC controller support"
> depends on DM_MMC && BLK && ARCH_MESON
> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
> index 9c1f8e5..a7b5a7b 100644
> --- a/drivers/mmc/Makefile
> +++ b/drivers/mmc/Makefile
> @@ -43,6 +43,7 @@ obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
> obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
> obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
> obj-$(CONFIG_JZ47XX_MMC) += jz_mmc.o
> +obj-$(CONFIG_NEXELL_DWMMC) += nexell_dw_mmc_dm.o
>
> # SDHCI
> obj-$(CONFIG_MMC_SDHCI) += sdhci.o
> diff --git a/drivers/mmc/nexell_dw_mmc_dm.c b/drivers/mmc/nexell_dw_mmc_dm.c
> new file mode 100644
> index 000..b06b60d
> --- /dev/null
> +++ b/drivers/mmc/nexell_dw_mmc_dm.c
> @@ -0,0 +1,350 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2016 Nexell
> + * Youngbok, Park
> + *
> + * (C) Copyright 2019 Stefan Bosch
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define DWMCI_CLKSEL 0x09C
> +#define DWMCI_SHIFT_00x0
> +#define DWMCI_SHIFT_10x1
> +#define DWMCI_SHIFT_20x2
> +#define DWMCI_SHIFT_30x3
> +#define DWMCI_SET_SAMPLE_CLK(x) (x)
> +#define DWMCI_SET_DRV_CLK(x) ((x) << 16)
> +#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
> +#define DWMCI_CLKCTRL0x114
> +#define NX_MMC_CLK_DELAY(x, y, a, b) x) & 0xFF) << 0) |\
> + (((y) & 0x03) << 16) |\
> + (((a) & 0xFF) << 8) |\
> + (((b) & 0x03) << 24))
> +
> +struct nexell_mmc_plat {
> + struct mmc_config cfg;
> + struct mmc mmc;
> +};
> +
> +struct nexell_dwmmc_priv {
> + struct clk *clk;
> + struct dwmci_host host;
> + int fifo_size;
> + bool fifo_mode;
> + int frequency;
> + u32 min_freq;
> + u32 max_freq;
> + int d_delay;
> + int d_shift;
> + int s_delay;
> + int s_shift;
> +
> +};
> +
> +struct clk *clk_get(const char *id);
> +
> +static void set_pin_stat(int index, int bit, int value)
> +{
> +#if !defined(CONFIG_SPL_BUILD)
> + nx_gpio_set_pad_function(index, bit, value);
> +#else
> +#if defined(CONFIG_ARCH_S5P4418) || \
> + defined(CONFIG_ARCH_S5P6818)
> +
> + unsigned long base[5] = {
> + PHY_BASEADDR_GPIOA, PHY_BASEADDR_GPIOB,
> + PHY_BASEADDR_GPIOC, PHY_BASEADDR_GPIOD,
> + PHY_BASEADDR_GPIOE,
> + };
I don't understand why gpio pin is set in mmc driver?
If nexell soc will change the gpio map and function value, does it needs to add
other gpio control?
> +
> + dw_mmc_set_pin(base[index], bit, value);
> +#endif
> +#endif
> +}
> +
> +static void nx_dw_mmc_set_pin(struct dwmci_host *host)
> +{
> + debug(" %s(): dev_index == %d", __func__, host->dev_index);
> +
> + switch (host->dev_index) {
> + case 0:
> + set_pin_stat(0, 29, 1);
> + set_pin_stat(0, 31, 1);
> + set_pin_stat(1, 1, 1);
> + set_pin_stat(1, 3, 1);
> + set_pin_stat(1, 5, 1);
> + set_pin_stat(1, 7, 1);
> + break;
> + case 1:
> + set_pin_stat(3, 22, 1);
> + set_pin_stat(3, 23, 1);
> + set_pin_stat(3, 24, 1);
> + set_pin_stat(3, 25, 1);
> + set_pin_stat(3, 26, 1);
> + set_pin_stat(3, 27, 1);
> + break;
> + case 2:
> + set_pin_stat(2, 18, 2);
> + set_pin_stat(2, 19, 2);
> + set_pin_stat(2, 20, 2);
> + set_pin_stat(2, 21, 2);
> + set_pin_stat(2, 22, 2);
[RFC PATCH v2 05/13] mmc: add nexell driver
Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01:
- mmc: nexell_dw_mmc.c changed to nexell_dw_mmc_dm.c (switched to DM).
Signed-off-by: Stefan Bosch
---
Changes in v2:
- commit "i2c: mmc: add nexell driver (gpio, i2c, mmc, pwm)" splitted
into separate commits for gpio, i2c, mmc, pwm.
drivers/mmc/Kconfig| 6 +
drivers/mmc/Makefile | 1 +
drivers/mmc/nexell_dw_mmc_dm.c | 350 +
3 files changed, 357 insertions(+)
create mode 100644 drivers/mmc/nexell_dw_mmc_dm.c
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 2f0eedc..bb8e7c0 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -253,6 +253,12 @@ config MMC_DW_SNPS
This selects support for Synopsys DesignWare Memory Card Interface
driver
extensions used in various Synopsys ARC devboards.
+config NEXELL_DWMMC
+ bool "Nexell SD/MMC controller support"
+ depends on ARCH_NEXELL
+ depends on MMC_DW
+ default y
+
config MMC_MESON_GX
bool "Meson GX EMMC controller support"
depends on DM_MMC && BLK && ARCH_MESON
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 9c1f8e5..a7b5a7b 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
obj-$(CONFIG_JZ47XX_MMC) += jz_mmc.o
+obj-$(CONFIG_NEXELL_DWMMC) += nexell_dw_mmc_dm.o
# SDHCI
obj-$(CONFIG_MMC_SDHCI)+= sdhci.o
diff --git a/drivers/mmc/nexell_dw_mmc_dm.c b/drivers/mmc/nexell_dw_mmc_dm.c
new file mode 100644
index 000..b06b60d
--- /dev/null
+++ b/drivers/mmc/nexell_dw_mmc_dm.c
@@ -0,0 +1,350 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Nexell
+ * Youngbok, Park
+ *
+ * (C) Copyright 2019 Stefan Bosch
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DWMCI_CLKSEL 0x09C
+#define DWMCI_SHIFT_0 0x0
+#define DWMCI_SHIFT_1 0x1
+#define DWMCI_SHIFT_2 0x2
+#define DWMCI_SHIFT_3 0x3
+#define DWMCI_SET_SAMPLE_CLK(x)(x)
+#define DWMCI_SET_DRV_CLK(x) ((x) << 16)
+#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
+#define DWMCI_CLKCTRL 0x114
+#define NX_MMC_CLK_DELAY(x, y, a, b) x) & 0xFF) << 0) |\
+ (((y) & 0x03) << 16) |\
+ (((a) & 0xFF) << 8) |\
+ (((b) & 0x03) << 24))
+
+struct nexell_mmc_plat {
+ struct mmc_config cfg;
+ struct mmc mmc;
+};
+
+struct nexell_dwmmc_priv {
+ struct clk *clk;
+ struct dwmci_host host;
+ int fifo_size;
+ bool fifo_mode;
+ int frequency;
+ u32 min_freq;
+ u32 max_freq;
+ int d_delay;
+ int d_shift;
+ int s_delay;
+ int s_shift;
+
+};
+
+struct clk *clk_get(const char *id);
+
+static void set_pin_stat(int index, int bit, int value)
+{
+#if !defined(CONFIG_SPL_BUILD)
+ nx_gpio_set_pad_function(index, bit, value);
+#else
+#if defined(CONFIG_ARCH_S5P4418) ||\
+ defined(CONFIG_ARCH_S5P6818)
+
+ unsigned long base[5] = {
+ PHY_BASEADDR_GPIOA, PHY_BASEADDR_GPIOB,
+ PHY_BASEADDR_GPIOC, PHY_BASEADDR_GPIOD,
+ PHY_BASEADDR_GPIOE,
+ };
+
+ dw_mmc_set_pin(base[index], bit, value);
+#endif
+#endif
+}
+
+static void nx_dw_mmc_set_pin(struct dwmci_host *host)
+{
+ debug(" %s(): dev_index == %d", __func__, host->dev_index);
+
+ switch (host->dev_index) {
+ case 0:
+ set_pin_stat(0, 29, 1);
+ set_pin_stat(0, 31, 1);
+ set_pin_stat(1, 1, 1);
+ set_pin_stat(1, 3, 1);
+ set_pin_stat(1, 5, 1);
+ set_pin_stat(1, 7, 1);
+ break;
+ case 1:
+ set_pin_stat(3, 22, 1);
+ set_pin_stat(3, 23, 1);
+ set_pin_stat(3, 24, 1);
+ set_pin_stat(3, 25, 1);
+ set_pin_stat(3, 26, 1);
+ set_pin_stat(3, 27, 1);
+ break;
+ case 2:
+ set_pin_stat(2, 18, 2);
+ set_pin_stat(2, 19, 2);
+ set_pin_stat(2, 20, 2);
+ set_pin_stat(2, 21, 2);
+ set_pin_stat(2, 22, 2);
+ set_pin_stat(2, 23, 2);
+ if (host->buswidth == 8) {
+ set_pin_stat(4, 21, 2);
+ set_pin_stat(4, 22, 2);
+ set_pin_stat(4, 23, 2);
+ set_pin_stat(4, 24, 2);
+ }
+ break;
+ default:
+ debug(" is invalid!");
+ }
+ debug("\n");
+}
+
+static void nx_dw_mmc_clksel(struct dwmci_host *host)
+{
+ u32 val;
+
