Re: [U-Boot] [ v2 06/10] video: add MIPI DSI host controller bridge
Hi Yannick,
On 13 July 2018 at 06:11, Yannick Fertré wrote:
> Add a Synopsys Designware MIPI DSI host bridge driver, based on the
> Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
>
> Signed-off-by: Yannick Fertré
> ---
> drivers/video/Kconfig | 9 +
> drivers/video/Makefile | 1 +
> drivers/video/dw_mipi_dsi.c | 826
>
> include/dw_mipi_dsi.h | 32 ++
> 4 files changed, 868 insertions(+)
> create mode 100644 drivers/video/dw_mipi_dsi.c
> create mode 100644 include/dw_mipi_dsi.h
>
> diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
> index e1029e5..3ccc8df 100644
> --- a/drivers/video/Kconfig
> +++ b/drivers/video/Kconfig
> @@ -674,6 +674,15 @@ config VIDEO_DW_HDMI
> rather requires a SoC-specific glue driver to call it), it
> can not be enabled from the configuration menu.
>
> +config VIDEO_DW_MIPI_DSI
> + bool
> + help
> + Enables the common driver code for the Synopsis Designware
> + MIPI DSI block found in SoCs from various vendors.
> + As this does not provide any functionality by itself (but
> + rather requires a SoC-specific glue driver to call it), it
> + can not be enabled from the configuration menu.
> +
> config VIDEO_SIMPLE
> bool "Simple display driver for preconfigured display"
> help
> diff --git a/drivers/video/Makefile b/drivers/video/Makefile
> index 018343f..bb2fd3c 100644
> --- a/drivers/video/Makefile
> +++ b/drivers/video/Makefile
> @@ -52,6 +52,7 @@ obj-$(CONFIG_FORMIKE) += formike.o
> obj-$(CONFIG_LG4573) += lg4573.o
> obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
> obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
> +obj-$(CONFIG_VIDEO_DW_MIPI_DSI) += dw_mipi_dsi.o
> obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_display.o
> obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
> obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
> diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
> new file mode 100644
> index 000..db278c5
> --- /dev/null
> +++ b/drivers/video/dw_mipi_dsi.c
> @@ -0,0 +1,826 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2016, Fuzhou Rockchip Electronics Co., Ltd
> + * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
> + * Author(s): Philippe Cornu for STMicroelectronics.
> + *Yannick Fertre for STMicroelectronics.
> + *
> + * This generic Synopsys DesignWare MIPI DSI host driver is inspired from
> + * the Linux Kernel driver drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
Please check the ordering here.
> +
> +#define HWVER_131 0x31333100 /* IP version 1.31 */
> +
> +#define DSI_VERSION0x00
> +#define VERSIONGENMASK(31, 8)
> +
> +#define DSI_PWR_UP 0x04
> +#define RESET 0
> +#define POWERUPBIT(0)
> +
> +#define DSI_CLKMGR_CFG 0x08
> +#define TO_CLK_DIVISION(div) (((div) & 0xff) << 8)
> +#define TX_ESC_CLK_DIVISION(div) ((div) & 0xff)
Instead of this can you use something like:
#define TO_CLK_DIVISION_SHIFT 8
#define TO_CLK_DIVISION_MASK (0xff << TO_CLK_DIVISION_SHIFT)
then do the shift in the code which need it below.
xxx << TO_CLK_DIVISION_SHIFT
> diff --git a/include/dw_mipi_dsi.h b/include/dw_mipi_dsi.h
> new file mode 100644
> index 000..f8482f7
> --- /dev/null
> +++ b/include/dw_mipi_dsi.h
> @@ -0,0 +1,32 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2017-2018, STMicroelectronics - All Rights Reserved
> + *
> + * Authors: Yannick Fertre
> + * Philippe Cornu
> + *
> + * This generic Synopsys DesignWare MIPI DSI host include is inspired from
> + * the Linux Kernel include file include/drm/bridge/dw_mipi_dsi.h.
> + */
> +
> +#ifndef __DW_MIPI_DSI__
> +#define __DW_MIPI_DSI__
> +
> +#include
> +
> +struct dw_mipi_dsi_phy_ops {
> + int (*init)(void *priv_data);
> + int (*get_lane_mbps)(void *priv_data, struct display_timing *timings,
> +u32 lanes, u32 format, unsigned int *lane_mbps);
> +};
> +
> +struct dw_mipi_dsi_plat_data {
> + unsigned int max_data_lanes;
> + const struct dw_mipi_dsi_phy_ops *phy_ops;
> + struct udevice *panel;
> +};
> +
> +int dw_mipi_dsi_init_bridge(struct mipi_dsi_device *device);
> +void dw_mipi_dsi_bridge_enable(struct mipi_dsi_device *device);
This should be in a uclass I think.
Regards
Simon
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[U-Boot] [ v2 06/10] video: add MIPI DSI host controller bridge
Add a Synopsys Designware MIPI DSI host bridge driver, based on the
Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
Signed-off-by: Yannick Fertré
---
drivers/video/Kconfig | 9 +
drivers/video/Makefile | 1 +
drivers/video/dw_mipi_dsi.c | 826
include/dw_mipi_dsi.h | 32 ++
4 files changed, 868 insertions(+)
create mode 100644 drivers/video/dw_mipi_dsi.c
create mode 100644 include/dw_mipi_dsi.h
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index e1029e5..3ccc8df 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -674,6 +674,15 @@ config VIDEO_DW_HDMI
rather requires a SoC-specific glue driver to call it), it
can not be enabled from the configuration menu.
+config VIDEO_DW_MIPI_DSI
+ bool
+ help
+ Enables the common driver code for the Synopsis Designware
+ MIPI DSI block found in SoCs from various vendors.
+ As this does not provide any functionality by itself (but
+ rather requires a SoC-specific glue driver to call it), it
+ can not be enabled from the configuration menu.
+
config VIDEO_SIMPLE
bool "Simple display driver for preconfigured display"
help
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 018343f..bb2fd3c 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_FORMIKE) += formike.o
obj-$(CONFIG_LG4573) += lg4573.o
obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
+obj-$(CONFIG_VIDEO_DW_MIPI_DSI) += dw_mipi_dsi.o
obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_display.o
obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
new file mode 100644
index 000..db278c5
--- /dev/null
+++ b/drivers/video/dw_mipi_dsi.c
@@ -0,0 +1,826 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2016, Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu for STMicroelectronics.
+ *Yannick Fertre for STMicroelectronics.
+ *
+ * This generic Synopsys DesignWare MIPI DSI host driver is inspired from
+ * the Linux Kernel driver drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HWVER_131 0x31333100 /* IP version 1.31 */
+
+#define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
+
+#define DSI_PWR_UP 0x04
+#define RESET 0
+#define POWERUPBIT(0)
+
+#define DSI_CLKMGR_CFG 0x08
+#define TO_CLK_DIVISION(div) (((div) & 0xff) << 8)
+#define TX_ESC_CLK_DIVISION(div) ((div) & 0xff)
+
+#define DSI_DPI_VCID 0x0c
+#define DPI_VCID(vcid) ((vcid) & 0x3)
+
+#define DSI_DPI_COLOR_CODING 0x10
+#define LOOSELY18_EN BIT(8)
+#define DPI_COLOR_CODING_16BIT_1 0x0
+#define DPI_COLOR_CODING_16BIT_2 0x1
+#define DPI_COLOR_CODING_16BIT_3 0x2
+#define DPI_COLOR_CODING_18BIT_1 0x3
+#define DPI_COLOR_CODING_18BIT_2 0x4
+#define DPI_COLOR_CODING_24BIT 0x5
+
+#define DSI_DPI_CFG_POL0x14
+#define COLORM_ACTIVE_LOW BIT(4)
+#define SHUTD_ACTIVE_LOW BIT(3)
+#define HSYNC_ACTIVE_LOW BIT(2)
+#define VSYNC_ACTIVE_LOW BIT(1)
+#define DATAEN_ACTIVE_LOW BIT(0)
+
+#define DSI_DPI_LP_CMD_TIM 0x18
+#define OUTVACT_LPCMD_TIME(p) (((p) & 0xff) << 16)
+#define INVACT_LPCMD_TIME(p) ((p) & 0xff)
+
+#define DSI_DBI_VCID 0x1c
+#define DSI_DBI_CFG0x20
+#define DSI_DBI_PARTITIONING_EN0x24
+#define DSI_DBI_CMDSIZE0x28
+
+#define DSI_PCKHDL_CFG 0x2c
+#define CRC_RX_EN BIT(4)
+#define ECC_RX_EN BIT(3)
+#define BTA_EN BIT(2)
+#define EOTP_RX_EN BIT(1)
+#define EOTP_TX_EN BIT(0)
+
+#define DSI_GEN_VCID 0x30
+
+#define DSI_MODE_CFG 0x34
+#define ENABLE_VIDEO_MODE 0
+#define ENABLE_CMD_MODEBIT(0)
+
+#define DSI_VID_MODE_CFG 0x38
+#define ENABLE_LOW_POWER (0x3f << 8)
+#define ENABLE_LOW_POWER_MASK (0x3f << 8)
+#define VID_MODE_TYPE_NON_BURST_SYNC_PULSES0x0
+#define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS0x1
+#define VID_MODE_TYPE_BURST0x2
+#define VID_MODE_TYPE_MASK 0x3
+
+#define
