Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.11-rc2
Hi Tom,
On 16. 10. 18 17:04, Michal Simek wrote:
> On 16.10.2018 15:38, Tom Rini wrote:
>> On Tue, Oct 16, 2018 at 10:32:14AM +0200, Michal Simek wrote:
>>> On 16.10.2018 02:32, Tom Rini wrote:
On Mon, Oct 15, 2018 at 04:25:01PM +0200, Michal Simek wrote:
> Hi Tom,
>
> please consider to pull these patches to your tree.
> Buildmain for xilinx boards looks good and travis is not done yet but
> link is here (I have seen several timeouts recently but it was there
> even on clear mainline).
> https://travis-ci.org/michalsimek/u-boot/builds/441591781
>
> If you don't like this please at least cherry-pick this one
> Revert "fdt: fdtdec_setup_memory_banksize() use livetree"
> (sha1: 01ac0843aeedc3c95fe68e7ce6a8f35bf1a04b23)
> which I need for getting SPL up and running again on zynq/zynqmp boards.
>
> Thanks,
> Michal
>
> The following changes since commit
> 15f22ac2eea5ee9f17b14a143c94e7480bbafbff:
>
> ldpaa_eth.c: Fix warning when PHYLIB is not enabled (2018-10-12
> 07:41:24 -0400)
>
> are available in the git repository at:
>
> git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.11-rc2
>
> for you to fetch changes up to 045c62be10d64a558f56febcaa2d01b1abbcfa00:
>
> cmd: kgdb: Enable kgdb only for PPC (2018-10-15 12:36:37 +0200)
>
NAK. As this stands it breaks qemu_arm running the test.py code due to:
commit 6d213c125c45db9c9d4dde5348d6e002c9f58909
Author: Siva Durga Prasad Paladugu
Date: Mon Jan 22 17:49:37 2018 +0530
serial: pl01x: Get clock from clock node if no clock property found
This patch gets clock from clock nodes if no clock property found
in serial node.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
>>>
>>> I have debugged it more and the patch is good but information coming
>>> from qemu are not correct for u-boot.
>>>
>>> What it is happening for arm case is that qemu passing DT which contains
>>> these 2 fragments:
>>>
>>> pl011@900 {
>>> clock-names = "uartclk", "apb_pclk";
>>> clocks = <0x8000 0x8000>;
>>> interrupts = <0x 0x0001 0x0004>;
>>> reg = <0x 0x0900 0x 0x1000>;
>>> compatible = "arm,pl011", "arm,primecell";
>>> };
>>>
>>> apb-pclk {
>>> phandle = <0x8000>;
>>> clock-output-names = "clk24mhz";
>>> clock-frequency = <0x016e3600>;
>>> #clock-cells = <0x>;
>>> compatible = "fixed-clock";
>>> };
>>>
>>> That means that when this patch is applied new code is taken because
>>> plat->clock = dev_read_u32_default(dev, "clock", 1);
>>> is returning default value 1.
>>> (I see clock property used by hi6220 which should be out of DT binding)
>>>
>>> Then clocks are taken and we get to apb-pclk which is fixed clock but it
>>> is missing "u-boot,dm-pre-reloc" property to get it work. (In connection
>>> to that CONFIG_CLK should be enabled for qemu_arm_defconfig).
>>>
>>> Just a summary of this is that it requires updating qemu by
>>> 1. adding non standard "clock" property to qemu hw/arm/virt.c
>>> or
>>> 2. by enabling CONFIG_CLK(easy) and again adding "u-boot,dm-pre-reloc"
>>> to qemu hw/arm/virt.c
>>>
>>> As is visible this requires qemu updates to get this work.
>>>
>>> Can you please tell me which way you want to go?
>>
>> I think we need a 3rd option as I can't see upstream qemu accepting a
>> U-Boot specific U-Boot property, and it'll create a bit of a support
>> nightmare too.
>
> Good. I want to also wired Versal ASAP when qemu patches reach mainline
> to make sure that we have good coverage from the beginning that's why
> having 3rd option with different qemu HEAD would be good.
>
> And as the part of Versal qemu upstreaming we have added u-boot property
> and will see how it goes.
I have an updated on this thread. Xilinx Versal was merged to mainline
qemu and even with u-boot,dm-pre-reloc property.
https://github.com/qemu/qemu/blob/master/hw/arm/xlnx-versal-virt.c#L88
It means there shouldn't be a problem to add the same property to
hw/arm/virt.c.
Thanks,
Michal
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.11-rc2 v2
On Tue, Oct 16, 2018 at 07:56:12PM +0200, Michal Simek wrote: > Hi Tom, > > as we discussed here is the second PR without that problematic serial patch. > > My travis session hasn't finished yet on this rebased branch > https://travis-ci.org/michalsimek/u-boot/builds/442217785 > but on non rebased version it was ok > https://travis-ci.org/michalsimek/u-boot/builds/442057723 > > Please run your tests and let me know if you see any issue. > > Thanks, > Michal > > The following changes since commit 892f93de61c375e8c3aabf03493af32115f51880: > > Prepare v2018.11-rc2 (2018-10-15 20:26:22 -0400) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git > tags/xilinx-for-v2018.11-rc2-v2 > > for you to fetch changes up to b92055064e56207e284ae966dbd7bd407a7b0e8d: > > cmd: kgdb: Enable kgdb only for PPC (2018-10-16 16:53:25 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes for v2018.11-rc2 v2
Hi Tom, as we discussed here is the second PR without that problematic serial patch. My travis session hasn't finished yet on this rebased branch https://travis-ci.org/michalsimek/u-boot/builds/442217785 but on non rebased version it was ok https://travis-ci.org/michalsimek/u-boot/builds/442057723 Please run your tests and let me know if you see any issue. Thanks, Michal The following changes since commit 892f93de61c375e8c3aabf03493af32115f51880: Prepare v2018.11-rc2 (2018-10-15 20:26:22 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.11-rc2-v2 for you to fetch changes up to b92055064e56207e284ae966dbd7bd407a7b0e8d: cmd: kgdb: Enable kgdb only for PPC (2018-10-16 16:53:25 +0200) Xilinx changes for v2018.11-rc2-v2 FPGA: - Fix SPL fpga loading from FIT ARM64: - Fix gic accesses in EL2/EL1 Xilinx: - Add dlc20 board support - Add Versal board support - Sync defconfigs - Enable MP via Kconfig - Add missing efuse node - Enable CDC for zcu100 cmd: - Fix kgdb Kconfig dependency Michal Simek (12): spl: fpga: Implement fpga bistream loading with fpga_load arm: zynq: Enable FIT fpga loading in SPL for zc706 arm: zynq: Add support for DLC20 board arm: zynq: Add efuse node for Zynq-7000S devices xilinx: Sync defconfigs with current Kconfig arm64: zynqmp: Enable CDC ethernet gadget for zcu100/Ultra96 arm64: gic: Do gicv3 secure initialization based on EL level arm64: versal: Add support for new Xilinx Versal ACAPs net: gem: Do not setup any clock for Xilinx SoC Versal arm64: versal: Add Xilinx Versal Virtual QEMU board arm64: zynqmp: Enable MP by default via Kconfig cmd: kgdb: Enable kgdb only for PPC Siva Durga Prasad Paladugu (2): arm64: zynqmp: Move TCM initialization to a separate routine arm64: zynqmp: Add new command for TCM initialization Kconfig| 2 +- MAINTAINERS| 6 arch/arm/Kconfig | 11 +++ arch/arm/Makefile | 1 + arch/arm/cpu/armv8/zynqmp/cpu.c| 12 +-- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynq-7000.dtsi| 5 +++ arch/arm/dts/zynq-dlc20-rev1.0.dts | 103 + arch/arm/include/asm/arch-zynqmp/sys_proto.h | 3 ++ arch/arm/lib/gic_64.S | 16 + arch/arm/mach-versal/Kconfig | 44 + arch/arm/mach-versal/Makefile | 8 + arch/arm/mach-versal/clk.c | 30 + arch/arm/mach-versal/cpu.c | 83 ++ arch/arm/mach-versal/include/mach/gpio.h | 6 arch/arm/mach-versal/include/mach/hardware.h | 34 +++ arch/arm/mach-versal/include/mach/sys_proto.h | 6 board/xilinx/versal/MAINTAINERS| 7 board/xilinx/versal/Makefile | 7 board/xilinx/versal/board.c| 81 + board/xilinx/zynq/zynq-dlc20-rev1.0/ps7_init_gpl.c | 280 ++ board/xilinx/zynqmp/cmds.c | 37 - cmd/Kconfig| 1 + common/spl/spl_fit.c | 34 +-- configs/avnet_ultra96_rev1_defconfig | 8 +++-- configs/microblaze-generic_defconfig | 2 +- configs/xilinx_versal_virt_defconfig | 68 ++ configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc1_defconfig | 1 + configs/xilinx_zynqmp_mini_nand_defconfig | 1 + configs/xilinx_zynqmp_mini_qspi_defconfig | 1 - configs/xilinx_zynqmp_zc1232_revA_defconfig| 1 - configs/xilinx_zynqmp_zc1254_revA_defconfig| 1 - configs/xilinx_zynqmp_zc1275_revA_defconfig| 1 - configs/xilinx_zynqmp_zc1275_revB_defconfig| 1 - configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 - configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 - configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig | 1 - configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 1 - configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 1 - configs/xilinx_zynqmp_zcu100_revC_defconfig|
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.11-rc2
On 16.10.2018 15:38, Tom Rini wrote:
> On Tue, Oct 16, 2018 at 10:32:14AM +0200, Michal Simek wrote:
>> On 16.10.2018 02:32, Tom Rini wrote:
>>> On Mon, Oct 15, 2018 at 04:25:01PM +0200, Michal Simek wrote:
>>>
Hi Tom,
please consider to pull these patches to your tree.
Buildmain for xilinx boards looks good and travis is not done yet but
link is here (I have seen several timeouts recently but it was there
even on clear mainline).
https://travis-ci.org/michalsimek/u-boot/builds/441591781
If you don't like this please at least cherry-pick this one
Revert "fdt: fdtdec_setup_memory_banksize() use livetree"
(sha1: 01ac0843aeedc3c95fe68e7ce6a8f35bf1a04b23)
which I need for getting SPL up and running again on zynq/zynqmp boards.
Thanks,
Michal
The following changes since commit
15f22ac2eea5ee9f17b14a143c94e7480bbafbff:
ldpaa_eth.c: Fix warning when PHYLIB is not enabled (2018-10-12
07:41:24 -0400)
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.11-rc2
for you to fetch changes up to 045c62be10d64a558f56febcaa2d01b1abbcfa00:
cmd: kgdb: Enable kgdb only for PPC (2018-10-15 12:36:37 +0200)
>>>
>>> NAK. As this stands it breaks qemu_arm running the test.py code due to:
>>> commit 6d213c125c45db9c9d4dde5348d6e002c9f58909
>>> Author: Siva Durga Prasad Paladugu
>>> Date: Mon Jan 22 17:49:37 2018 +0530
>>>
>>> serial: pl01x: Get clock from clock node if no clock property found
>>>
>>> This patch gets clock from clock nodes if no clock property found
>>> in serial node.
>>>
>>> Signed-off-by: Siva Durga Prasad Paladugu
>>> Signed-off-by: Michal Simek
>>
>> I have debugged it more and the patch is good but information coming
>> from qemu are not correct for u-boot.
>>
>> What it is happening for arm case is that qemu passing DT which contains
>> these 2 fragments:
>>
>> pl011@900 {
>> clock-names = "uartclk", "apb_pclk";
>> clocks = <0x8000 0x8000>;
>> interrupts = <0x 0x0001 0x0004>;
>> reg = <0x 0x0900 0x 0x1000>;
>> compatible = "arm,pl011", "arm,primecell";
>> };
>>
>> apb-pclk {
>> phandle = <0x8000>;
>> clock-output-names = "clk24mhz";
>> clock-frequency = <0x016e3600>;
>> #clock-cells = <0x>;
>> compatible = "fixed-clock";
>> };
>>
>> That means that when this patch is applied new code is taken because
>> plat->clock = dev_read_u32_default(dev, "clock", 1);
>> is returning default value 1.
>> (I see clock property used by hi6220 which should be out of DT binding)
>>
>> Then clocks are taken and we get to apb-pclk which is fixed clock but it
>> is missing "u-boot,dm-pre-reloc" property to get it work. (In connection
>> to that CONFIG_CLK should be enabled for qemu_arm_defconfig).
>>
>> Just a summary of this is that it requires updating qemu by
>> 1. adding non standard "clock" property to qemu hw/arm/virt.c
>> or
>> 2. by enabling CONFIG_CLK(easy) and again adding "u-boot,dm-pre-reloc"
>> to qemu hw/arm/virt.c
>>
>> As is visible this requires qemu updates to get this work.
>>
>> Can you please tell me which way you want to go?
>
> I think we need a 3rd option as I can't see upstream qemu accepting a
> U-Boot specific U-Boot property, and it'll create a bit of a support
> nightmare too.
Good. I want to also wired Versal ASAP when qemu patches reach mainline
to make sure that we have good coverage from the beginning that's why
having 3rd option with different qemu HEAD would be good.
And as the part of Versal qemu upstreaming we have added u-boot property
and will see how it goes.
>> It should be fine to merge my queue without this patch because qemu is
>> ignoring this clock setup anyway.
>
> OK, I'll test out an updated PR of yours once you send it, thanks!
ok.
Thanks,
Michal
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.11-rc2
On Tue, Oct 16, 2018 at 10:32:14AM +0200, Michal Simek wrote:
> On 16.10.2018 02:32, Tom Rini wrote:
> > On Mon, Oct 15, 2018 at 04:25:01PM +0200, Michal Simek wrote:
> >
> >> Hi Tom,
> >>
> >> please consider to pull these patches to your tree.
> >> Buildmain for xilinx boards looks good and travis is not done yet but
> >> link is here (I have seen several timeouts recently but it was there
> >> even on clear mainline).
> >> https://travis-ci.org/michalsimek/u-boot/builds/441591781
> >>
> >> If you don't like this please at least cherry-pick this one
> >> Revert "fdt: fdtdec_setup_memory_banksize() use livetree"
> >> (sha1: 01ac0843aeedc3c95fe68e7ce6a8f35bf1a04b23)
> >> which I need for getting SPL up and running again on zynq/zynqmp boards.
> >>
> >> Thanks,
> >> Michal
> >>
> >> The following changes since commit
> >> 15f22ac2eea5ee9f17b14a143c94e7480bbafbff:
> >>
> >> ldpaa_eth.c: Fix warning when PHYLIB is not enabled (2018-10-12
> >> 07:41:24 -0400)
> >>
> >> are available in the git repository at:
> >>
> >> git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.11-rc2
> >>
> >> for you to fetch changes up to 045c62be10d64a558f56febcaa2d01b1abbcfa00:
> >>
> >> cmd: kgdb: Enable kgdb only for PPC (2018-10-15 12:36:37 +0200)
> >>
> >
> > NAK. As this stands it breaks qemu_arm running the test.py code due to:
> > commit 6d213c125c45db9c9d4dde5348d6e002c9f58909
> > Author: Siva Durga Prasad Paladugu
> > Date: Mon Jan 22 17:49:37 2018 +0530
> >
> > serial: pl01x: Get clock from clock node if no clock property found
> >
> > This patch gets clock from clock nodes if no clock property found
> > in serial node.
> >
> > Signed-off-by: Siva Durga Prasad Paladugu
> > Signed-off-by: Michal Simek
>
> I have debugged it more and the patch is good but information coming
> from qemu are not correct for u-boot.
>
> What it is happening for arm case is that qemu passing DT which contains
> these 2 fragments:
>
> pl011@900 {
> clock-names = "uartclk", "apb_pclk";
> clocks = <0x8000 0x8000>;
> interrupts = <0x 0x0001 0x0004>;
> reg = <0x 0x0900 0x 0x1000>;
> compatible = "arm,pl011", "arm,primecell";
> };
>
> apb-pclk {
> phandle = <0x8000>;
> clock-output-names = "clk24mhz";
> clock-frequency = <0x016e3600>;
> #clock-cells = <0x>;
> compatible = "fixed-clock";
> };
>
> That means that when this patch is applied new code is taken because
> plat->clock = dev_read_u32_default(dev, "clock", 1);
> is returning default value 1.
> (I see clock property used by hi6220 which should be out of DT binding)
>
> Then clocks are taken and we get to apb-pclk which is fixed clock but it
> is missing "u-boot,dm-pre-reloc" property to get it work. (In connection
> to that CONFIG_CLK should be enabled for qemu_arm_defconfig).
>
> Just a summary of this is that it requires updating qemu by
> 1. adding non standard "clock" property to qemu hw/arm/virt.c
> or
> 2. by enabling CONFIG_CLK(easy) and again adding "u-boot,dm-pre-reloc"
> to qemu hw/arm/virt.c
>
> As is visible this requires qemu updates to get this work.
>
> Can you please tell me which way you want to go?
I think we need a 3rd option as I can't see upstream qemu accepting a
U-Boot specific U-Boot property, and it'll create a bit of a support
nightmare too.
> It should be fine to merge my queue without this patch because qemu is
> ignoring this clock setup anyway.
OK, I'll test out an updated PR of yours once you send it, thanks!
--
Tom
signature.asc
Description: PGP signature
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.11-rc2
On 16.10.2018 02:32, Tom Rini wrote:
> On Mon, Oct 15, 2018 at 04:25:01PM +0200, Michal Simek wrote:
>
>> Hi Tom,
>>
>> please consider to pull these patches to your tree.
>> Buildmain for xilinx boards looks good and travis is not done yet but
>> link is here (I have seen several timeouts recently but it was there
>> even on clear mainline).
>> https://travis-ci.org/michalsimek/u-boot/builds/441591781
>>
>> If you don't like this please at least cherry-pick this one
>> Revert "fdt: fdtdec_setup_memory_banksize() use livetree"
>> (sha1: 01ac0843aeedc3c95fe68e7ce6a8f35bf1a04b23)
>> which I need for getting SPL up and running again on zynq/zynqmp boards.
>>
>> Thanks,
>> Michal
>>
>> The following changes since commit 15f22ac2eea5ee9f17b14a143c94e7480bbafbff:
>>
>> ldpaa_eth.c: Fix warning when PHYLIB is not enabled (2018-10-12
>> 07:41:24 -0400)
>>
>> are available in the git repository at:
>>
>> git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.11-rc2
>>
>> for you to fetch changes up to 045c62be10d64a558f56febcaa2d01b1abbcfa00:
>>
>> cmd: kgdb: Enable kgdb only for PPC (2018-10-15 12:36:37 +0200)
>>
>
> NAK. As this stands it breaks qemu_arm running the test.py code due to:
> commit 6d213c125c45db9c9d4dde5348d6e002c9f58909
> Author: Siva Durga Prasad Paladugu
> Date: Mon Jan 22 17:49:37 2018 +0530
>
> serial: pl01x: Get clock from clock node if no clock property found
>
> This patch gets clock from clock nodes if no clock property found
> in serial node.
>
> Signed-off-by: Siva Durga Prasad Paladugu
> Signed-off-by: Michal Simek
I have debugged it more and the patch is good but information coming
from qemu are not correct for u-boot.
What it is happening for arm case is that qemu passing DT which contains
these 2 fragments:
pl011@900 {
clock-names = "uartclk", "apb_pclk";
clocks = <0x8000 0x8000>;
interrupts = <0x 0x0001 0x0004>;
reg = <0x 0x0900 0x 0x1000>;
compatible = "arm,pl011", "arm,primecell";
};
apb-pclk {
phandle = <0x8000>;
clock-output-names = "clk24mhz";
clock-frequency = <0x016e3600>;
#clock-cells = <0x>;
compatible = "fixed-clock";
};
That means that when this patch is applied new code is taken because
plat->clock = dev_read_u32_default(dev, "clock", 1);
is returning default value 1.
(I see clock property used by hi6220 which should be out of DT binding)
Then clocks are taken and we get to apb-pclk which is fixed clock but it
is missing "u-boot,dm-pre-reloc" property to get it work. (In connection
to that CONFIG_CLK should be enabled for qemu_arm_defconfig).
Just a summary of this is that it requires updating qemu by
1. adding non standard "clock" property to qemu hw/arm/virt.c
or
2. by enabling CONFIG_CLK(easy) and again adding "u-boot,dm-pre-reloc"
to qemu hw/arm/virt.c
As is visible this requires qemu updates to get this work.
Can you please tell me which way you want to go?
It should be fine to merge my queue without this patch because qemu is
ignoring this clock setup anyway.
Thanks,
Michal
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.11-rc2
On Mon, Oct 15, 2018 at 04:25:01PM +0200, Michal Simek wrote: > Hi Tom, > > please consider to pull these patches to your tree. > Buildmain for xilinx boards looks good and travis is not done yet but > link is here (I have seen several timeouts recently but it was there > even on clear mainline). > https://travis-ci.org/michalsimek/u-boot/builds/441591781 > > If you don't like this please at least cherry-pick this one > Revert "fdt: fdtdec_setup_memory_banksize() use livetree" > (sha1: 01ac0843aeedc3c95fe68e7ce6a8f35bf1a04b23) > which I need for getting SPL up and running again on zynq/zynqmp boards. > > Thanks, > Michal > > The following changes since commit 15f22ac2eea5ee9f17b14a143c94e7480bbafbff: > > ldpaa_eth.c: Fix warning when PHYLIB is not enabled (2018-10-12 > 07:41:24 -0400) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.11-rc2 > > for you to fetch changes up to 045c62be10d64a558f56febcaa2d01b1abbcfa00: > > cmd: kgdb: Enable kgdb only for PPC (2018-10-15 12:36:37 +0200) > NAK. As this stands it breaks qemu_arm running the test.py code due to: commit 6d213c125c45db9c9d4dde5348d6e002c9f58909 Author: Siva Durga Prasad Paladugu Date: Mon Jan 22 17:49:37 2018 +0530 serial: pl01x: Get clock from clock node if no clock property found This patch gets clock from clock nodes if no clock property found in serial node. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek Now that said, I have cherry-picked out: Author: Michal Simek Date: Wed Oct 3 15:53:52 2018 +0200 Revert "fdt: fdtdec_setup_memory_banksize() use livetree" This reverts commit c35a7d375ec8f0a8ee343ae4868be3242172632e. This commit is breaking SPL on zc706. Signed-off-by: Michal Simek Reviewed-by: Simon Glass Tested-by: Patrice Chotard [on STM32F746-disco] out of the PR as I had intended to bring that in myself but missed when Simon RB'd it. -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes for v2018.11-rc2
Hi Tom, please consider to pull these patches to your tree. Buildmain for xilinx boards looks good and travis is not done yet but link is here (I have seen several timeouts recently but it was there even on clear mainline). https://travis-ci.org/michalsimek/u-boot/builds/441591781 If you don't like this please at least cherry-pick this one Revert "fdt: fdtdec_setup_memory_banksize() use livetree" (sha1: 01ac0843aeedc3c95fe68e7ce6a8f35bf1a04b23) which I need for getting SPL up and running again on zynq/zynqmp boards. Thanks, Michal The following changes since commit 15f22ac2eea5ee9f17b14a143c94e7480bbafbff: ldpaa_eth.c: Fix warning when PHYLIB is not enabled (2018-10-12 07:41:24 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.11-rc2 for you to fetch changes up to 045c62be10d64a558f56febcaa2d01b1abbcfa00: cmd: kgdb: Enable kgdb only for PPC (2018-10-15 12:36:37 +0200) Xilinx changes for v2018.11-rc2 FPGA: - Fix SPL fpga loading from FIT ARM64: - Fix gic accesses in EL2/EL1 Xilinx: - Add dlc20 board support - Add Versal board support - Sync defconfigs - Enable MP via Kconfig - Add missing efuse node - Enable CDC for zcu100 cmd: - Fix kgdb Kconfig dependency serial-pl01x: - Add support for handling clk from DT Michal Simek (13): spl: fpga: Implement fpga bistream loading with fpga_load arm: zynq: Enable FIT fpga loading in SPL for zc706 arm: zynq: Add support for DLC20 board Revert "fdt: fdtdec_setup_memory_banksize() use livetree" arm: zynq: Add efuse node for Zynq-7000S devices xilinx: Sync defconfigs with current Kconfig arm64: zynqmp: Enable CDC ethernet gadget for zcu100/Ultra96 arm64: gic: Do gicv3 secure initialization based on EL level arm64: versal: Add support for new Xilinx Versal ACAPs net: gem: Do not setup any clock for Xilinx SoC Versal arm64: versal: Add Xilinx Versal Virtual QEMU board arm64: zynqmp: Enable MP by default via Kconfig cmd: kgdb: Enable kgdb only for PPC Siva Durga Prasad Paladugu (3): serial: pl01x: Get clock from clock node if no clock property found arm64: zynqmp: Move TCM initialization to a separate routine arm64: zynqmp: Add new command for TCM initialization Kconfig| 2 +- MAINTAINERS| 6 arch/arm/Kconfig | 11 +++ arch/arm/Makefile | 1 + arch/arm/cpu/armv8/zynqmp/cpu.c| 12 +-- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynq-7000.dtsi| 5 +++ arch/arm/dts/zynq-dlc20-rev1.0.dts | 103 + arch/arm/include/asm/arch-zynqmp/sys_proto.h | 3 ++ arch/arm/lib/gic_64.S | 16 + arch/arm/mach-versal/Kconfig | 44 + arch/arm/mach-versal/Makefile | 8 + arch/arm/mach-versal/clk.c | 30 + arch/arm/mach-versal/cpu.c | 83 ++ arch/arm/mach-versal/include/mach/gpio.h | 6 arch/arm/mach-versal/include/mach/hardware.h | 34 +++ arch/arm/mach-versal/include/mach/sys_proto.h | 6 board/xilinx/versal/MAINTAINERS| 7 board/xilinx/versal/Makefile | 7 board/xilinx/versal/board.c| 81 + board/xilinx/zynq/zynq-dlc20-rev1.0/ps7_init_gpl.c | 280 ++ board/xilinx/zynqmp/cmds.c | 37 - cmd/Kconfig| 1 + common/spl/spl_fit.c | 34 +-- configs/avnet_ultra96_rev1_defconfig | 8 +++-- configs/microblaze-generic_defconfig | 2 +- configs/xilinx_versal_virt_defconfig | 68 ++ configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc1_defconfig | 1 + configs/xilinx_zynqmp_mini_nand_defconfig | 1 + configs/xilinx_zynqmp_mini_qspi_defconfig | 1 - configs/xilinx_zynqmp_zc1232_revA_defconfig| 1 - configs/xilinx_zynqmp_zc1254_revA_defconfig| 1 - configs/xilinx_zynqmp_zc1275_revA_defconfig| 1 - configs/xilinx_zynqmp_zc1275_revB_
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.11
On Thu, Sep 27, 2018 at 12:43:34PM +0200, Michal Simek wrote: > Hi Tom, > > please pull these changes to your tree. > Travis build looks good. > https://travis-ci.org/michalsimek/u-boot/builds/433924161 > > Both net patches are acked by Joe. > > Thanks, > Michal > > The following changes since commit 284b27cf81da10d55070a49ee8b739f71377a4fb: > > Merge branch 'master' of git://git.denx.de/u-boot-mips (2018-09-23 > 15:14:12 -0400) > > are available in the git repository at: > > > git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.11 > > for you to fetch changes up to 3888c8d1979289efe685fe29276aed4d4b685975: > > net: zynq_gem: Add support for fixed-link phy (2018-09-27 07:59:26 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes for v2018.11
Hi Tom, please pull these changes to your tree. Travis build looks good. https://travis-ci.org/michalsimek/u-boot/builds/433924161 Both net patches are acked by Joe. Thanks, Michal The following changes since commit 284b27cf81da10d55070a49ee8b739f71377a4fb: Merge branch 'master' of git://git.denx.de/u-boot-mips (2018-09-23 15:14:12 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.11 for you to fetch changes up to 3888c8d1979289efe685fe29276aed4d4b685975: net: zynq_gem: Add support for fixed-link phy (2018-09-27 07:59:26 +0200) Xilinx changes for v2018.11 - Handle BOARD_LATE_INIT via Kconfig SPL: - Enable GZIP for all partitions types(not only for kernel) ZynqMP: - Rearrange pmufw version handling - Support newer PMUFW with improved fpga load sequence Zynq: - Cleanup config file - Simplify zybo config by enabling option via Kconfig net: - Fix gems max-speed property reading - Enable support for fixed-link phys Luis Araneda (1): arm: zynq: zybo: migrate CONFIG_DISPLAY to defconfig Michal Simek (4): arm64: zynqmp: Handle CONFIG_BOARD_LATE_INIT via Kconfig arm: zynq: Remove useless comments from config file spl: fit: Enable GZIP compression also for no kernel partitions net: zynq_gem: Add support for fixed-link phy Siva Durga Prasad Paladugu (4): arm64: zynqmp: Move PM version related macros to .h arm64: zynqmp: Return pmufw version for zynqmp_pmufw_version() fpga: zynqmp: Modify PL bitstream loading sequence net: zynq_gem: Fix reading of max-speed property arch/arm/Kconfig | 4 ++-- arch/arm/cpu/armv8/zynqmp/cpu.c | 40 +++- arch/arm/include/asm/arch-zynqmp/sys_proto.h | 17 - board/xilinx/zynqmp/zynqmp.c | 11 ++- common/Kconfig | 2 +- common/spl/spl_fit.c | 5 + configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc1_defconfig | 1 + configs/xilinx_zynqmp_mini_nand_defconfig| 1 + configs/xilinx_zynqmp_mini_qspi_defconfig| 1 + configs/zynq_cse_nand_defconfig | 1 + configs/zynq_cse_nor_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + configs/zynq_zybo_defconfig | 1 + drivers/fpga/zynqmppl.c | 35 +-- drivers/net/zynq_gem.c | 16 +--- include/configs/xilinx_zynqmp_mini.h | 1 - include/configs/zynq-common.h| 8 include/configs/zynq_cse.h | 1 - include/configs/zynq_zybo.h | 2 -- 20 files changed, 87 insertions(+), 63 deletions(-) -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.09
On Thu, Jul 19, 2018 at 05:11:40PM +0200, Michal Simek wrote: > Hi Tom, > > please pull these changes to your tree. > Buildman and travis looks good > https://travis-ci.org/michalsimek/u-boot/builds/405716862 > > My pull request contains some change out of xilinx folders because one > function name has been changed. I got a confirmation from Marek to go > with this to the tree. > And also some small changes in common area which were reviewed. usb_kdb > is an exception because probably none cares. > > You can find more details below. > > Thanks, > Michal > > > The following changes since commit 1adbf2966adebe67de3dd17094749d387604194e: > > Merge branch 'master' of git://git.denx.de/u-boot-sunxi (2018-07-17 > 14:28:47 -0400) > > are available in the git repository at: > > > git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.09 > > for you to fetch changes up to 577012da71ea9dcf07272c7f458218aa8ab29984: > > arm: zynq: spl: fix FPGA initialization (2018-07-19 10:49:57 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes for v2018.09
Hi Tom, please pull these changes to your tree. Buildman and travis looks good https://travis-ci.org/michalsimek/u-boot/builds/405716862 My pull request contains some change out of xilinx folders because one function name has been changed. I got a confirmation from Marek to go with this to the tree. And also some small changes in common area which were reviewed. usb_kdb is an exception because probably none cares. You can find more details below. Thanks, Michal The following changes since commit 1adbf2966adebe67de3dd17094749d387604194e: Merge branch 'master' of git://git.denx.de/u-boot-sunxi (2018-07-17 14:28:47 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.09 for you to fetch changes up to 577012da71ea9dcf07272c7f458218aa8ab29984: arm: zynq: spl: fix FPGA initialization (2018-07-19 10:49:57 +0200) Xilinx changes for v2018.09 clk: - Fix zynqmp clock driver common: - Handle CMD_RET_USAGE in cmd_process_error - Use return macros in cmd_process_error - Fix duplication of CONFIG_SYS_PROMPT_HUSH_PS2 - Support watchdog in usb_kbd.c - Fix name usage in usb_kbd.c - Support systems with non zero memory start initialized from DT only gpio: - Add support for manual relocation in uclass - zynq - use live tree - zynq - fix match data reading - zynq - setup bank name - xilinx - convert driver to DM microblaze: - Use generic iounmap/ioremap implementations - Redesign reset logic with sysreset features - Use watchdog and gpio over DM - Remove unused macros and fix some checkpatch issues - Fix timer initialization not to be called twice serial: - zynq - Use platdata intead of priv data sysreset: - Add support for manual relocation in uclass - Add gpio-restart driver - Add microblaze soft reset driver watchdog: - Add support for aliases in uclass - Add support for manual relocation in uclass - Convert xilinx driver to DM - cadence - update info in the driver and not stop wdt in probe xilinx: - Enable LED gpio for some targets with gpio-leds DT node - Setup variables via Kconfig zynq: - Add support for watchdog aliases - Add support for mini nand/nor configurations - Wire FPGA initalization in SPL zynqmp: - Enable mass storage for zcu100 - Handle external pmufw files - Add support for secure images - Some Kconfig movements and alignments - Add support for watchdog aliases - Use subcommands style for platform command - Add mmio_read/write platform commands - DT updates - Add support for mini qspi configuration Luca Ceresoli (1): arm/arm64: zynq/zynqmp: pass the PS init file as a kconfig variable Luis Araneda (3): spl: fit: display a message when an FPGA image is loaded drivers: fpga: zynqpl: fix compilation with SPL arm: zynq: spl: fix FPGA initialization Michal Simek (36): gpio: zynq: Use live-tree function arm64: zynqmp: Enable usb mass storage command and functionality common: command: Use command_ret_t enum values instead of values common: command: Handle USAGE failure separately hush: Remove default CONFIG_SYS_PROMPT_HUSH_PS2 setting from board files usb_kbd: Add support for watchdog usb_kdb: Get stdio_dev directly from sdev pointer serial: zynq: Use platdata for storing static data instead of priv microblaze: Use default implementation from include/linux/io.h microblaze: Guard do_reset by CONFIG_SYSRESET arm64: zcu100: Enable USB host ether and ASIX via defconfig watchdog: dm: Change uclass name to watchdog and enable DM_UC_FLAG_SEQ_ALIAS watchdog: dm: Support manual relocation for watchdogs arm64: zynqmp: Sync defconfigs in connection to DEFINE_TCM_OCM_MMAP microblaze: Remove unused XILINX_BOARD_NAME macro gpio: zynq: Fix typo in one error message sysreset: dm: Support manual relocation for sysreset gpio: dm: Support manual relocation for gpio gpio: zynq: Read of mach data in platdata with dev_get_driver_data microblaze: Do not call timer init that early gpio: zynq: Setup bank_name to dev->name arm64: zynqmp: Try to enable the first watchdog via aliases arm: zynq: Try to enable the first watchdog via aliases sysreset: Add support for gpio-restart sysreset: Add support for Microblaze soft reset jump gpio: xilinx: Convert driver to DM microblaze: Enable watchdog via defconfig arm64: xilinx: Setup default number of chipselects for zcu100 microblaze: Convert generic platform to DM gpio microblaze: Do not force saving variables to flash watchdog: cdns: Add comment for expire_now function xilinx: Enable led support for some boards watchdog: cadence: Do not stop wdt in probe microblaze: Remove XILINX_SPI_FLASH_BASEADDR logic arm: zynq: Setup ENV_SIZE via Kconfig arm
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.07-rc2
On Fri, Jun 15, 2018 at 02:53:58PM +0200, Michal Simek wrote: > Hi Tom, > > please pull these changes to your tree. > Buildman and travis looks good > https://travis-ci.org/michalsimek/u-boot/builds/392586380 > > Thanks, > Michal > > The following changes since commit 606fddd76c7a045c09d544357806b0b4de4845c7: > > Merge branch 'master' of git://git.denx.de/u-boot-net (2018-06-14 > 07:20:41 -0400) > > are available in the git repository at: > > > git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.07-rc2 > > for you to fetch changes up to b729ed0d95415bd694a6b67c0761f03ef5a1e2bc: > > serial: zynq: Make zynq_serial_setbrg static (2018-06-15 08:54:05 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes for v2018.07-rc2
Hi Tom,
please pull these changes to your tree.
Buildman and travis looks good
https://travis-ci.org/michalsimek/u-boot/builds/392586380
Thanks,
Michal
The following changes since commit 606fddd76c7a045c09d544357806b0b4de4845c7:
Merge branch 'master' of git://git.denx.de/u-boot-net (2018-06-14
07:20:41 -0400)
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.07-rc2
for you to fetch changes up to b729ed0d95415bd694a6b67c0761f03ef5a1e2bc:
serial: zynq: Make zynq_serial_setbrg static (2018-06-15 08:54:05 +0200)
Xilinx fixes for v2018.07-rc2
Zynq:
- Fix missing watchdog header
- DT fixes
ZynqMP:
- emmc configuration split
- Enable SPD
- Fix PMUFW_INIT_FILE logic
- Coverity fixes in SoC code
timer
- Add timer_get_boot_us
mmc:
- Fix MMC HS200 tuning command
serial:
- Fix scrabled chars with OF_LIVE
Luca Ceresoli (1):
arm64: zynqmp: accept an absolute path for PMUFW_INIT_FILE
Michal Simek (13):
arm: zynq: Add missing watchdog header
arm: zynq: Drop #address-cells and #size-cells from gpio-keys
timer: cadence: Implement timer_get_boot_us
arm64: zynqmp: Enable SPD ddr support for zcu102 targets
gpio: zynq: Do not check unsigned type that is >= 0
mmc: zynq: Fix tuning_loop_counter type in
arasan_sdhci_execute_tuning()
arm64: zynqmp: Check return value from calloc
arm64: zynqmp: Check return value in zynqmp_mmio_rawwrite()
gpio: zynq_gpio: bank description should use unsigned type
serial: zynq: Use BIT macros instead of shifts and full hex numbers
serial: zynq: Write chars till output fifo is full
serial: zynq: Initialize uart only before relocation
serial: zynq: Make zynq_serial_setbrg static
Siva Durga Prasad Paladugu (2):
arm64: zynqmp: Split emmc configuration into emmc0 and emmc1
mmc: sdhci: Fix MMC HS200 tuning command failures
arch/arm/cpu/armv8/zynqmp/cpu.c
| 6 +-
arch/arm/dts/Makefile
| 3 ++-
arch/arm/dts/zynq-zc702.dts
| 2 --
arch/arm/dts/zynq-zturn.dts
| 2 --
arch/arm/dts/{zynqmp-mini-emmc.dts => zynqmp-mini-emmc0.dts}
| 20 ++--
arch/arm/dts/zynqmp-mini-emmc1.dts
| 67
+++
arch/arm/dts/zynqmp-zcu100-revC.dts
| 2 --
arch/arm/dts/zynqmp-zcu102-revA.dts
| 2 --
arch/arm/dts/zynqmp-zcu106-revA.dts
| 2 --
arch/arm/dts/zynqmp-zcu111-revA.dts
| 2 --
board/xilinx/zynq/board.c
| 1 +
board/xilinx/zynqmp/zynqmp.c
| 2 ++
configs/{xilinx_zynqmp_mini_emmc_defconfig =>
xilinx_zynqmp_mini_emmc0_defconfig} | 3 ++-
configs/xilinx_zynqmp_mini_emmc1_defconfig
| 49 +
configs/xilinx_zynqmp_r5_defconfig
| 2 ++
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
| 1 +
configs/xilinx_zynqmp_zcu102_revA_defconfig
| 1 +
configs/xilinx_zynqmp_zcu102_revB_defconfig
| 1 +
drivers/gpio/zynq_gpio.c
| 10 +-
drivers/mmc/sdhci.c
| 8
drivers/mmc/zynq_sdhci.c
| 2 +-
drivers/serial/serial_zynq.c
| 24 +++-
drivers/timer/cadence-ttc.c
| 22 ++
include/configs/xilinx_zynqmp_zcu102.h
| 3 +++
scripts/Makefile.spl
| 8 +++-
25 files changed, 196 insertions(+), 49 deletions(-)
rename arch/arm/dts/{zynqmp-mini-emmc.dts => zynqmp-mini-emmc0.dts} (77%)
create mode 100644 arch/arm/dts/zynqmp-mini-emmc1.dts
rename configs/{xilinx_zynqmp_mini_emmc_defconfig =>
xilinx_zynqmp_mini_emmc0_defconfig} (94%)
create mode 100644 configs/xilinx_zynqmp_mini_emmc1_defconfig
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs
signature.asc
Description: OpenPGP digital signature
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.07-2
On Fri, Jun 01, 2018 at 03:23:33PM +0200, Michal Simek wrote: > Hi Tom, > > please pull these changes to your tree. > Buildman and travis looks good > https://travis-ci.org/michalsimek/u-boot/builds/386578029 > > Thanks, > Michal > > The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7: > > add FIT data-position & data-offset property support (2018-05-26 > 18:19:19 -0400) > > are available in the Git repository at: > > git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.07-2 > > for you to fetch changes up to a18d09ea384fb66105fbfa24fd2d1288754b8f07: > > fpga: zynqmp: Add secure bitstream loading for ZynqMP (2018-06-01 > 11:37:31 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes for v2018.07-2
Hi Tom, please pull these changes to your tree. Buildman and travis looks good https://travis-ci.org/michalsimek/u-boot/builds/386578029 Thanks, Michal The following changes since commit c3c863880479edeb5b08226e622d13c91326e4a7: add FIT data-position & data-offset property support (2018-05-26 18:19:19 -0400) are available in the Git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.07-2 for you to fetch changes up to a18d09ea384fb66105fbfa24fd2d1288754b8f07: fpga: zynqmp: Add secure bitstream loading for ZynqMP (2018-06-01 11:37:31 +0200) Xilinx changes for v2018.07 second pull zynqmp: - Show reset reason - Remove emulation platform - Update pmufw version - Simplify mmc bootmode - Remove dc2 useless configuration file - Cleanup mini config - Defconfig syncup - zcu100, zcu104 and zcu111 dts fixes xilinx: - Use live-tree functions in some drivers - Add support for Avnet Minized and Antminer S9 fpga: - Add secure bitstream loading support mmc: - Add hs200 mode support usb xhci: - Header fix Ezequiel Garcia (1): arm: zynq: Add support for Bitmain Antminer S9 control board Ibai Erkiaga (1): arm: zynq: Add initial support for Avnet MiniZed Michal Simek (15): usb: xhci: zynqmp: Fix header location arm64: zynqmp: Show reset reason arm64: zynqmp: Get rid of emulation platforms arm64: zynqmp: Setup the first boot_target at run time serial: zynq: Use live-tree functions mmc: zynq: Use live-tree functions watchdog: cadence: Use live-tree functions timer: cadence: Use live-tree functions arm64: zynqmp: Remove empty configuration file arm64: zynqmp: Remove CMD_UNZIP for mini configuration arm64: zynqmp: Sync defconfigs with latest Kconfig layout arm64: zynqmp: Add ina226 to zcu104 revC arm64: zynqmp: Fix address for tca6416_u97 chip on zcu104 arm64: zynqmp: Remove broken-cd from zcu100-revC arm64: zynqmp: Disable WP on zcu111 Rajan Vaja (2): soc: zynqmp: Update required API version to 1.0 arm64: zynqmp: Add TTC clocks Siva Durga Prasad Paladugu (5): mmc: sdhci: Update sdhci_send_command() to handle HS200 mmc: zynqmp: Add HS200 modes support for ZynqMP cmd: fpga: Reorder the arguments parsing code cmd: fpga: Add support to load secure bitstreams fpga: zynqmp: Add secure bitstream loading for ZynqMP arch/arm/cpu/armv8/zynqmp/clk.c | 10 +- arch/arm/cpu/armv8/zynqmp/cpu.c | 8 ++--- arch/arm/dts/Makefile| 1 + arch/arm/dts/bitmain-antminer-s9.dts | 78 arch/arm/dts/zynq-minized.dts| 106 +++ arch/arm/dts/zynqmp-clk-ccf.dtsi | 16 + arch/arm/dts/zynqmp-zcu100-revC.dts | 1 - arch/arm/dts/zynqmp-zcu104-revA.dts | 4 +-- arch/arm/dts/zynqmp-zcu104-revC.dts | 15 +--- arch/arm/dts/zynqmp-zcu111-revA.dts | 1 + arch/arm/include/asm/arch-zynqmp/hardware.h | 14 ++-- arch/arm/include/asm/arch-zynqmp/sys_proto.h | 6 board/bitmain/antminer_s9/MAINTAINERS| 6 board/bitmain/antminer_s9/Makefile | 8 + board/bitmain/antminer_s9/bitmain-antminer-s9/ps7_init_gpl.c | 280 board/bitmain/antminer_s9/board.c| 2 ++ board/xilinx/zynqmp/zynqmp.c | 88 +++-- cmd/Kconfig | 7 cmd/fpga.c | 93 +--- configs/bitmain_antminer_s9_defconfig| 66 ++ configs/xilinx_zynqmp_zc1232_revA_defconfig | 2 +- configs/xilinx_zynqmp_zc1254_revA_defconfig | 2 +- configs/xilinx_zynqmp_zc1275_revA_defconfig | 2 +- configs/xilinx_zynqmp_zc1275_revB_defconfig | 2 +- configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 + configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 3 +- configs/xilinx_zynqmp_zcu102_rev1_0_defconfig| 1 + configs/zynq_minized_defconfig | 66 ++ drivers/fpga/fpga.c
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.07
On Mon, May 14, 2018 at 03:31:03PM +0200, Michal Simek wrote: > On 11.5.2018 21:22, Tom Rini wrote: > > On Fri, May 11, 2018 at 03:16:56PM +0200, Michal Simek wrote: > > > >> Hi Tom, > >> > >> please pull these changes to your tree. > >> Buildman looks good and travis build is not showing any issue too. > >> https://travis-ci.org/michalsimek/u-boot/builds/377645974 > >> > >> As we have discussed I have grab pending mmc patches for fixing timer > >> issue and adding sd3.0 support because there was no reaction from Jaehoon. > >> > >> And will see that will come from coverity in connection to zynqmp bif > >> support. > >> > >> Thanks, > >> Michal > >> > >> > >> The following changes since commit > >> da342f06b30399fbbebbb53aadfc018713c65c24: > >> > >> Merge git://git.denx.de/u-boot-ubi (2018-05-10 07:17:14 -0400) > >> > >> are available in the Git repository at: > >> > >> git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.07 > >> > >> for you to fetch changes up to 4b87f2d500e94f877f38d9c11e4e47e1721f3fbe: > >> > >> arm64: zynqmp: Enable UHS support for ZCU102 Rev1.0 board (2018-05-11 > >> 11:13:54 +0200) > >> > > > > With a follow-up patch to correct SPDX tag formats, applied to > > u-boot/master, thanks! > > Did that discussing end up that we are going to follow kernel spdx style? Barring further vocal disagreement about doing so, yes. -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.07
On 11.5.2018 21:22, Tom Rini wrote: > On Fri, May 11, 2018 at 03:16:56PM +0200, Michal Simek wrote: > >> Hi Tom, >> >> please pull these changes to your tree. >> Buildman looks good and travis build is not showing any issue too. >> https://travis-ci.org/michalsimek/u-boot/builds/377645974 >> >> As we have discussed I have grab pending mmc patches for fixing timer >> issue and adding sd3.0 support because there was no reaction from Jaehoon. >> >> And will see that will come from coverity in connection to zynqmp bif >> support. >> >> Thanks, >> Michal >> >> >> The following changes since commit da342f06b30399fbbebbb53aadfc018713c65c24: >> >> Merge git://git.denx.de/u-boot-ubi (2018-05-10 07:17:14 -0400) >> >> are available in the Git repository at: >> >> git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.07 >> >> for you to fetch changes up to 4b87f2d500e94f877f38d9c11e4e47e1721f3fbe: >> >> arm64: zynqmp: Enable UHS support for ZCU102 Rev1.0 board (2018-05-11 >> 11:13:54 +0200) >> > > With a follow-up patch to correct SPDX tag formats, applied to > u-boot/master, thanks! Did that discussing end up that we are going to follow kernel spdx style? Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.07
On Fri, May 11, 2018 at 03:16:56PM +0200, Michal Simek wrote: > Hi Tom, > > please pull these changes to your tree. > Buildman looks good and travis build is not showing any issue too. > https://travis-ci.org/michalsimek/u-boot/builds/377645974 > > As we have discussed I have grab pending mmc patches for fixing timer > issue and adding sd3.0 support because there was no reaction from Jaehoon. > > And will see that will come from coverity in connection to zynqmp bif > support. > > Thanks, > Michal > > > The following changes since commit da342f06b30399fbbebbb53aadfc018713c65c24: > > Merge git://git.denx.de/u-boot-ubi (2018-05-10 07:17:14 -0400) > > are available in the Git repository at: > > git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.07 > > for you to fetch changes up to 4b87f2d500e94f877f38d9c11e4e47e1721f3fbe: > > arm64: zynqmp: Enable UHS support for ZCU102 Rev1.0 board (2018-05-11 > 11:13:54 +0200) > With a follow-up patch to correct SPDX tag formats, applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes for v2018.07
Hi Tom, please pull these changes to your tree. Buildman looks good and travis build is not showing any issue too. https://travis-ci.org/michalsimek/u-boot/builds/377645974 As we have discussed I have grab pending mmc patches for fixing timer issue and adding sd3.0 support because there was no reaction from Jaehoon. And will see that will come from coverity in connection to zynqmp bif support. Thanks, Michal The following changes since commit da342f06b30399fbbebbb53aadfc018713c65c24: Merge git://git.denx.de/u-boot-ubi (2018-05-10 07:17:14 -0400) are available in the Git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.07 for you to fetch changes up to 4b87f2d500e94f877f38d9c11e4e47e1721f3fbe: arm64: zynqmp: Enable UHS support for ZCU102 Rev1.0 board (2018-05-11 11:13:54 +0200) Xilinx changes for v2018.07 microblaze: - Align defconfig zynq: - Rework fpga initialization and cpuinfo handling zynqmp: - Add ZynqMP R5 support - Wire and enable watchdog on zcu100-revC - Setup MMU map for DDR at run time - Show board info based on DT and cleanup IDENT_STRING zynqmp tools: - Add read partition support - Add initial support for Xilinx bif format for boot.bin generation mmc: - Fix get_timer usage on 64bit cpus - Add support for SD3.0 UHS mode nand-zynq: - Add support for 16bit buswidth - Use address cycles from onfi params scsi: - convert ceva sata to UCLASS_AHCI timer: - Add Cadence TTC for ZynqMP r5 watchdog: - Minor cadence driver cleanup Alexander Graf (4): tools: zynqmpimage: Add partition read support tools: zynqmpimage: Move defines to header MAINTAINERS: Declare tools/zynqmp* as Xilinx maintained tools: zynqmpimage: Add bif support Michal Simek (14): arm: zynq: Enable debug_uart_init in spl when enabled arm: zynq: Rework FPGA initialization arm: zynq: Remove checkboard and enable DISPLAY_CPUINFO scsi: ceva: Convert driver to use UCLASS_AHCI instead of SCSI timer: Add Cadence TTC timer counter support serial: zynq: Remove header depedency on arm header structure MAINTAINERS: zynqmp: Point to proper zynqmp folder arm64: zynqmp: Reset FPD Watchdog on zcu100 watchdog: cadence: Show used timeout value arm64: zynqmp: Wire watchdog internals arm64: zynqmp: Enable cadence WDT for zcu100 arm64: zynqmp: Simplify boot_target variable composition arm64: zynqmp: Show model information instead of custom IDENT_STRING arm: zynqmp: Add ZynqMP minimal R5 support Nitin Jain (1): arm64: zynqmp: Setup MMU map for DDR at run time Siva Durga Prasad Paladugu (11): arm64: zynqmp: Add new defconfig for zc1275 revB microblaze: Dont enable UBI support by default nand: zynq: Add support for 16-bit buswidth nand: zynq: Send address cycles as per onfi parameter page mmc: sdhci: Add support for disabling clock mmc: sdhci: Handle execute tuning command in sdhci_send_command sdhci: Add new sdhci ops for platform specific tuning and delays mmc: sdhci: Invoke platform specific tuning and delay routines mmc: sdhci: Read capabilities register1 and update host caps mmc: zynq_sdhci: Add support for SD3.0 arm64: zynqmp: Enable UHS support for ZCU102 Rev1.0 board Vipul Kumar (1): mmc: Changed the datatype of the variable to handle 64-bit arch MAINTAINERS | 11 +- arch/arm/Kconfig | 11 ++ arch/arm/Makefile |1 + arch/arm/cpu/armv8/zynqmp/cpu.c | 84 - arch/arm/dts/Makefile |3 + arch/arm/dts/zynqmp-clk.dtsi |2 +- arch/arm/dts/zynqmp-r5.dts| 73 +++ arch/arm/dts/zynqmp-zc1275-revB.dts | 79 arch/arm/dts/zynqmp-zcu100-revC.dts |1 + arch/arm/include/asm/arch-zynqmp/sys_proto.h |2 +- arch/arm/mach-zynq/cpu.c | 85 - arch/arm/mach-zynq/spl.c | 11 +- arch/arm/mach-zynqmp-r5/Kconfig | 27 arch/arm/mach-zynqmp-r5/Makefile |3 + arch/arm/mach-zynqmp-r5/cpu.c | 37 ++ board/xilinx/zynq/board.c | 80 board/xilinx/zynqmp/Makefile |2 + board/xilinx/zynqmp/tap_delays.c | 229 ++ board/xilinx/zynqmp/zynqmp-zc1275-revB/psu_init_gpl.c | 523 ++ board/xilinx/zynqmp/zynqmp-zcu100-revC/psu_init_gpl.c |2 +- b
Re: [U-Boot] [GIT PULL] Xilinx changes for v2018.01
On Wed, Nov 29, 2017 at 01:39:05PM +0100, Michal Simek wrote: > Hi Tom, > > please pull these changes to your tree. Travis is not showing any issue > https://travis-ci.org/michalsimek-test/u-boot/builds/308832565 > > Changes are described below. > > Thanks, > Michal > > > The following changes since commit 73a01d90c0b2ed2527283f289f73d69ef52cafa5: > > test: Correct operation when tests pass (2017-11-27 23:05:22 -0500) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.01 > > for you to fetch changes up to a04a5daae25a74ad2ac90b7dac126242baa0: > > net: xilinx_axi_emac: Use readl and writel for io ops (2017-11-29 > 08:02:40 +0100) > Applied to u-boot/master, thanks! > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes for v2018.01
Hi Tom, please pull these changes to your tree. Travis is not showing any issue https://travis-ci.org/michalsimek-test/u-boot/builds/308832565 Changes are described below. Thanks, Michal The following changes since commit 73a01d90c0b2ed2527283f289f73d69ef52cafa5: test: Correct operation when tests pass (2017-11-27 23:05:22 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.01 for you to fetch changes up to a04a5daae25a74ad2ac90b7dac126242baa0: net: xilinx_axi_emac: Use readl and writel for io ops (2017-11-29 08:02:40 +0100) Xilinx changes for v2018.1 Zynq: - Add support for Syzygy and cc108 boards - Add support for mini u-boot configurations (cse) - dts updates - config/defconfig updates in connection to Kconfig changes - Fix psu_init handling ZynqMP: - SPL fixes - Remove slcr.c - Fixing r5 startup sequence - Add support for external pmufw - Add support for new ZynqMP chips - dts updates - Add support for zcu102 rev1.0 board Drivers: - nand: Support external timing setting and board init - ahci: Fix wording - axi_emac: Wait for bit, non processor mode, readl/write conversion - zynq_gem: Fix SGMII/PCS support Anurag Kumar Vulisha (6): arm64: zynqmp: Add SMMU support for SATA IP arm64: zynqmp: Add reset-controller support in serdes driver arm64: zynqmp: Use reset controller framework for asserting/de-asserting reset arm64: zynqmp: Add support reading SoC revision using nvmem driver in dwc3 arm64: zynqmp: Uncomment snps,quirk-frame-length-adjustment flag in dwc3 arm64: zynqmp: usb: Correct IOMMU node for making SMMU work with USB Bharat Kumar Gogada (1): arm64: zynqmp: zcu102: Modifying GTR lane-0 to PCIe Chirag Parekh (2): arm: zynq: Add SCL & SDA GPIO entries for recovery arm64: zynqmp: Update device tree for gpio Heinrich Schuchardt (1): arm64: zynqmp: remove unnecessary logical constraint Hyun Kwon (1): arm64: zynqmp: Update the GPU address size Jean-Francois Dagenais (1): tools: zynqmpimage: adjust ug1085 reference to v1.4 of the document Jeff Westfahl (1): mtd: nand: zynq: Add a config option to use 1st stage bootloader timing Joe Hershberger (1): mtd: nand: zynq: Add support for the NAND lock/unlock operation Jolly Shah (1): arm64: zynqmp: Reduced min-residency time for idle state node Jyotheeswar Reddy (1): arm64: zynqmp: DT: Fix typo in idle-states node definition Jyotheeswar Reddy Mutthareddyvari (1): arm64: zynqmp: PM: Specify power domains for DP related nodes Madhurkiran Harikrishnan (1): arm64: zynqmp: Add clock name for GPU Manish Narani (3): arm64: zynqmp: sdhci: set host quirk2 for no 1.8V support for 1.0 silicon arm64: zynqmp: Enabled CCI support for USB arm64: zynqmp: Add USB OTG interrupts support in dt Michal Simek (52): arm: zynq: Remove empty ifdef env structures from config file arm: zynq: Sync location of DT properties with Linux arm: zynq: Enable bootz command for Xilinx platforms arm: zynq: Enable debug console on zc770 xm010 by default arm: zynq: Enable MACRONIX flash for zc702/zc706/zc770 xm010 arm: zynq: Enable qspi for zc770_xm013 arm: zynq: Add board support for cc108 arm: zynq: Return value from fdtdec_setup_memory_banksize directly arm: zynq: Enable FPGA/FPGA_XILINX via Kconfig arm: zynq: Move ZYNQ_SERIAL to Kconfig arm: zynq: Sort dts names arm: zynq: Add mini u-boot configuration for zynq ata: Fix ahci wording arm64: zynqmp: Remove slcr with mio status pin detection tools: mkimage: Extend mkimage to also include pmufw arm64: zynqmp: Add SD1 level shifter mode to alternative selection arm64: zynqmp: Use u32 type instead of uint32_t arm64: zynqmp: Add support for CG/EG/EV device detection arm64: zynqmp: Add new ID for RFSoC arm64: zynqmp: Enable debug uart for zc1751 dc5 arm64: zynqmp: Wire QSPI boot mode for SPL arm64: zynqmp: Add references to cpu nodes arm64: zynqmp: Fix broken architected timer interrupt trigger arm64: zynqmp: Add missing gpio property to dtsi arm64: zynqmp: Use revision in dts file description arm64: zynqmp: Add revB string to compatible string arm64: zynqmp: Add missing alias for gem0 for ep108 arm64: zynqmp: Remove leading 0s from mtd table for spi flashes arm64: zynqmp: Use SPDX license with dc4 arm64: zynqmp: Remove local-mac-address from dtsi file arm64: zynqmp: Update device tree for pinmux arm64: zynqmp: Add support for zcu102 1.0 rev arm64: zynqmp: Remove tx_termination_fix detection on silicon v1 arm64: zynqmp: dt: Add AMS node arm64: zynqmp: Move nodes which have no reg property out of bus
Re: [U-Boot] [GIT PULL] Xilinx changes for v2017.05
On Thu, Mar 16, 2017 at 10:24:42AM +0100, Michal Simek wrote: > Hi Tom, > > please pull these changes to your tree. > > Thanks, > Michal > > The following changes since commit 85d0bea153c76f4a3912b5683222885bfd37c769: > > Prepare v2017.03-rc2 (2017-02-13 11:47:45 -0500) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2017.05 > > for you to fetch changes up to 61e745d1311532a90de537cc470da12d306ee193: > > mmc: zynq: Add fdt max-frequency support (2017-02-17 10:22:47 +0100) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes for v2017.05
Hi Tom, please pull these changes to your tree. Thanks, Michal The following changes since commit 85d0bea153c76f4a3912b5683222885bfd37c769: Prepare v2017.03-rc2 (2017-02-13 11:47:45 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2017.05 for you to fetch changes up to 61e745d1311532a90de537cc470da12d306ee193: mmc: zynq: Add fdt max-frequency support (2017-02-17 10:22:47 +0100) Xilinx changes for v2017.05 - Move to DM clk driver - Add clk support for zynq_sdhci Stefan Herbrechtsmeier (10): net: zynq: Don't overwrite gem_rclk_ctrl with default value net: zynq: Add clk framework support to zynq ethernet driver zynq: Add clk framework support to zynq timer zynq: Move static clock names into separate array zynq: Remove zynq_clk_get_name function clk: zynq: Add zynq clock framework driver zynq: Move zynq to clock framework clk: zynq: Add optional ethernet emio clock source support mmc: zynq: Determine base clock frequency via clock framework mmc: zynq: Add fdt max-frequency support arch/arm/Kconfig | 3 + arch/arm/dts/zynq-7000.dtsi | 2 + arch/arm/include/asm/arch-zynqmp/sys_proto.h | 7 -- arch/arm/mach-zynq/clk.c | 690 arch/arm/mach-zynq/cpu.c | 1 - arch/arm/mach-zynq/include/mach/clk.h| 6 -- arch/arm/mach-zynq/include/mach/sys_proto.h | 1 - arch/arm/mach-zynq/slcr.c| 29 --- arch/arm/mach-zynq/timer.c | 23 ++ drivers/clk/Kconfig | 8 ++ drivers/clk/Makefile | 1 + drivers/clk/clk_zynq.c | 488 + drivers/mmc/zynq_sdhci.c | 33 +++- drivers/net/zynq_gem.c | 29 +++ drivers/serial/serial_zynq.c | 6 +- include/configs/topic_miami.h| 2 - include/configs/zynq_zybo.h | 3 - scripts/config_whitelist.txt | 1 - 18 files changed, 634 insertions(+), 699 deletions(-) create mode 100644 drivers/clk/clk_zynq.c -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
On Thu, Jan 12, 2017 at 08:17:14AM +0100, Michal Simek wrote: > On 12.1.2017 08:13, Masahiro Yamada wrote: > > 2017-01-12 15:42 GMT+09:00 Michal Simek : > >> On 11.1.2017 17:28, Tom Rini wrote: > >>> On Wed, Jan 11, 2017 at 09:59:29AM +0100, Michal Simek wrote: > >>> > Hi Tom, > > here are changes I have collected. Travis is not reporting any issue. > I have also started to use signed tags to be clear what to take. > >>> > >>> Ah, signed tags. How much more work is that on your end? > >> > >> Almost nothing just git tag -s and write some stuff. arm-soc starts to > >> use that long time ago that's why when you setup it once there is not an > >> issue. Maybe good time to consider to move to the same model. > >> > > > > Interesting. > > > > Maybe, will we have a key signing party in the next U-Boot mini summit? > > The GPG certificate can be checked only when we have the chain of trust. > > Tom probably has my key already from past. Definitely u-boot mini summit > is a good opportunity for this. > > > > > More more difference for pulling a tag commit is that > > git always creates a merge commit > > even if the pull-request is sitting on the top of the upstream tree. > > It is up to Tom what flow he wants to use and how that merge commits > will look like. So, I've thought about this a bit more. To me, at least initially, the web of trust isn't as important as the information (and so history) that's in the signed tags about what's coming in. I want us to have better release notes about what has changed and I think tags will help. I'm not going to make it mandatory right now, I'd like people to try it out and see what they think. A look over https://www.kernel.org/pub/software/scm/git/docs/howto/using-signed-tag-in-pull-request.html may help people that haven't done it before. -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
On 12.1.2017 08:13, Masahiro Yamada wrote: > 2017-01-12 15:42 GMT+09:00 Michal Simek : >> On 11.1.2017 17:28, Tom Rini wrote: >>> On Wed, Jan 11, 2017 at 09:59:29AM +0100, Michal Simek wrote: >>> Hi Tom, here are changes I have collected. Travis is not reporting any issue. I have also started to use signed tags to be clear what to take. >>> >>> Ah, signed tags. How much more work is that on your end? >> >> Almost nothing just git tag -s and write some stuff. arm-soc starts to >> use that long time ago that's why when you setup it once there is not an >> issue. Maybe good time to consider to move to the same model. >> > > Interesting. > > Maybe, will we have a key signing party in the next U-Boot mini summit? > The GPG certificate can be checked only when we have the chain of trust. Tom probably has my key already from past. Definitely u-boot mini summit is a good opportunity for this. > > More more difference for pulling a tag commit is that > git always creates a merge commit > even if the pull-request is sitting on the top of the upstream tree. It is up to Tom what flow he wants to use and how that merge commits will look like. Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
2017-01-12 15:42 GMT+09:00 Michal Simek : > On 11.1.2017 17:28, Tom Rini wrote: >> On Wed, Jan 11, 2017 at 09:59:29AM +0100, Michal Simek wrote: >> >>> Hi Tom, >>> >>> here are changes I have collected. Travis is not reporting any issue. >>> I have also started to use signed tags to be clear what to take. >> >> Ah, signed tags. How much more work is that on your end? > > Almost nothing just git tag -s and write some stuff. arm-soc starts to > use that long time ago that's why when you setup it once there is not an > issue. Maybe good time to consider to move to the same model. > Interesting. Maybe, will we have a key signing party in the next U-Boot mini summit? The GPG certificate can be checked only when we have the chain of trust. More more difference for pulling a tag commit is that git always creates a merge commit even if the pull-request is sitting on the top of the upstream tree. -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
On 11.1.2017 17:28, Tom Rini wrote: > On Wed, Jan 11, 2017 at 09:59:29AM +0100, Michal Simek wrote: > >> Hi Tom, >> >> here are changes I have collected. Travis is not reporting any issue. >> I have also started to use signed tags to be clear what to take. > > Ah, signed tags. How much more work is that on your end? Almost nothing just git tag -s and write some stuff. arm-soc starts to use that long time ago that's why when you setup it once there is not an issue. Maybe good time to consider to move to the same model. Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
On Wed, Jan 11, 2017 at 09:59:29AM +0100, Michal Simek wrote: > Hi Tom, > > here are changes I have collected. Travis is not reporting any issue. > I have also started to use signed tags to be clear what to take. Ah, signed tags. How much more work is that on your end? > Thanks, > Michal > > > The following changes since commit a705ebc81b7f91bbd0ef7c634284208342901149: > > Prepare v2017.01 (2017-01-09 11:57:05 -0500) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2017.03 > > for you to fetch changes up to 7364dfe7bfca8632bfe02de5c333a64472812ebe: > > ARM64: zynqmp: Move CONFIG_AHCI from board file (2017-01-11 07:00:38 > +0100) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes
Hi Tom, here are changes I have collected. Travis is not reporting any issue. I have also started to use signed tags to be clear what to take. Thanks, Michal The following changes since commit a705ebc81b7f91bbd0ef7c634284208342901149: Prepare v2017.01 (2017-01-09 11:57:05 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2017.03 for you to fetch changes up to 7364dfe7bfca8632bfe02de5c333a64472812ebe: ARM64: zynqmp: Move CONFIG_AHCI from board file (2017-01-11 07:00:38 +0100) Xilinx changes for v2017.03 - ATF handoff - DT syncups - gem: Use wait_for_bit(), add simple clk support - Simple clk driver for ZynqMP - Other small changes Kamensky Ivan (1): xilinx_phy: Pass correct pointer to fdtdec_get_int() Michal Simek (14): lib: Add WATCHDOG_RESET to wait_bit.h net: gem: Use wait_for_bit() instead of private mdio_wait() microblaze: Remove hardcoded IP address from config microblaze: Enable option to overwrite default variables fpga: zynqmp: Remove empty functions ARM: zynq: Move CONFIG_SYS_TEXT_BASE to Kconfig ARM: zynq: Remove CONFIG_BOOTP_SERVERIP ARM: zynq: Remove spi-max-frequency ARM: zynq: Setup modeboot variable based on boot mode ARM64: zynqmp: Add missing earlycon for ep108 ARM64: zynqmp: Fix usb nodes for dc1 and dc2 fpga: Use enum for bitstream command types ARM64: zynqmp: Generate handoff structure for ATF ARM64: zynqmp: Move CONFIG_AHCI from board file Mike Looijmans (1): ARM: zynqmp: Make SYS_VENDOR configurable Moritz Fischer (2): i2c: cdns: Add additional compatible string for r1p14 of the IP. ARM64: zynqmp: Fix i2c node's compatible string Sai Pavan Boddu (1): microblaze: Make the board configuration name user definable Shubhrajyoti Datta (1): ARM64: zynqmp: clk: Add the clock for watchdog Siva Durga Prasad Paladugu (5): ARM64: zynqmp: Increase environment size to 32K ARM64: zynqmp: Add support to save env to FAT ARM64: zynqmp: Enable fastboot for first SD/MMC/EMMC device clk: zynqmp: Add clock driver support for zynqmp net: zynq_gem: Use clock driver for ZynqMP Stefan Krsmanovic (1): ARM64: zynqmp: Add idle state for ZynqMP Sudeep Holla (1): ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property Kconfig | 3 +- arch/arm/cpu/armv8/zynqmp/Kconfig| 1 + arch/arm/cpu/armv8/zynqmp/Makefile | 2 +- arch/arm/cpu/armv8/zynqmp/handoff.c | 87 arch/arm/cpu/armv8/zynqmp/spl.c | 2 + arch/arm/dts/zynq-7000.dtsi | 2 - arch/arm/dts/zynq-zc702.dts | 4 +- arch/arm/dts/zynqmp-clk.dtsi | 4 + arch/arm/dts/zynqmp-ep108.dts| 1 + arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 4 + arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 4 + arch/arm/dts/zynqmp.dtsi | 21 +++- arch/arm/include/asm/arch-zynqmp/hardware.h | 9 ++ arch/arm/include/asm/arch-zynqmp/sys_proto.h | 4 + board/xilinx/microblaze-generic/Kconfig | 5 + board/xilinx/zynq/board.c| 6 ++ cmd/fpga.c | 20 ++-- configs/topic_miami_defconfig| 1 + configs/topic_miamiplus_defconfig| 1 + configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 + configs/zynq_microzed_defconfig | 1 + configs/zynq_picozed_defconfig | 1 + configs/zynq_zc702_defconfig | 1 + configs/zynq_zc706_defconfig | 1 + configs/zynq_zc770_xm010_defconfig | 1 + configs/zynq_zc770_xm011_defconfig | 1 + configs/zynq_zc770_xm012_defconfig | 1 + configs/zynq_zc770_xm013_defconfig | 1 + configs/zynq_zed_defconfig | 1 + configs/zynq_zybo_defconfig | 1 + drivers/clk/Kconfig | 7 ++ drivers/clk/Makefile | 1 + drivers/clk/clk_zynqmp.c | 241 + drivers/fpga/zynqpl.c| 12 --- drivers/i2c/i2c-cdns.c | 1 + drivers/net/phy/xilinx_phy.c | 4 +- drivers/net/zynq_gem.c | 50 +- include/configs/microblaze-generic.h | 5 +- include/configs/xilinx_zynqmp.h | 32 +- include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h | 1 - include/configs/zynq-common.h|
Re: [U-Boot] [GIT PULL] Xilinx changes
On Tue, Nov 15, 2016 at 06:59:53PM +0100, Michal Simek wrote: > Hi Tom, > > please pull these changes to your tree. > There are several things in this PR like > DTS cleanups, Topic NL board with extending mkimage format and nand driver. > > I have run buildman over it and there is not an issue. > ./tools/buildman/buildman -b master zynq -C > > Thanks, > Michal > > The following changes since commit 29e0cfb4f77f7aa369136302cee14a91e22dca71: > > Prepare v2016.11 (2016-11-14 11:27:11 -0500) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git master > > for you to fetch changes up to 688d1be5ba63be281c2894e74b27209133598e2e: > > ARM64: zynqmp: Adding prefetchable memory space to pcie (2016-11-15 > 15:30:41 +0100) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
On 16.11.2016 01:26, Masahiro Yamada wrote: > Hi Michal > > 2016-11-16 2:59 GMT+09:00 Michal Simek : >> Hi Tom, >> >> please pull these changes to your tree. >> There are several things in this PR like >> DTS cleanups, Topic NL board with extending mkimage format and nand driver. >> >> I have run buildman over it and there is not an issue. >> ./tools/buildman/buildman -b master zynq -C >> >> Thanks, >> Michal > > > I thought you would pick up the following: > http://patchwork.ozlabs.org/patch/681835/ > > > Shall we ask Tom to apply it directly? It was the part of series that's why I expected it will be taken together not separately. As I see sunxi and uniphier patches are in and zynq is missing. I will take it to my branch and will send it in next PR. If Tom wants to take it directly he can - all ack lines are there already. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
Hi Michal 2016-11-16 2:59 GMT+09:00 Michal Simek : > Hi Tom, > > please pull these changes to your tree. > There are several things in this PR like > DTS cleanups, Topic NL board with extending mkimage format and nand driver. > > I have run buildman over it and there is not an issue. > ./tools/buildman/buildman -b master zynq -C > > Thanks, > Michal I thought you would pick up the following: http://patchwork.ozlabs.org/patch/681835/ Shall we ask Tom to apply it directly? -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes
Hi Tom, please pull these changes to your tree. There are several things in this PR like DTS cleanups, Topic NL board with extending mkimage format and nand driver. I have run buildman over it and there is not an issue. ./tools/buildman/buildman -b master zynq -C Thanks, Michal The following changes since commit 29e0cfb4f77f7aa369136302cee14a91e22dca71: Prepare v2016.11 (2016-11-14 11:27:11 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master for you to fetch changes up to 688d1be5ba63be281c2894e74b27209133598e2e: ARM64: zynqmp: Adding prefetchable memory space to pcie (2016-11-15 15:30:41 +0100) Anurag Kumar Vulisha (1): ARM64: zynqmp: Add device tree properties for ZynqMP GT core Bharat Kumar Gogada (2): ARM64: zynqmp: pci: Updating device tree as per upstream ARM64: zynqmp: Adding prefetchable memory space to pcie Filip Drazic (4): ARM64: zynqmp: DT: Remove unused DDR PM domain ARM64: zynqmp: DT: Remove unused PM domains for PLL ARM64: zynqmp: DT: Add PM domains for GPU and PCIE ARM64: zynqmp: Support for multiple PM IDs assigned to a PM domain Hyun Kwon (1): ARM64: zynqmp: drm: Add DMA index Kedareswara rao Appana (3): ARM64: zynqmp: Add clocks for LPDDMA ARM64: zynqmp: Add description for LPDDMA channel usage ARM64: zynqmp: Add clocks for LPDDMA Michal Simek (18): tools: mkimage: Check if file is regular file zynq: nand: Runtime detection of nand buswidth through slcr ARM: zynq: Add support for Zynq 7000S 7007s/7012s/7014s devices ARM64: zynqmp: Record board name as serial number for DFU/FASTBOOT ARM64: zynqmp: Fix secondary bootmode enabling ARM64: zynqmp: Ignore warnings from autogenerated files ARM: zynq: Remove DTC 1.4.2 warnings ARM64: zynqmp: Remove DTC 1.4.2 warnings ARM64: zynqmp: Enable gpio-led as heartbeat on zcu102 ARM64: zynqmp: Add gpio-keys for zcu102 ARM64: zynqmp: Add dcc port to dtsi ARM64: zynqmp: Remove note about level shifter on zcu102 ARM64: zynqmp: Remove xlnx,id property ARM64: zynqmp: Sync gpio node properties Revert "ARM64: zynqmp: Add serdes address space dp driver" ARM64: zynqmp: List all SMMU ids Revert "ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes" ARM64: zynqmp: Use 64bit size cell format for main amba bus Mike Looijmans (3): tools: mkimage: Add support for initialization table for Zynq and ZynqMP ARM: zynq: Make SYS_VENDOR configurable ARM: zynq: Add support for the topic-miami system-on-modules and carrier boards Naga Sureshkumar Relli (3): ARM64: zynqmp: Enable can1 for ep108 ARM64: zynqmp: Add cortexa53 edac node ARM64: zynqmp: Add ocm node in dtsi Nava kishore Manne (1): ARM64: zynqmp: Add support for zynqmp fpga manager Sai Krishna Potthuri (1): ARM64: zynqmp: change sdhci compatible string. Siva Durga Prasad Paladugu (7): mtd: nand: zynq_nand: Add nand driver support for zynq zynq: nand: Enable Nand flash controller driver a zynq board nand: arasan_nfc: Clear ecc on bit while sending read command net: zynq_gem: Modify the nwcfg bit definitions net: zynq_gem: Correct SGMII enable bit setting ARM64: zynqmp: Add support for SD1 with level shifters bootmode ARM64: zynqmp: Correct the sdhci minimum frequency for ep108 Soren Brinkmann (1): ARM64: zynqmp: Adjust to new SMC interface to get silicon version VNSL Durga (1): ARM64: zynqmp: Added clocks to DT for ep108 arch/arm/cpu/armv8/zynqmp/Kconfig|7 + arch/arm/cpu/armv8/zynqmp/spl.c |6 +- arch/arm/dts/Makefile|2 + arch/arm/dts/zynq-7000.dtsi |7 +- arch/arm/dts/zynq-microzed.dts |2 +- arch/arm/dts/zynq-picozed.dts|2 +- arch/arm/dts/zynq-topic-miami.dts| 97 + arch/arm/dts/zynq-topic-miamiplus.dts| 17 +++ arch/arm/dts/zynq-zc702.dts |2 +- arch/arm/dts/zynq-zc706.dts |2 +- arch/arm/dts/zynq-zc770-xm010.dts|2 +- arch/arm/dts/zynq-zc770-xm011.dts|2 +- arch/arm/dts/zynq-zed.dts|2 +- arch/arm/dts/zynq-zybo.dts |2 +- arch/arm/dts/zynqmp-clk.dtsi | 32 + arch/arm/dts/zynqmp-ep108-clk.dtsi | 48 +++ arch/arm/dts/zynqmp-ep108.dts|8 +- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts |4 +- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts |2 +- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts |2 +- arch/arm
Re: [U-Boot] [GIT PULL] Xilinx changes v2
On Thu, Sep 22, 2016 at 09:52:26AM +0200, Michal Simek wrote: > Hi, > > I have rebased my tree on the top of current master branch > with IDENT_STRING in Kconfig. > Also that PL driver for ZynqMP was fixed. > Buildman output look good too. > That's why please apply. > > Thanks, > Michal > > > The following changes since commit a2ed3f452dd1cf4982fe46d5111d200909786686: > > Merge git://git.denx.de/u-boot-dm (2016-09-20 09:34:53 -0400) > > are available in the git repository at: > > > git://www.denx.de/git/u-boot-microblaze.git master > > for you to fetch changes up to e0027f089bb64f6b84742c580f966bf9c97c900e: > > zynqmp: Remove unnnecessary board config file for dc4 (2016-09-22 > 07:33:21 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes v2
Hi, I have rebased my tree on the top of current master branch with IDENT_STRING in Kconfig. Also that PL driver for ZynqMP was fixed. Buildman output look good too. That's why please apply. Thanks, Michal The following changes since commit a2ed3f452dd1cf4982fe46d5111d200909786686: Merge git://git.denx.de/u-boot-dm (2016-09-20 09:34:53 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master for you to fetch changes up to e0027f089bb64f6b84742c580f966bf9c97c900e: zynqmp: Remove unnnecessary board config file for dc4 (2016-09-22 07:33:21 +0200) Michal Simek (14): fpga: Add Kconfig to fpga subsystem ARM64: zynqmp: Wire up both USBs available on ZynqMP ARM64: zynqmp: Force certain bootmode for SPL ARM64: zynqmp: Fix usb_gadget_handle_interrupt routine spi: zynq: Use variable to remove u32 to u64 conversions ARM64: zynqmp: Move BSS location to the beginning of ram ARM64: zynqmp: Add USB boot mode ARM: Add new BOOT_DEVICE_DFU boot mode ARM64: zynqmp: Add support for DFU from SPL ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins ARM64: zynqmp: Fix USB ulpi phy sequence ARM64: zynqmp: Add support for chip ID detection ARM64: zynqmp: Enable CONFIG_AHCI via Kconfig ARM64: zynqmp: Use the same name for atf image everywhere Siva Durga Prasad Paladugu (2): fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP zynqmp: Remove unnnecessary board config file for dc4 arch/arm/cpu/armv8/zynqmp/Kconfig| 48 arch/arm/cpu/armv8/zynqmp/spl.c | 30 arch/arm/include/asm/arch-zynqmp/hardware.h | 14 +- arch/arm/include/asm/spl.h | 1 + board/xilinx/zynqmp/zynqmp.c | 128 +--- configs/xilinx_zynqmp_ep_defconfig | 3 ++ configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 ++ configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 2 ++ configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 3 +- configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 2 ++ configs/xilinx_zynqmp_zcu102_defconfig | 3 ++ configs/xilinx_zynqmp_zcu102_revB_defconfig | 3 ++ drivers/Kconfig | 2 ++ drivers/fpga/Kconfig | 20 ++ drivers/fpga/Makefile| 1 + drivers/fpga/xilinx.c| 6 drivers/fpga/zynqmppl.c | 238 drivers/spi/zynq_spi.c | 7 +++-- include/configs/xilinx_zynqmp.h | 39 +- include/configs/xilinx_zynqmp_ep.h | 1 - include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h | 15 -- include/xilinx.h | 2 ++ include/zynqmppl.h | 24 23 files changed, 563 insertions(+), 31 deletions(-) create mode 100644 drivers/fpga/Kconfig create mode 100644 drivers/fpga/zynqmppl.c delete mode 100644 include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h create mode 100644 include/zynqmppl.h -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
On Mon, Sep 19, 2016 at 12:00:27PM +0200, Michal Simek wrote: > On 18.9.2016 20:04, Tom Rini wrote: > > On Wed, Sep 14, 2016 at 01:14:37PM +0200, Michal Simek wrote: > > > >> Hi Tom, > >> > >> here are patches I have collected for improving Xilinx support. > >> I have also patches regarding moving IDENT_STRING to Kconfig > >> but they need to be rework because simple adding it to Kconfig > >> won't work. All boards need to be converted in this patch. > > > > OK, pass it back over to me in patchwork and I'll take care of it. > > Done > http://patchwork.ozlabs.org/patch/654074/ > > > > >> > >> Also I have pending patches around moving ceva driver to DM > >> which need to be reviewed by Simon. > >> > >> Thanks, > >> Michal > >> > >> > >> The following changes since commit > >> 8cbb389bb3da80cbf8911f8386cbff92c6a78afe: > >> > >> Prepare v2016.09 (2016-09-12 10:05:51 -0400) > >> > >> are available in the git repository at: > >> > >> git://www.denx.de/git/u-boot-microblaze.git master > >> > >> for you to fetch changes up to 463265791c51dbdf16c0be763ff5bcd148964837: > >> > >> ARM64: zynqmp: Enable CONFIG_AHCI via Kconfig (2016-09-14 13:11:04 +0200) > >> > > > > NAK. And yes, I know the PR came before the SPL series went in along > > with the series to reject new Kconfig options, sorry. But on top of > > tree: > >aarch64: + xilinx_zynqmp_zc1751_xm019_dc5 > > +(xilinx_zynqmp_zc1751_xm019_dc5) Error: You must add new CONFIG options > > using Kconfig > > +(xilinx_zynqmp_zc1751_xm019_dc5) The following new ad-hoc CONFIG options > > were detected: > > +(xilinx_zynqmp_zc1751_xm019_dc5) CONFIG_ARM_SMC > > +(xilinx_zynqmp_zc1751_xm019_dc5) CONFIG_FPGA_ZYNQMPPL > > +(xilinx_zynqmp_zc1751_xm019_dc5) > > +(xilinx_zynqmp_zc1751_xm019_dc5) Please add these via Kconfig instead. > > Find a suitable Kconfig > > +(xilinx_zynqmp_zc1751_xm019_dc5) file and add a 'config' or 'menuconfig' > > option. > > +(xilinx_zynqmp_zc1751_xm019_dc5) make[1]: *** [no_new_adhoc_configs_check] > > Error 1 > > +(xilinx_zynqmp_zc1751_xm019_dc5) make: *** [sub-make] Error 2 > > Ok. When I was running that these patches were not in the tree. > Anyway I will introduce new Kconfig for fpga subsystem and fix that one > particular patch. Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
On 18.9.2016 20:04, Tom Rini wrote: > On Wed, Sep 14, 2016 at 01:14:37PM +0200, Michal Simek wrote: > >> Hi Tom, >> >> here are patches I have collected for improving Xilinx support. >> I have also patches regarding moving IDENT_STRING to Kconfig >> but they need to be rework because simple adding it to Kconfig >> won't work. All boards need to be converted in this patch. > > OK, pass it back over to me in patchwork and I'll take care of it. Done http://patchwork.ozlabs.org/patch/654074/ > >> >> Also I have pending patches around moving ceva driver to DM >> which need to be reviewed by Simon. >> >> Thanks, >> Michal >> >> >> The following changes since commit 8cbb389bb3da80cbf8911f8386cbff92c6a78afe: >> >> Prepare v2016.09 (2016-09-12 10:05:51 -0400) >> >> are available in the git repository at: >> >> git://www.denx.de/git/u-boot-microblaze.git master >> >> for you to fetch changes up to 463265791c51dbdf16c0be763ff5bcd148964837: >> >> ARM64: zynqmp: Enable CONFIG_AHCI via Kconfig (2016-09-14 13:11:04 +0200) >> > > NAK. And yes, I know the PR came before the SPL series went in along > with the series to reject new Kconfig options, sorry. But on top of > tree: >aarch64: + xilinx_zynqmp_zc1751_xm019_dc5 > +(xilinx_zynqmp_zc1751_xm019_dc5) Error: You must add new CONFIG options > using Kconfig > +(xilinx_zynqmp_zc1751_xm019_dc5) The following new ad-hoc CONFIG options > were detected: > +(xilinx_zynqmp_zc1751_xm019_dc5) CONFIG_ARM_SMC > +(xilinx_zynqmp_zc1751_xm019_dc5) CONFIG_FPGA_ZYNQMPPL > +(xilinx_zynqmp_zc1751_xm019_dc5) > +(xilinx_zynqmp_zc1751_xm019_dc5) Please add these via Kconfig instead. Find > a suitable Kconfig > +(xilinx_zynqmp_zc1751_xm019_dc5) file and add a 'config' or 'menuconfig' > option. > +(xilinx_zynqmp_zc1751_xm019_dc5) make[1]: *** [no_new_adhoc_configs_check] > Error 1 > +(xilinx_zynqmp_zc1751_xm019_dc5) make: *** [sub-make] Error 2 Ok. When I was running that these patches were not in the tree. Anyway I will introduce new Kconfig for fpga subsystem and fix that one particular patch. Thanks, Michal -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
On Wed, Sep 14, 2016 at 01:14:37PM +0200, Michal Simek wrote: > Hi Tom, > > here are patches I have collected for improving Xilinx support. > I have also patches regarding moving IDENT_STRING to Kconfig > but they need to be rework because simple adding it to Kconfig > won't work. All boards need to be converted in this patch. OK, pass it back over to me in patchwork and I'll take care of it. > > Also I have pending patches around moving ceva driver to DM > which need to be reviewed by Simon. > > Thanks, > Michal > > > The following changes since commit 8cbb389bb3da80cbf8911f8386cbff92c6a78afe: > > Prepare v2016.09 (2016-09-12 10:05:51 -0400) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git master > > for you to fetch changes up to 463265791c51dbdf16c0be763ff5bcd148964837: > > ARM64: zynqmp: Enable CONFIG_AHCI via Kconfig (2016-09-14 13:11:04 +0200) > NAK. And yes, I know the PR came before the SPL series went in along with the series to reject new Kconfig options, sorry. But on top of tree: aarch64: + xilinx_zynqmp_zc1751_xm019_dc5 +(xilinx_zynqmp_zc1751_xm019_dc5) Error: You must add new CONFIG options using Kconfig +(xilinx_zynqmp_zc1751_xm019_dc5) The following new ad-hoc CONFIG options were detected: +(xilinx_zynqmp_zc1751_xm019_dc5) CONFIG_ARM_SMC +(xilinx_zynqmp_zc1751_xm019_dc5) CONFIG_FPGA_ZYNQMPPL +(xilinx_zynqmp_zc1751_xm019_dc5) +(xilinx_zynqmp_zc1751_xm019_dc5) Please add these via Kconfig instead. Find a suitable Kconfig +(xilinx_zynqmp_zc1751_xm019_dc5) file and add a 'config' or 'menuconfig' option. +(xilinx_zynqmp_zc1751_xm019_dc5) make[1]: *** [no_new_adhoc_configs_check] Error 1 +(xilinx_zynqmp_zc1751_xm019_dc5) make: *** [sub-make] Error 2 -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes
Hi Tom, here are patches I have collected for improving Xilinx support. I have also patches regarding moving IDENT_STRING to Kconfig but they need to be rework because simple adding it to Kconfig won't work. All boards need to be converted in this patch. Also I have pending patches around moving ceva driver to DM which need to be reviewed by Simon. Thanks, Michal The following changes since commit 8cbb389bb3da80cbf8911f8386cbff92c6a78afe: Prepare v2016.09 (2016-09-12 10:05:51 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master for you to fetch changes up to 463265791c51dbdf16c0be763ff5bcd148964837: ARM64: zynqmp: Enable CONFIG_AHCI via Kconfig (2016-09-14 13:11:04 +0200) Michal Simek (12): ARM64: zynqmp: Wire up both USBs available on ZynqMP ARM64: zynqmp: Force certain bootmode for SPL ARM64: zynqmp: Fix usb_gadget_handle_interrupt routine spi: zynq: Use variable to remove u32 to u64 conversions ARM64: zynqmp: Move BSS location to the beginning of ram ARM64: zynqmp: Add USB boot mode ARM: Add new BOOT_DEVICE_DFU boot mode ARM64: zynqmp: Add support for DFU from SPL ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins ARM64: zynqmp: Fix USB ulpi phy sequence ARM64: zynqmp: Add support for chip ID detection ARM64: zynqmp: Enable CONFIG_AHCI via Kconfig Siva Durga Prasad Paladugu (1): fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP arch/arm/cpu/armv8/zynqmp/Kconfig | 48 + arch/arm/cpu/armv8/zynqmp/spl.c | 30 + arch/arm/include/asm/arch-zynqmp/hardware.h | 14 +- arch/arm/include/asm/spl.h | 1 + board/xilinx/zynqmp/zynqmp.c| 128 --- configs/xilinx_zynqmp_ep_defconfig | 1 + configs/xilinx_zynqmp_zcu102_defconfig | 1 + configs/xilinx_zynqmp_zcu102_revB_defconfig | 1 + drivers/fpga/Makefile | 1 + drivers/fpga/xilinx.c | 6 + drivers/fpga/zynqmppl.c | 238 + drivers/spi/zynq_spi.c | 7 +++-- include/configs/xilinx_zynqmp.h | 43 - include/configs/xilinx_zynqmp_ep.h | 1 - include/xilinx.h| 2 ++ include/zynqmppl.h | 24 + 16 files changed, 532 insertions(+), 14 deletions(-) create mode 100644 drivers/fpga/zynqmppl.c create mode 100644 include/zynqmppl.h -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
On Tue, Aug 02, 2016 at 08:25:04AM +0200, Michal Simek wrote: > Hi Tom, > > please pull these patches to your tree. There are two critical > patches. One dm-pre-reloc which get ZynqMP boards back to live. > And the second about stack pointer init. > > Thanks, > Michal > > > The following changes since commit 26fb8db0f4d1e7c118b5e8f3a8849f359b91c166: > > Merge git://git.denx.de/u-boot-rockchip (2016-07-31 20:31:13 -0400) > > are available in the git repository at: > > > git://www.denx.de/git/u-boot-microblaze.git master > > for you to fetch changes up to 28559d4c93de5039f851eea6d1404305d3ad0825: > > ARM64: zynqmp: Do not enable DM_MMC by default (2016-08-02 07:19:09 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes
Hi Tom, please pull these patches to your tree. There are two critical patches. One dm-pre-reloc which get ZynqMP boards back to live. And the second about stack pointer init. Thanks, Michal The following changes since commit 26fb8db0f4d1e7c118b5e8f3a8849f359b91c166: Merge git://git.denx.de/u-boot-rockchip (2016-07-31 20:31:13 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master for you to fetch changes up to 28559d4c93de5039f851eea6d1404305d3ad0825: ARM64: zynqmp: Do not enable DM_MMC by default (2016-08-02 07:19:09 +0200) Michal Simek (5): ARM64: zynqmp: Add u-boot,dm-pre-reloc to clk nodes ARM64: zynqmp: Wire up PSCI reset xilinx: Sync defconfigs with the latest Kconfig layout ARM64: zynqmp: Define config USB_STORAGE through defconfig ARM64: zynqmp: Do not enable DM_MMC by default Soren Brinkmann (1): ARM64: zynqmp: Fix stack pointer initialization arch/arm/Kconfig | 3 --- arch/arm/dts/zynqmp-clk.dtsi | 1 + arch/arm/dts/zynqmp-ep108-clk.dtsi | 1 + board/xilinx/zynqmp/zynqmp.c | 5 + configs/microblaze-generic_defconfig | 4 ++-- configs/xilinx_zynqmp_ep_defconfig | 11 +++ configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 11 +++ configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 11 +++ configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 8 +--- configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 8 +--- configs/xilinx_zynqmp_zcu102_defconfig | 9 ++--- configs/xilinx_zynqmp_zcu102_revB_defconfig | 9 ++--- configs/zynq_microzed_defconfig | 6 ++ configs/zynq_picozed_defconfig | 6 ++ configs/zynq_zc702_defconfig | 5 ++--- configs/zynq_zc706_defconfig | 5 ++--- configs/zynq_zc770_xm010_defconfig | 3 +-- configs/zynq_zc770_xm011_defconfig | 3 +-- configs/zynq_zc770_xm012_defconfig | 1 - configs/zynq_zc770_xm013_defconfig | 3 +-- configs/zynq_zed_defconfig | 6 ++ configs/zynq_zybo_defconfig | 5 ++--- include/configs/xilinx_zynqmp.h | 4 ++-- 23 files changed, 69 insertions(+), 59 deletions(-) -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Xilinx Microblaze Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
On Fri, Jul 22, 2016 at 03:17:51PM +0200, Michal Simek wrote: > Hi Tom, > > I am sending bunch of patches I have collected around Xilinx changes. > USB Kconfig was discussed with Marek and I have got his ACK via IRC. > Kconfig change CONFIG_SYS_NO_FLASH we discussed together (I have run > some builds for others arm stuff) > CLK changes was also discussed with Stephen and Simon. > > > Thanks, > Michal > > > The following changes since commit 95d52733036af7438a5285d729d53844ec48c63e: > > Revert "stm32: Change USART port to USART6 for stm32f746 discovery > board" (2016-07-21 15:38:13 -0400) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git master > > for you to fetch changes up to 766d2609dd7fbad0faa89c7dff26edc108afa890: > > zynq: defconfig: Remove unnecessary board specific config files > (2016-07-22 15:16:43 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes
Hi Tom, I am sending bunch of patches I have collected around Xilinx changes. USB Kconfig was discussed with Marek and I have got his ACK via IRC. Kconfig change CONFIG_SYS_NO_FLASH we discussed together (I have run some builds for others arm stuff) CLK changes was also discussed with Stephen and Simon. Thanks, Michal The following changes since commit 95d52733036af7438a5285d729d53844ec48c63e: Revert "stm32: Change USART port to USART6 for stm32f746 discovery board" (2016-07-21 15:38:13 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master for you to fetch changes up to 766d2609dd7fbad0faa89c7dff26edc108afa890: zynq: defconfig: Remove unnecessary board specific config files (2016-07-22 15:16:43 +0200) Alexander Graf (1): ARM64: zynqmp: Enable AHCI on EP platform Michal Simek (9): ARM: zynq/zynqmp: Use the default CONFIG_BOOTDELAY=2 api: Disable api_net when DM is used spl: Fix compilation warnings for arm64 ARM64: zynqmp: Enable CLK and SPL_CLK by default ARM64: zynqmp: Enable SPL for all zynqmp boards serial: zynq: Read information about clock from DT ARM64: zynqmp: Remove get_uart_clk() dm: clk: Remove simple version of clk_get_by_index/name() microblaze: Remove empty ifdef around caches Siva Durga Prasad Paladugu (6): mmc: sdhci: Disable internal clock enable bit usb: Kconfig: Add Kconfigs entry USB_EHCI_ZYNQ usb: zynq: Define config USB_STORAGE through defconfig Kconfig: Move option CONFIG_SYS_NO_FLASH to Kconfig zynq: config: Enable CONFIG_SYS_NO_FLASH through defconfig zynq: defconfig: Remove unnecessary board specific config files api/api_net.c| 2 +- arch/arm/Kconfig | 2 ++ arch/arm/cpu/armv8/zynqmp/clk.c | 16 arch/arm/include/asm/arch-zynqmp/clk.h | 1 - arch/arm/lib/spl.c | 2 +- common/Kconfig | 6 ++ common/spl/spl_fat.c | 3 ++- configs/xilinx_zynqmp_ep_defconfig | 8 +--- configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 8 +--- configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 8 +--- configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 8 +--- configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 8 +--- configs/xilinx_zynqmp_zcu102_defconfig | 8 +--- configs/xilinx_zynqmp_zcu102_revB_defconfig | 8 +--- configs/zynq_microzed_defconfig | 7 +-- configs/zynq_picozed_defconfig | 7 +-- configs/zynq_zc702_defconfig | 5 - configs/zynq_zc706_defconfig | 5 - configs/zynq_zc770_xm010_defconfig | 4 ++-- configs/zynq_zc770_xm011_defconfig | 4 ++-- configs/zynq_zc770_xm012_defconfig | 3 +-- configs/zynq_zc770_xm013_defconfig | 4 ++-- configs/zynq_zed_defconfig | 7 +-- configs/zynq_zybo_defconfig | 5 - drivers/clk/clk-uclass.c | 28 +--- drivers/mmc/sdhci.c | 2 +- drivers/serial/serial_zynq.c | 28 +++- drivers/usb/host/Kconfig | 7 +++ include/configs/microblaze-generic.h | 4 include/configs/xilinx_zynqmp_ep.h | 1 + include/configs/zynq-common.h| 5 + include/configs/zynq_microzed.h | 19 --- include/configs/zynq_picozed.h | 19 --- include/configs/zynq_zc70x.h | 3 --- include/configs/zynq_zc770.h | 22 -- include/configs/zynq_zed.h | 19 --- include/configs/zynq_zybo.h | 3 --- 37 files changed, 119 insertions(+), 180 deletions(-) delete mode 100644 include/configs/zynq_microzed.h delete mode 100644 include/configs/zynq_picozed.h delete mode 100644 include/configs/zynq_zc770.h delete mode 100644 include/configs/zynq_zed.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
On Mon, Jun 06, 2016 at 11:26:53AM +0200, Michal Simek wrote: > Hi Tom, > > please pull these changes to your tree. It is converting ZynqMP targets to > use distro > boot options. > I am still waiting for Marek to apply one USB DWC3 patch to fix usb support > on ZynqMP. > > Thanks, > Michal > > > The following changes since commit b2f1858455e99a91aeafe59ac73c6c047106d5e8: > > arm: lib: fix push/pop-section directives (2016-06-03 15:14:11 -0400) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git master > > for you to fetch changes up to 59e880560f49827458b82345bb5ccfb7cb93af8c: > > ARM64: zynqmp: Extend malloc space before relocation (2016-06-06 11:23:41 > +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes
Hi Tom, please pull these changes to your tree. It is converting ZynqMP targets to use distro boot options. I am still waiting for Marek to apply one USB DWC3 patch to fix usb support on ZynqMP. Thanks, Michal The following changes since commit b2f1858455e99a91aeafe59ac73c6c047106d5e8: arm: lib: fix push/pop-section directives (2016-06-03 15:14:11 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master for you to fetch changes up to 59e880560f49827458b82345bb5ccfb7cb93af8c: ARM64: zynqmp: Extend malloc space before relocation (2016-06-06 11:23:41 +0200) Alexander Graf (1): ARM64: zynqmp: Remove CONFIG_BOOTP_SERVERIP Michal Simek (14): ARM64: zynqmp: Enable CMD_NAND via Kconfig microblaze: Select compilation flags via Kconfig microblaze: Add option to pass cpu version number microblaze: Move MSR instruction selection to Kconfig ARM64: zynqmp: Enable Vitesse and RealTek ethernet phys ARM64: zynqmp: Add debug uart for zc1751-dc2 ARM64: zynqmp: Add support for zc1751-dc4 ARM64: zynqmp: Extend page_table_size ARM64: zynq: Fix boot.bin generation for Zynq and ZynqMP env: Setup GD_FLG_ENV_DEFAULT flag when default environment are used ARM64: zynqmp: Enable support for SPL FIT images ARM64: zynqmp: Enable AHCI when CONFIG_SATA_CEVA is defined ARM64: zynqmp: Add support for standard distro boot commands ARM64: zynqmp: Extend malloc space before relocation Siva Durga Prasad Paladugu (1): mtd: nand: arasan_nfc: Correct nand ecc initialization arch/arm/cpu/armv8/zynqmp/cpu.c | 5 arch/arm/dts/Makefile| 1 + arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 212 arch/microblaze/include/asm/asm.h| 2 +- board/xilinx/microblaze-generic/Kconfig | 24 ++ board/xilinx/microblaze-generic/config.mk| 24 ++ board/xilinx/microblaze-generic/xparameters.h| 1 - board/xilinx/zynqmp/zynqmp.c | 34 +++-- common/env_common.c | 1 + configs/microblaze-generic_defconfig | 4 +++ configs/xilinx_zynqmp_ep_defconfig | 4 ++- configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 2 ++ configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 8 ++ configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 43 configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 2 ++ configs/xilinx_zynqmp_zcu102_defconfig | 2 ++ configs/xilinx_zynqmp_zcu102_revB_defconfig | 2 ++ drivers/mtd/nand/arasan_nfc.c| 18 +++--- include/asm-generic/global_data.h| 1 + include/configs/xilinx_zynqmp.h | 66 +++-- include/configs/xilinx_zynqmp_ep.h | 7 -- include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h | 7 -- include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h | 7 -- include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h | 17 + include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h | 7 -- include/configs/xilinx_zynqmp_zcu102.h | 8 -- scripts/Makefile.spl | 7 ++ 27 files changed, 428 insertions(+), 88 deletions(-) create mode 100644 arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts create mode 100644 configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig create mode 100644 include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
Hi,
please ignore this one.
I have found one issue on microblaze.
Thanks,
Michal
On 24.5.2016 13:02, Michal Simek wrote:
> Hi Tom,
>
> here are patches I have collected. I expect some others changes will
> come after that.
>
> Thanks,
> Michal
>
>
> The following changes since commit d7d000311285e4b8d11e089ca13ea456a01be3b8:
>
> Merge branch 'master' of git://git.denx.de/u-boot-mips (2016-05-23
> 11:51:37 -0400)
>
> are available in the git repository at:
>
>
> git://www.denx.de/git/u-boot-microblaze.git master
>
> for you to fetch changes up to da83af77b125bbf487502c79cfb22c750e3dec11:
>
> ARM: zynq: Simplify zynq configuration (2016-05-24 11:15:02 +0200)
>
>
> Alexander Graf (1):
> ARM64: zynqmp: Align gic ranges for 64k in device tree
>
> Masahiro Yamada (2):
> ARM: zynq: load u-boot.img whether CONFIG_OF_SEPARATE is defined
> or not
> ARM: dts: zynq: describe SLCR as simple-mfd rather than simple-bus
>
> Michal Simek (27):
> gpio: zynq: Add support for reading gpio pin state
> ARM64: zynqmp: Enable HUSH parser for all zynqmp targets
> ARM64: zynqmp: Enable missing distro default options
> ARM64: zynqmp: Add support for reading MAC from eeprom
> ARM64: zynqmp: Enable eMMC boot partitions commands
> ARM64: zynqmp: Wire up debug_uart setup
> ARM: zynq: Add support for SPL_LOAD_FIT
> ARM64: zynqmp: Remove CONFIG_PREBOOT
> ARM64: zynqmp: Enable SPI_FLASH and FLASH_BAR for ep108
> ARM64: zynqmp: Add debug uart for zc1751-dc1
> spl: Introduce new function spl_board_prepare_for_boot
> ARM64: zynqmp: Enable option to overwrite default variables
> ARM: zynq: Call ps7_post_config() for SPL
> SPL: FIT: Enable SPL_FIT_LOAD in RAM based boot mode
> tools: zynqmpimage: Add Xilinx ZynqMP boot header generation
> ARM64: zynqmp: Add missing u-boot,dm-pre-reloc to DTSI
> ARM64: zynqmp: Add SPL support support
> ARM64: zynqmp: Enable CLK framework
> fpga: Fix typo in function comment
> mkimage: Report information about fpga
> net: xilinx: Handle error value from phy_startup()
> phy: Return correct error code when timeout happens
> net: phy: Handle phy_startup() error codes properly
> image: Add boot_get_fpga() to load fpga with bootm
> phy: Wire return value from phy_config()
> phy: marvell: Do not reset phy after negotiation
> ARM: zynq: Simplify zynq configuration
>
> arch/arm/Kconfig
> | 1 +
> arch/arm/cpu/armv8/zynqmp/Makefile
> | 1 +
> arch/arm/cpu/armv8/zynqmp/spl.c
> | 107 +
> arch/arm/dts/zynq-7000.dtsi
> | 2 +-
> arch/arm/dts/zynqmp.dtsi
> | 9 -
> arch/arm/include/asm/arch-zynqmp/sys_proto.h
> | 2 +
> arch/arm/mach-zynq/Kconfig
> | 48 +++-
> arch/arm/mach-zynq/spl.c
> | 25 +
> board/xilinx/zynq/Makefile
> | 12 +-
> board/xilinx/zynq/custom_hw_platform/.gitignore
> | 1 -
> board/xilinx/zynq/{MicroZed_hw_platform =>
> zynq-microzed}/ps7_init_gpl.c | 0
> board/xilinx/zynq/{MicroZed_hw_platform =>
> zynq-microzed}/ps7_init_gpl.h | 0
> board/xilinx/zynq/{ZC702_hw_platform => zynq-zc702}/ps7_init_gpl.c
> | 0
> board/xilinx/zynq/{ZC702_hw_platform => zynq-zc702}/ps7_init_gpl.h
> | 0
> board/xilinx/zynq/{ZC706_hw_platform => zynq-zc706}/ps7_init_gpl.c
> | 0
> board/xilinx/zynq/{ZC706_hw_platform => zynq-zc706}/ps7_init_gpl.h
> | 0
> board/xilinx/zynq/{zed_hw_platform => zynq-zed}/ps7_init_gpl.c
> | 0
> board/xilinx/zynq/{zed_hw_platform => zynq-zed}/ps7_init_gpl.h
> | 0
> board/xilinx/zynq/{zybo_hw_platform => zynq-zybo}/ps7_init_gpl.c
> | 0
> board/xilinx/zynq/{zybo_hw_platform => zynq-zybo}/ps7_init_gpl.h
> | 0
> board/xilinx/zynqmp/Makefile
> | 23 +++-
> board/xilinx/zynqmp/xil_io.h
> | 35 ++
> board/xilinx/zynqmp/zynqmp.c
> | 17 +
> common/bootm.c
> | 10 +
> common/image-fit.c
> | 11 +-
> common/image.c
> | 94 ++
> common/spl/spl.c
> | 51 -
> configs/xilinx_zynqmp_ep_defconfig
> | 9 +
> configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
> | 8
> configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
> | 3 ++
> configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
> | 3 ++
> configs/xilinx_zynqmp_zcu102_defconfig
> | 8
> configs/xilinx_zynqmp_zcu102_revB_defconfig
> | 8
> configs/zynq_microzed_defconfig
> | 2 +-
> configs/zynq_picozed_defconfig
> | 2 +-
> configs/zynq_zc702_defconfig
> | 1 +
> configs/zynq_zc706_defconfig
> | 2 +-
> configs/zynq_zc770_xm010_defconfig
> | 2 +-
> configs/zynq_zc770_xm011_defconfig
> | 2 +-
> configs/zynq_zc770_xm012_defconfig
> | 2 +-
> con
[U-Boot] [GIT PULL] Xilinx changes
Hi Tom,
here are patches I have collected. I expect some others changes will
come after that.
Thanks,
Michal
The following changes since commit d7d000311285e4b8d11e089ca13ea456a01be3b8:
Merge branch 'master' of git://git.denx.de/u-boot-mips (2016-05-23
11:51:37 -0400)
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.git master
for you to fetch changes up to da83af77b125bbf487502c79cfb22c750e3dec11:
ARM: zynq: Simplify zynq configuration (2016-05-24 11:15:02 +0200)
Alexander Graf (1):
ARM64: zynqmp: Align gic ranges for 64k in device tree
Masahiro Yamada (2):
ARM: zynq: load u-boot.img whether CONFIG_OF_SEPARATE is defined
or not
ARM: dts: zynq: describe SLCR as simple-mfd rather than simple-bus
Michal Simek (27):
gpio: zynq: Add support for reading gpio pin state
ARM64: zynqmp: Enable HUSH parser for all zynqmp targets
ARM64: zynqmp: Enable missing distro default options
ARM64: zynqmp: Add support for reading MAC from eeprom
ARM64: zynqmp: Enable eMMC boot partitions commands
ARM64: zynqmp: Wire up debug_uart setup
ARM: zynq: Add support for SPL_LOAD_FIT
ARM64: zynqmp: Remove CONFIG_PREBOOT
ARM64: zynqmp: Enable SPI_FLASH and FLASH_BAR for ep108
ARM64: zynqmp: Add debug uart for zc1751-dc1
spl: Introduce new function spl_board_prepare_for_boot
ARM64: zynqmp: Enable option to overwrite default variables
ARM: zynq: Call ps7_post_config() for SPL
SPL: FIT: Enable SPL_FIT_LOAD in RAM based boot mode
tools: zynqmpimage: Add Xilinx ZynqMP boot header generation
ARM64: zynqmp: Add missing u-boot,dm-pre-reloc to DTSI
ARM64: zynqmp: Add SPL support support
ARM64: zynqmp: Enable CLK framework
fpga: Fix typo in function comment
mkimage: Report information about fpga
net: xilinx: Handle error value from phy_startup()
phy: Return correct error code when timeout happens
net: phy: Handle phy_startup() error codes properly
image: Add boot_get_fpga() to load fpga with bootm
phy: Wire return value from phy_config()
phy: marvell: Do not reset phy after negotiation
ARM: zynq: Simplify zynq configuration
arch/arm/Kconfig
| 1 +
arch/arm/cpu/armv8/zynqmp/Makefile
| 1 +
arch/arm/cpu/armv8/zynqmp/spl.c
| 107 +
arch/arm/dts/zynq-7000.dtsi
| 2 +-
arch/arm/dts/zynqmp.dtsi
| 9 -
arch/arm/include/asm/arch-zynqmp/sys_proto.h
| 2 +
arch/arm/mach-zynq/Kconfig
| 48 +++-
arch/arm/mach-zynq/spl.c
| 25 +
board/xilinx/zynq/Makefile
| 12 +-
board/xilinx/zynq/custom_hw_platform/.gitignore
| 1 -
board/xilinx/zynq/{MicroZed_hw_platform =>
zynq-microzed}/ps7_init_gpl.c | 0
board/xilinx/zynq/{MicroZed_hw_platform =>
zynq-microzed}/ps7_init_gpl.h | 0
board/xilinx/zynq/{ZC702_hw_platform => zynq-zc702}/ps7_init_gpl.c
| 0
board/xilinx/zynq/{ZC702_hw_platform => zynq-zc702}/ps7_init_gpl.h
| 0
board/xilinx/zynq/{ZC706_hw_platform => zynq-zc706}/ps7_init_gpl.c
| 0
board/xilinx/zynq/{ZC706_hw_platform => zynq-zc706}/ps7_init_gpl.h
| 0
board/xilinx/zynq/{zed_hw_platform => zynq-zed}/ps7_init_gpl.c
| 0
board/xilinx/zynq/{zed_hw_platform => zynq-zed}/ps7_init_gpl.h
| 0
board/xilinx/zynq/{zybo_hw_platform => zynq-zybo}/ps7_init_gpl.c
| 0
board/xilinx/zynq/{zybo_hw_platform => zynq-zybo}/ps7_init_gpl.h
| 0
board/xilinx/zynqmp/Makefile
| 23 +++-
board/xilinx/zynqmp/xil_io.h
| 35 ++
board/xilinx/zynqmp/zynqmp.c
| 17 +
common/bootm.c
| 10 +
common/image-fit.c
| 11 +-
common/image.c
| 94 ++
common/spl/spl.c
| 51 -
configs/xilinx_zynqmp_ep_defconfig
| 9 +
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
| 8
configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
| 3 ++
configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
| 3 ++
configs/xilinx_zynqmp_zcu102_defconfig
| 8
configs/xilinx_zynqmp_zcu102_revB_defconfig
| 8
configs/zynq_microzed_defconfig
| 2 +-
configs/zynq_picozed_defconfig
| 2 +-
configs/zynq_zc702_defconfig
| 1 +
configs/zynq_zc706_defconfig
| 2 +-
configs/zynq_zc770_xm010_defconfig
| 2 +-
configs/zynq_zc770_xm011_defconfig
| 2 +-
configs/zynq_zc770_xm012_defconfig
| 2 +-
configs/zynq_zc770_xm013_defconfig
| 2 +-
configs/zynq_zed_defconfig
| 2 +-
configs/zynq_zybo_defconfig
| 2 +-
doc/uImage.FIT/multi-with-fpga.its
| 67 +
doc/uImage.FIT/source_file_format.txt
| 3 ++
drivers/fpga/fpga.c
| 2 +-
drivers/gpio/zynq_gpio.c
| 22 +++
drivers/net/phy/broadcom.c
| 34 +++--
drivers/net/phy/davicom.c
Re: [U-Boot] [GIT PULL] Xilinx changes
On Wed, Apr 13, 2016 at 06:37:49PM +0200, Michal Simek wrote: > Hi Tom, > > here are patches I have collected till now. > Based on my discussion with Heiko, I am adding I2C patches which were > all reviewed by him. zcu102 is using old i2c non DM based driver because > we are missing i2c mux support. When we have it I will convert this > board to DM based driver too. Zynq is still using old driver because of > missing DM support for EEPROMs. > > The most of that changes are in DT but it is also adding support for new > ZynqMP boards and gpio driver update. > > Output from buildman doesn't show any problem. > > Thanks, > Michal > > > > The following changes since commit bbf8bef196ae52517284a0a2e2ffc94a4ff89f5f: > > Prepare v2016.05-rc1 (2016-04-11 22:22:25 -0400) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git master > > for you to fetch changes up to 58ed7f66939cbfb6e48656b3925aefd9f180a1a3: > > ARM64: zynqmp: Use i2c cadence DM driver (2016-04-13 18:29:07 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes
Hi Tom, here are patches I have collected till now. Based on my discussion with Heiko, I am adding I2C patches which were all reviewed by him. zcu102 is using old i2c non DM based driver because we are missing i2c mux support. When we have it I will convert this board to DM based driver too. Zynq is still using old driver because of missing DM support for EEPROMs. The most of that changes are in DT but it is also adding support for new ZynqMP boards and gpio driver update. Output from buildman doesn't show any problem. Thanks, Michal The following changes since commit bbf8bef196ae52517284a0a2e2ffc94a4ff89f5f: Prepare v2016.05-rc1 (2016-04-11 22:22:25 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master for you to fetch changes up to 58ed7f66939cbfb6e48656b3925aefd9f180a1a3: ARM64: zynqmp: Use i2c cadence DM driver (2016-04-13 18:29:07 +0200) Alistair Francis (1): ARM64: zynqmp: Use C pre-processor for includes in dts Anurag Kumar Vulisha (1): ARM64: zynqmp: Added OOB timing settings in zynqmp-ep108.dts Bharat Kumar Gogada (1): ARM64: zynqmp: Extend pcie node to support legacy interrupts Christian Kohn (2): ARM: zynq: zc702: Add adv7511 on i2c bus ARM: zynq: zc706: Add adv7511 on i2c bus Edgar E. Iglesias (2): ARM64: zynqmp: Correct IRQ nr for the SMMU ARM64: zynqmp: Hook up the GEMs to the SMMU Hyun Kwon (2): ARM64: zynqmp: Use correct addresses in node names ARM64: zynqmp: dp: Add default properties to zynqmp.dtsi Michal Simek (35): ARM: zynq: Add interrupt-controller property to gpio nodes ARM: zynq: Align devcfg node ARM: zynq: Fix bootargs in board dtsi ARM: zynq: Align spi and qspi node locations ARM: zynq: Create empty line below headers ARM: zynq: Add missing qspi for xm013 ARM: zynq: Extend microzed board support ARM: zynq: Fix usb phy node for Zybo ARM: zynq: Use memory initialization based on DTS file ARM: zynq: Support systems with more memory banks ARM: zynq: Do not perform reset at the end of thor ARM64: zynqmp: Add missing mmc aliases ARM64: zynqmp: Sync GEM nodes with Linux ARM64: zynqmp: Add missing interrupt-parent to PMU node ARM64: zynqmp: Add CCI-400 node ARM64: zynqmp: Add interrupt-controller property to gpio nodes ARM64: zynqmp: Fix coding style for pcie ARM64: zynqmp: Add backward compatible string for uart ARM64: zynqmp: Align node address with parent node for dpdma ARM64: zynqmp: Align register description ARM64: zynqmp: Add serdes address space dp driver ARM64: zynqmp: Fix DWC3 binding with the kernel ARM64: zynqmp: Use 64bit size cell format for memory node ARM64: zynqmp: Do not setup DM_ETH/GPIO/MMC by default for all boards ARM64: zynqmp: Extend early malloc space to be able to run DM drivers ARM64: zynqmp: Make DDR detection code work on 32bit system ARM64: zynqmp: Remove netdev.h from board file ARM64: zynqmp: Add support for ZCU102 platform ARM64: zynqmp: Add defconfig for zcu102 revB board ARM64: zynqmp: Add support for zc1751 with DC cards ARM64: zynqmp: Clean header after moving stuff to Kconfig ARM64: zynqmp: Enable CMD_GPIO and DM_GPIO for ep108 GPIO: pca953x: Remove compilation warnings on arm64 ARM64: zynqmp: Enable pca953x driver for zcu102 ARM64: zynqmp: Use i2c cadence DM driver Moritz Fischer (4): ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller. ARM: dts: Updated devicetree bindings for Zynq 7000 platform i2c: Describe Cadence I2C devicetree bindings dm: i2c: Add driver for Cadence I2C IP Naga Sureshkumar Relli (1): ARM64: zynqmp: Add ddrc node in dts P L Sai Krishna (2): ARM64: zynqmp: Add 8-bit bus width property. ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes Punnaiah Choudary Kalluri (2): ARM: zynq: DT: Add ethernet phy reset information ARM64: zynqmp: Add missing nand node for ep108 Ranjit Waghmode (1): ARM64: zynqmp: dt: Change qspi node compatible string Siva Durga Prasad Paladugu (7): ARM64: zynqmp: Move kernel and fdt offsets and sizes to board config file gpio: zynq: Convert Zynq GPIO to driver model gpio: Kconfig: Enable Zynq GPIO driver using kconfig gpio: zynq: Remove non driver model code gpio: zynq: Move the definitions to driver file gpio: zynqmp: Add GPIO driver support for ZynqMP zynqmp: Kconfig: Enable ZYNQ_GPIO for ZynqMP Soren Brinkmann (1): ARM64: zynqmp: DT: Add power domains VNSL Durga (1): ARM64: zynqmp: Added clocks to DT arch/arm/Kconfig | 3 +- arch/arm/dts/Makefile| 7 +- arch/arm/dts/zynq-7000.dtsi |
Re: [U-Boot] [GIT PULL] Xilinx changes
On Mon, Apr 04, 2016 at 08:31:06PM +0200, Michal Simek wrote: > Hi Tom, > > please pull these xilinx changes to your branch. > > Thanks, > Michal > > The following changes since commit 563d8d93585035fa2a0b20190c1008eb625432c4: > > net: phy: Realtek RTL8211B/C PHY ID fix (2016-04-02 19:26:08 -0400) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-microblaze.git master > > for you to fetch changes up to 07654ba1e37e0de2ee3a5983ad510a8c2dd21035: > > ARM64: zynqmp: Enable EFI partition support (2016-04-04 20:28:39 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes
Hi Tom, please pull these xilinx changes to your branch. Thanks, Michal The following changes since commit 563d8d93585035fa2a0b20190c1008eb625432c4: net: phy: Realtek RTL8211B/C PHY ID fix (2016-04-02 19:26:08 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master for you to fetch changes up to 07654ba1e37e0de2ee3a5983ad510a8c2dd21035: ARM64: zynqmp: Enable EFI partition support (2016-04-04 20:28:39 +0200) Joe Hershberger (1): Michal Simek (15): ARM: zynq: Enable option to overwrite default variables ARM: zynq: zybo: Enabling reading MAC address from EEPROM ARM: zynq: Fix default ps7_init_gpl.c/h for ZYBO microblaze: Read information about timer/interrupts from DT microblaze: Remove !OF_CONTROL code for timer and interrupt net: axi_emac: Report phy-node error message permanently ARM64: zynqmp: Enable FAT write and EXT4 write for USB too ARM64: zynqmp: Select SYS_CONFIG_NAME via Kconfig ARM64: Move HUSH enabling from board file to defconfig ARM64: zynqmp: Read RAM information from DT ARM64: zynqmp: Simplify MAINTAINERS file to support more boards block: Add support for Ceva sata ARM: zynq: Enable FLASH_BAR for microzed and zybo ARM: zynq: Add uEnv.txt support ARM64: zynqmp: Enable EFI partition support Siva Durga Prasad Paladugu (8): phy: Add phy driver support for xilinx PCS/PMA core net: zynq_gem: Add support for SGMII interface zynq-common: Enable phy driver for Xilinx PCS/PMA core net: xilinx_axi: Use interface type instead of zero net: xilinx_axi: Clear Isolate bit if found during phy setup net: zynq_gem: Return error incase of invalid phy address net: phy: Add SGMII support for TI phy net: zynq_gem: Add SGMII support for zynqMP Soren Brinkmann (1): ARM64: zynqmp: Decrease boot delay arch/arm/cpu/armv8/zynqmp/Kconfig | 15 +- arch/arm/mach-zynq/include/mach/sys_proto.h |2 + arch/microblaze/cpu/interrupts.c | 26 ++- arch/microblaze/cpu/timer.c | 39 +++- board/xilinx/microblaze-generic/xparameters.h | 11 -- board/xilinx/zynq/board.c | 13 ++ board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.c | 1581 ++ board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.h |9 +- board/xilinx/zynqmp/MAINTAINERS |7 +- board/xilinx/zynqmp/zynqmp.c | 125 + configs/xilinx_zynqmp_ep_defconfig|2 + configs/zynq_microzed_defconfig |1 + configs/zynq_zybo_defconfig |1 + drivers/block/Makefile|1 + drivers/block/sata_ceva.c | 113 +++ drivers/net/phy/Makefile |1 + drivers/net/phy/phy.c |3 + drivers/net/phy/ti.c | 39 +++- drivers/net/phy/xilinx_phy.c | 144 ++ drivers/net/xilinx_axi_emac.c | 24 ++- drivers/net/zynq_gem.c| 59 -- include/configs/microblaze-generic.h | 12 -- include/configs/xilinx_zynqmp.h | 18 +- include/configs/xilinx_zynqmp_ep.h|5 - include/configs/zynq-common.h | 29 +++ include/configs/zynq_zybo.h |3 + include/phy.h |1 + 27 files changed, 1964 insertions(+), 320 deletions(-) create mode 100644 drivers/block/sata_ceva.c create mode 100644 drivers/net/phy/xilinx_phy.c -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
Hi I have just sent a patch for this. Sorry about that! On Fri, Jan 29, 2016 at 12:18 AM, Tom Rini wrote: > On Wed, Jan 27, 2016 at 04:42:09PM +0100, Michal Simek wrote: > >> Hi Tom, >> >> here is the branch with xilinx changes which are flying around. >> It is targeting PowerPC, Microblaze, ARM and ARM64. >> I can't see any build problem via buildman. >> >> Thanks, >> Michal >> >> >> The following changes since commit 9e4de7fd4acc8f99b6d383c711d21c0159849629: >> >> Merge branch 'master' of http://git.denx.de/u-boot-sunxi (2016-01-26 >> 17:45:37 -0500) >> >> are available in the git repository at: >> >> >> git://www.denx.de/git/u-boot-microblaze.git master >> >> for you to fetch changes up to f36919a8138ed7ecd3dbce4630e02936b13907da: >> >> ppc: xilinx-ppc440-generic: Wire LL_TEMAC driver (2016-01-27 15:57:20 >> +0100) >> > > Applied to u-boot/master, thanks! > > But note: > +(xilinx-ppc405-generic) Device Tree Source is not correctly specified. > +(xilinx-ppc405-generic) Please define 'CONFIG_DEFAULT_DEVICE_TREE' > +(xilinx-ppc405-generic) or build with 'DEVICE_TREE=' argument > +(xilinx-ppc405-generic) make[2]: *** > [arch/powerpc/dts/xilinx-ppc440-generic.dtb] Error 1 > +(xilinx-ppc405-generic) make[1]: *** [dts] Error 2 > > -- > Tom > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot > -- Ricardo Ribalda ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [GIT PULL] Xilinx changes
On Wed, Jan 27, 2016 at 04:42:09PM +0100, Michal Simek wrote: > Hi Tom, > > here is the branch with xilinx changes which are flying around. > It is targeting PowerPC, Microblaze, ARM and ARM64. > I can't see any build problem via buildman. > > Thanks, > Michal > > > The following changes since commit 9e4de7fd4acc8f99b6d383c711d21c0159849629: > > Merge branch 'master' of http://git.denx.de/u-boot-sunxi (2016-01-26 > 17:45:37 -0500) > > are available in the git repository at: > > > git://www.denx.de/git/u-boot-microblaze.git master > > for you to fetch changes up to f36919a8138ed7ecd3dbce4630e02936b13907da: > > ppc: xilinx-ppc440-generic: Wire LL_TEMAC driver (2016-01-27 15:57:20 > +0100) > Applied to u-boot/master, thanks! But note: +(xilinx-ppc405-generic) Device Tree Source is not correctly specified. +(xilinx-ppc405-generic) Please define 'CONFIG_DEFAULT_DEVICE_TREE' +(xilinx-ppc405-generic) or build with 'DEVICE_TREE=' argument +(xilinx-ppc405-generic) make[2]: *** [arch/powerpc/dts/xilinx-ppc440-generic.dtb] Error 1 +(xilinx-ppc405-generic) make[1]: *** [dts] Error 2 -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes
Hi Tom, here is the branch with xilinx changes which are flying around. It is targeting PowerPC, Microblaze, ARM and ARM64. I can't see any build problem via buildman. Thanks, Michal The following changes since commit 9e4de7fd4acc8f99b6d383c711d21c0159849629: Merge branch 'master' of http://git.denx.de/u-boot-sunxi (2016-01-26 17:45:37 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master for you to fetch changes up to f36919a8138ed7ecd3dbce4630e02936b13907da: ppc: xilinx-ppc440-generic: Wire LL_TEMAC driver (2016-01-27 15:57:20 +0100) Michal Simek (75): microblaze: Remove CONSOLE_ARG microblaze: Move baudrate setting out driver selection serial: uartlite: Move driver to DM serial: uartlite: Add support for debug console serial: uartlite: Add uartlite to Kconfig microblaze: Enable uart16550 DM by default microblaze: Do not print eth device when DM_ETH is enabled microblaze: Enable PHYLIB via Kconfig microblaze: Remove unused I2C macros microblaze: Wire-up debug_uart in asm microblaze: Enable MICREL_KSZ9021 net: axi_emac: Fix parentheses around operand ! net: axi_emac: Show phy address instead of register content net: axi_emac: Pass directly pointer to register space net: axi_emac: Put iobase to private structure net: axi_emac: Pass private structure to phyread/phywrite net: axi_emac: Pass private structure where possible net: axi_emac: Move driver to DM net: axi_emac: Enable access to MDIO in probe net: axi_emac: Split recv from free_pkt net: axi_emac: Rename start, stop, write_hwaddr functions net: Add axi emac to Kconfig net: emaclite: Remove ancient OF probe function net: emaclite: Add MDIO support to driver net: emaclite: Convert MDIO to use register offset net: emaclite: Use indirect register access for tx_ping/pong net: emaclite: Use indirect register access for rx_ping/pong net: emaclite: Use indirect register access for TX reset net: emaclite: Fix logic around available TX buffers net: emaclite: Remove XEL_TSR_XMIT_ACTIVE_MASK flag net: emaclite: Use indirect reg access in send net: emaclite: Use indirect access in emaclite_recv net: emaclite: Move driver to DM net: emaclite: Rename start and stop functions net: emaclite: Let core to handle received packet net: emaclite: Move emaclite to Kconfig microblaze: Enable axi emac via Kconfig microblaze: Move eth configuration to Kconfig microblaze: Remove systemace from board file microblaze: Remove CONFIG_FIT from board file microblaze: Move CONFIG_NETCONSOLE to Kconfig microblaze: Remove empty file - cpu.c microblaze: Read information about RAM from DT microblaze: Enable HUSH via Kconfig microblaze: Fix board_init calling sequence fpga: Fix compilation warnings serial: zynq: Extend compatible string list serial: zynq: Fix address reading from DM net: phy: ti: Enable automatic crossover mode net: zynq: Change MDC setup for arm64 ARM: zynq: Remove memory division by 2 for ECC case ARM: zynq: Do not select options if SPL is not enabled ARM: zynq: Enable SPI_FLASH for zc770 xm013 platform ARM: zynq: Move FLASH_BAR to Kconfig ARM: zynq: Clean DTSI coding style ARM: zynq: Fix all remaining zynq platform to use stdout-path ARM: zynq: Fix defconfig for zybo ARM: zynq: Move spi node to aligned location ARM64: zynqmp: Remove incorrect link to common config file ARM64: zynqmp: Use the same U-Boot version with/without ATF ARM64: zynqmp: Add initial support for the first silicon ARM64: zynqmp: Fix coding style in phy node ARM64: zynqmp: Add support for SD1 boot mode ARM64: zynqmp: Show information about bootmode ARM64: zynqmp: Differentiate EMMC boot mode ARM64: zynqmp: Fix bootmode SD_MODE1 ARM64: zynqmp: Remove unneeded timer_init function ARM64: zynqmp: Enable advance memory test by default ARM64: zynqmp: Move memory setup to board file ARM64: zynqmp: Setup correct COUNTER_FREQUENCY for silicon ARM64: zynqmp: Allow overwrite identification string ARM64: zynqmp: Enable NATSEMI phys ARM64: zynqmp: Include GbE speed/duplex detection ARM64: zynqmp: Do not setup bootargs ARM: zynq: zynqmp: Line up checkboard message Punnaiah Choudary Kalluri (1): ARM64: zynqmp: Correct the watchdog timer interrupt number Ricardo Ribalda (22): ppc: xilinx-ppc440: Remove support for ml507 ppc: xilinx-ppc405: Remove support for fx12mm xilinx-ppc440: Remove support for v5fx30teval .mailmap: Add all the mail alias for Ricardo Ribalda mailaddr: Update mail address ppc: pp405-generic
Re: [U-Boot] [GIT PULL] Xilinx changes for Zynq and Microblaze
On Fri, Dec 18, 2015 at 01:24:06PM +0100, Michal Simek wrote: > Hi Tom, > > here are fixes which I have in my queue for 2016.1. > Moving Microblaze drivers to DM will be send after 2016.1 because there > are some stuff which are not fully reviewed yet. > > This patchset contain fixes for zybo, mkimage, gem and microblaze. > There is also one generic fix for MANUAL_RELOC for net DM. > > Thanks, > Michal > > The following changes since commit 9cddb4fe0266484aab9babdd2ebe650021644ea9: > > Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq > (2015-12-17 07:52:56 -0500) > > are available in the git repository at: > > > git://www.denx.de/git/u-boot-microblaze.git master > > for you to fetch changes up to b5e9b9a9a1bb231e35e206f8f3e2becee1dd06ab: > > microblaze: Do not handle watchdog and gpio in SPL (2015-12-18 > 13:15:58 +0100) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [GIT PULL] Xilinx changes for Zynq and Microblaze
Hi Tom, here are fixes which I have in my queue for 2016.1. Moving Microblaze drivers to DM will be send after 2016.1 because there are some stuff which are not fully reviewed yet. This patchset contain fixes for zybo, mkimage, gem and microblaze. There is also one generic fix for MANUAL_RELOC for net DM. Thanks, Michal The following changes since commit 9cddb4fe0266484aab9babdd2ebe650021644ea9: Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq (2015-12-17 07:52:56 -0500) are available in the git repository at: git://www.denx.de/git/u-boot-microblaze.git master for you to fetch changes up to b5e9b9a9a1bb231e35e206f8f3e2becee1dd06ab: microblaze: Do not handle watchdog and gpio in SPL (2015-12-18 13:15:58 +0100) Michal Simek (13): ARM: zynq: Enable u-boot,dm-pre-reloc for sdhci net: gem: Setup default phy address to -1 net: gem: Fix return value from recv net: gem: Separate recv and free_pkt functions net: gem: Fix typo in Kconfig entry net: gem: Add driver dependencies to PHYLIB dm: net: Fix DM for targets which use MANUAL_RELOC microblaze: Make room for malloc before ELF microblaze: Use malloc setting via Kconfig microblaze: Remove support for LL_TEMAC microblaze: Enable OF_CONTROL by default microblaze: Enable DM by default microblaze: Do not handle watchdog and gpio in SPL Nathan Rossi (4): ARM: zynq: Add default ps7_init_gpl.c/h for ZYBO tools: zynqimage: Clean up check_params spi: zynq_qspi: Add configuration to disable LQSPI feature arm: zynq: Update ZYBO config options arch/arm/dts/zynq-zc706.dts | 2 + arch/arm/dts/zynq-zed.dts| 2 + arch/arm/dts/zynq-zybo.dts |18 + arch/arm/mach-zynq/Kconfig | 1 - arch/microblaze/Kconfig | 2 + board/xilinx/microblaze-generic/microblaze-generic.c |38 +- board/xilinx/microblaze-generic/xparameters.h| 6 - board/xilinx/zynq/Makefile | 1 + board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.c| 11948 ++ board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.h|97 ++ configs/microblaze-generic_defconfig | 2 +- configs/zynq_microzed_defconfig | 1 - configs/zynq_picozed_defconfig | 1 - configs/zynq_zc702_defconfig | 1 - configs/zynq_zc706_defconfig | 1 - configs/zynq_zc770_xm010_defconfig | 1 - configs/zynq_zc770_xm011_defconfig | 1 - configs/zynq_zc770_xm012_defconfig | 1 - configs/zynq_zc770_xm013_defconfig | 1 - configs/zynq_zed_defconfig | 1 - configs/zynq_zybo_defconfig | 4 +- drivers/net/Kconfig | 3 +- drivers/net/zynq_gem.c |61 +- drivers/spi/zynq_qspi.c | 9 + include/configs/microblaze-generic.h |21 +- include/configs/xilinx_zynqmp.h | 1 - include/configs/zynq_zybo.h | 1 + net/eth.c|28 + tools/zynqimage.c| 3 +- 29 files changed, 12159 insertions(+), 98 deletions(-) create mode 100644 board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.c create mode 100644 board/xilinx/zynq/zybo_hw_platform/ps7_init_gpl.h -- Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91 w: www.monstr.eu p: +42-0-721842854 Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/ Maintainer of Linux kernel - Xilinx Zynq ARM architecture Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform signature.asc Description: OpenPGP digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
