The low-level debugging functions are useful to debug the early boot
stage where the full UART driver is not available.
UniPhier SoCs need to initialize the UART port 0 to use this feature.
The initialization routine is called at the very entry of the
lowlevel_init().
Signed-off-by: Masahiro Yamada
---
arch/arm/cpu/armv7/uniphier/lowlevel_init.S| 4 +++
arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile | 1 +
.../cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S| 29
arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile | 1 +
.../cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S | 39 ++
arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile | 1 +
.../cpu/armv7/uniphier/ph1-sld8/lowlevel_debug.S | 29
arch/arm/include/asm/arch-uniphier/debug-uart.S| 24 +
8 files changed, 128 insertions(+)
create mode 100644 arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S
create mode 100644 arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S
create mode 100644 arch/arm/cpu/armv7/uniphier/ph1-sld8/lowlevel_debug.S
create mode 100644 arch/arm/include/asm/arch-uniphier/debug-uart.S
diff --git a/arch/arm/cpu/armv7/uniphier/lowlevel_init.S
b/arch/arm/cpu/armv7/uniphier/lowlevel_init.S
index 0ea12d3..c208ab6 100644
--- a/arch/arm/cpu/armv7/uniphier/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/uniphier/lowlevel_init.S
@@ -26,6 +26,10 @@ ENTRY(lowlevel_init)
orr r0, r0, #(CR_C | CR_M) @ enable MMU and Dcache
mcr p15, 0, r0, c1, c0, 0
+#ifdef CONFIG_DEBUG_LL
+ bl setup_lowlevel_debug
+#endif
+
/*
* Now we are using the page table embedded in the Boot ROM.
* It is not handy since it is not a straight mapped table for sLD3.
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
b/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
index 8794629..0752906 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
+++ b/arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
@@ -5,6 +5,7 @@
obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o
obj-y += boot-mode.o
+obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
obj-$(CONFIG_SOC_INIT) += bcu_init.o sbc_init.o sg_init.o pll_init.o \
clkrst_init.o
obj-$(CONFIG_BOARD_POSTCLK_INIT) += pinctrl.o
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S
b/arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S
new file mode 100644
index 000..c0778a0
--- /dev/null
+++ b/arch/arm/cpu/armv7/uniphier/ph1-ld4/lowlevel_debug.S
@@ -0,0 +1,29 @@
+/*
+ * On-chip UART initializaion for low-level debugging
+ *
+ * Copyright (C) 2014 Panasonic Corporation
+ * Author: Masahiro Yamada
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+
+#define UART_CLK 36864000
+#include
+
+ENTRY(setup_lowlevel_debug)
+ init_debug_uart r0, r1, r2
+
+ /* UART Port 0 */
+ set_pinsel 85, 1, r0, r1
+ set_pinsel 88, 1, r0, r1
+
+ ldr r0, =SG_IECTRL
+ ldr r1, [r0]
+ orr r1, r1, #1
+ str r1, [r0]
+
+ mov pc, lr
+ENDPROC(setup_lowlevel_debug)
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
b/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
index cee7878..8206e2a 100644
--- a/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
+++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
@@ -5,6 +5,7 @@
obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o
obj-y += boot-mode.o
+obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
obj-$(CONFIG_SOC_INIT) += sbc_init.o sg_init.o pll_init.o clkrst_init.o
obj-$(CONFIG_BOARD_POSTCLK_INIT) += pinctrl.o
obj-$(CONFIG_DRAM_INIT) += pll_spectrum.o umc_init.o ddrphy_init.o
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S
b/arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S
new file mode 100644
index 000..a793b7c
--- /dev/null
+++ b/arch/arm/cpu/armv7/uniphier/ph1-pro4/lowlevel_debug.S
@@ -0,0 +1,39 @@
+/*
+ * On-chip UART initializaion for low-level debugging
+ *
+ * Copyright (C) 2014 Panasonic Corporation
+ * Author: Masahiro Yamada
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+#define UART_CLK 73728000
+#include
+
+ENTRY(setup_lowlevel_debug)
+ ldr r0, =SC_CLKCTRL
+ ldr r1, [r0]
+ orr r1, r1, #SC_CLKCTRL_CLK_PERI
+ str r1, [r0]
+
+ init_debug_uart r0, r1, r2
+
+ /* UART Port 0 */
+ set_pinsel 127, 0, r0, r1
+ set_pinsel 128, 0, r0, r1
+
+ ldr r0, =SG_LOADPINCTRL
+ mov
