Re: [U-Boot] [PATCH] ARM: zynq: Add support for SYZYGY Hub board

2017-09-27 Thread Tom McLeod 
Hi Michal,

Thanks for looking at the patch! I'll try to incorporate the changes and
get a new patch out soon.

As far as the device tree Makefile, do you want me to sort it any
particular way or should I just add our board to the end of it? I can see
now it appears as though it might be sorted in a release date order or
something to that effect. I had thought originally that the order wasn't
overly important.

-Tom
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Re: [U-Boot] [PATCH] ARM: zynq: Add support for SYZYGY Hub board

2017-09-26 Thread Michal Simek 
On 12.9.2017 20:05, Tom McLeod wrote:
> Add the Zynq-based SYZYGY Hub board from Opal Kelly. The board
> contains a Xilinx Zynq xc7z012s SoC, 1GB DDR3 RAM, and supports
> booting from SD.
> 
> Signed-off-by: Tom McLeod 
> ---
>  arch/arm/dts/Makefile  |1 +
>  arch/arm/dts/zynq-syzygy-hub.dts   |   72 ++
>  board/opalkelly/zynq/MAINTAINERS   |6 +
>  board/opalkelly/zynq/Makefile  |9 +
>  board/opalkelly/zynq/board.c   |1 +
>  .../opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c  | 1078 
> 
>  .../opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.h  |  103 ++

Can you please look at board/topic/zynq/* and try to minimalize these
ps7_init* files?
At least remove functions related to silicon v1/v2?

+   if (si_ver == PCW_SILICON_VERSION_1) {
+   ps7_mio_init_data = ps7_mio_init_data_1_0;
+   ps7_pll_init_data = ps7_pll_init_data_1_0;
+   ps7_clock_init_data = ps7_clock_init_data_1_0;
+   ps7_ddr_init_data = ps7_ddr_init_data_1_0;
+   ps7_peripherals_init_data = ps7_peripherals_init_data_1_0;
+   } else if (si_ver == PCW_SILICON_VERSION_2) {
+   ps7_mio_init_data = ps7_mio_init_data_2_0;
+   ps7_pll_init_data = ps7_pll_init_data_2_0;
+   ps7_clock_init_data = ps7_clock_init_data_2_0;
+   ps7_ddr_init_data = ps7_ddr_init_data_2_0;
+   ps7_peripherals_init_data = ps7_peripherals_init_data_2_0;
+   } else {





>  configs/syzygy_hub_defconfig   |   57 ++
>  include/configs/syzygy_hub.h   |   72 ++
>  9 files changed, 1399 insertions(+)
>  create mode 100644 arch/arm/dts/zynq-syzygy-hub.dts
>  create mode 100644 board/opalkelly/zynq/MAINTAINERS
>  create mode 100644 board/opalkelly/zynq/Makefile
>  create mode 100644 board/opalkelly/zynq/board.c
>  create mode 100644 board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
>  create mode 100644 board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.h
>  create mode 100644 configs/syzygy_hub_defconfig
>  create mode 100644 include/configs/syzygy_hub.h
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 1d6cee2..c15d94f 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -126,6 +126,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
>   zynq-zc706.dtb \
>   zynq-zed.dtb \
>   zynq-zybo.dtb \
> + zynq-syzygy-hub.dtb \

as I see we should sort it :-)

>   zynq-microzed.dtb \
>   zynq-picozed.dtb \
>   zynq-topic-miami.dtb \
> diff --git a/arch/arm/dts/zynq-syzygy-hub.dts 
> b/arch/arm/dts/zynq-syzygy-hub.dts
> new file mode 100644
> index 000..c98ef01
> --- /dev/null
> +++ b/arch/arm/dts/zynq-syzygy-hub.dts
> @@ -0,0 +1,72 @@
> +/*
> + * SYZYGY Hub DTS
> + *
> + *  Copyright (C) 2011 - 2015 Xilinx
> + *  Copyright (C) 2017 Opal Kelly Inc.
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +/dts-v1/;
> +/include/ "zynq-7000.dtsi"
> +
> +/ {
> + model = "SYZYGY Hub";
> + compatible = "xlnx,zynq-7000";


compatible string should contain also information about your board.
It means you should record your prefix in Linux kernel first and then
use it here.

compatible = "opalkelly,syzygy-hub-vXX", "opalkelly,syzygy-hub",
"xlnx,zynq-7000";

The rest is good.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs




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Re: [U-Boot] [PATCH] ARM: zynq: Add support for SYZYGY Hub board

2017-09-26 Thread Tom McLeod 
Hi Michal,

I wanted to check in and see if you've had a chance to review this patch
yet. Please let me know if you need me to make any changes or if it's good
to go.

Thanks,
-Tom

On Tue, Sep 12, 2017 at 11:05 AM, Tom McLeod 
wrote:

> Add the Zynq-based SYZYGY Hub board from Opal Kelly. The board
> contains a Xilinx Zynq xc7z012s SoC, 1GB DDR3 RAM, and supports
> booting from SD.
>
> Signed-off-by: Tom McLeod 
> ---
>  arch/arm/dts/Makefile  |1 +
>  arch/arm/dts/zynq-syzygy-hub.dts   |   72 ++
>  board/opalkelly/zynq/MAINTAINERS   |6 +
>  board/opalkelly/zynq/Makefile  |9 +
>  board/opalkelly/zynq/board.c   |1 +
>  .../opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c  | 1078
> 
>  .../opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.h  |  103 ++
>  configs/syzygy_hub_defconfig   |   57 ++
>  include/configs/syzygy_hub.h   |   72 ++
>  9 files changed, 1399 insertions(+)
>  create mode 100644 arch/arm/dts/zynq-syzygy-hub.dts
>  create mode 100644 board/opalkelly/zynq/MAINTAINERS
>  create mode 100644 board/opalkelly/zynq/Makefile
>  create mode 100644 board/opalkelly/zynq/board.c
>  create mode 100644 board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
>  create mode 100644 board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.h
>  create mode 100644 configs/syzygy_hub_defconfig
>  create mode 100644 include/configs/syzygy_hub.h
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 1d6cee2..c15d94f 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -126,6 +126,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
> zynq-zc706.dtb \
> zynq-zed.dtb \
> zynq-zybo.dtb \
> +   zynq-syzygy-hub.dtb \
> zynq-microzed.dtb \
> zynq-picozed.dtb \
> zynq-topic-miami.dtb \
> diff --git a/arch/arm/dts/zynq-syzygy-hub.dts b/arch/arm/dts/zynq-syzygy-
> hub.dts
> new file mode 100644
> index 000..c98ef01
> --- /dev/null
> +++ b/arch/arm/dts/zynq-syzygy-hub.dts
> @@ -0,0 +1,72 @@
> +/*
> + * SYZYGY Hub DTS
> + *
> + *  Copyright (C) 2011 - 2015 Xilinx
> + *  Copyright (C) 2017 Opal Kelly Inc.
> + *
> + * SPDX-License-Identifier:GPL-2.0+
> + */
> +/dts-v1/;
> +/include/ "zynq-7000.dtsi"
> +
> +/ {
> +   model = "SYZYGY Hub";
> +   compatible = "xlnx,zynq-7000";
> +
> +   aliases {
> +   ethernet0 = 
> +   serial0 = 
> +   mmc0 = 
> +   };
> +
> +   memory@0 {
> +   device_type = "memory";
> +   reg = <0x0 0x4000>;
> +   };
> +
> +   chosen {
> +   bootargs = "";
> +   stdout-path = "serial0:115200n8";
> +   };
> +
> +   usb_phy0: phy0 {
> +   #phy-cells = <0>;
> +   compatible = "usb-nop-xceiv";
> +   reset-gpios = < 47 1>;
> +   };
> +};
> +
> + {
> +   ps-clk-frequency = <5000>;
> +};
> +
> + {
> +   status = "okay";
> +   phy-mode = "rgmii-id";
> +   phy-handle = <_phy>;
> +
> +   ethernet_phy: ethernet-phy@0 {
> +   reg = <0>;
> +   device_type = "ethernet-phy";
> +   };
> +};
> +
> + {
> +   status = "okay";
> +};
> +
> + {
> +   u-boot,dm-pre-reloc;
> +   status = "okay";
> +};
> +
> + {
> +   u-boot,dm-pre-reloc;
> +   status = "okay";
> +};
> +
> + {
> +   status = "okay";
> +   dr_mode = "otg";
> +   usb-phy = <_phy0>;
> +};
> diff --git a/board/opalkelly/zynq/MAINTAINERS b/board/opalkelly/zynq/
> MAINTAINERS
> new file mode 100644
> index 000..df4b9b6
> --- /dev/null
> +++ b/board/opalkelly/zynq/MAINTAINERS
> @@ -0,0 +1,6 @@
> +ZYNQ BOARD
> +M: Tom McLeod 
> +S: Maintained
> +F: board/opalkelly/zynq/
> +F: include/configs/syzygy_hub.h
> +F: configs/syzygy_hub_defconfig
> diff --git a/board/opalkelly/zynq/Makefile b/board/opalkelly/zynq/Makefile
> new file mode 100644
> index 000..09fc788
> --- /dev/null
> +++ b/board/opalkelly/zynq/Makefile
> @@ -0,0 +1,9 @@
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +obj-y  := board.o
> +
> +hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE))
> +
> +obj-$(CONFIG_SPL_BUILD) += $(hw-platform-y)/ps7_init_gpl.o
> diff --git a/board/opalkelly/zynq/board.c b/board/opalkelly/zynq/board.c
> new file mode 100644
> index 000..a95c9d1
> --- /dev/null
> +++ b/board/opalkelly/zynq/board.c
> @@ -0,0 +1 @@
> +#include "../../xilinx/zynq/board.c"
> diff --git a/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
> b/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
> new file mode 100644
> index 000..2b111d0
> --- /dev/null
> +++ b/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
> @@ -0,0 +1,1078 @@
>

[U-Boot] [PATCH] ARM: zynq: Add support for SYZYGY Hub board

2017-09-12 Thread Tom McLeod 
Add the Zynq-based SYZYGY Hub board from Opal Kelly. The board
contains a Xilinx Zynq xc7z012s SoC, 1GB DDR3 RAM, and supports
booting from SD.

Signed-off-by: Tom McLeod 
---
 arch/arm/dts/Makefile  |1 +
 arch/arm/dts/zynq-syzygy-hub.dts   |   72 ++
 board/opalkelly/zynq/MAINTAINERS   |6 +
 board/opalkelly/zynq/Makefile  |9 +
 board/opalkelly/zynq/board.c   |1 +
 .../opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c  | 1078 
 .../opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.h  |  103 ++
 configs/syzygy_hub_defconfig   |   57 ++
 include/configs/syzygy_hub.h   |   72 ++
 9 files changed, 1399 insertions(+)
 create mode 100644 arch/arm/dts/zynq-syzygy-hub.dts
 create mode 100644 board/opalkelly/zynq/MAINTAINERS
 create mode 100644 board/opalkelly/zynq/Makefile
 create mode 100644 board/opalkelly/zynq/board.c
 create mode 100644 board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
 create mode 100644 board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.h
 create mode 100644 configs/syzygy_hub_defconfig
 create mode 100644 include/configs/syzygy_hub.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 1d6cee2..c15d94f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -126,6 +126,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
zynq-zc706.dtb \
zynq-zed.dtb \
zynq-zybo.dtb \
+   zynq-syzygy-hub.dtb \
zynq-microzed.dtb \
zynq-picozed.dtb \
zynq-topic-miami.dtb \
diff --git a/arch/arm/dts/zynq-syzygy-hub.dts b/arch/arm/dts/zynq-syzygy-hub.dts
new file mode 100644
index 000..c98ef01
--- /dev/null
+++ b/arch/arm/dts/zynq-syzygy-hub.dts
@@ -0,0 +1,72 @@
+/*
+ * SYZYGY Hub DTS
+ *
+ *  Copyright (C) 2011 - 2015 Xilinx
+ *  Copyright (C) 2017 Opal Kelly Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+
+/ {
+   model = "SYZYGY Hub";
+   compatible = "xlnx,zynq-7000";
+
+   aliases {
+   ethernet0 = 
+   serial0 = 
+   mmc0 = 
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x4000>;
+   };
+
+   chosen {
+   bootargs = "";
+   stdout-path = "serial0:115200n8";
+   };
+
+   usb_phy0: phy0 {
+   #phy-cells = <0>;
+   compatible = "usb-nop-xceiv";
+   reset-gpios = < 47 1>;
+   };
+};
+
+ {
+   ps-clk-frequency = <5000>;
+};
+
+ {
+   status = "okay";
+   phy-mode = "rgmii-id";
+   phy-handle = <_phy>;
+
+   ethernet_phy: ethernet-phy@0 {
+   reg = <0>;
+   device_type = "ethernet-phy";
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   status = "okay";
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   dr_mode = "otg";
+   usb-phy = <_phy0>;
+};
diff --git a/board/opalkelly/zynq/MAINTAINERS b/board/opalkelly/zynq/MAINTAINERS
new file mode 100644
index 000..df4b9b6
--- /dev/null
+++ b/board/opalkelly/zynq/MAINTAINERS
@@ -0,0 +1,6 @@
+ZYNQ BOARD
+M: Tom McLeod 
+S: Maintained
+F: board/opalkelly/zynq/
+F: include/configs/syzygy_hub.h
+F: configs/syzygy_hub_defconfig
diff --git a/board/opalkelly/zynq/Makefile b/board/opalkelly/zynq/Makefile
new file mode 100644
index 000..09fc788
--- /dev/null
+++ b/board/opalkelly/zynq/Makefile
@@ -0,0 +1,9 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  := board.o
+
+hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE))
+
+obj-$(CONFIG_SPL_BUILD) += $(hw-platform-y)/ps7_init_gpl.o
diff --git a/board/opalkelly/zynq/board.c b/board/opalkelly/zynq/board.c
new file mode 100644
index 000..a95c9d1
--- /dev/null
+++ b/board/opalkelly/zynq/board.c
@@ -0,0 +1 @@
+#include "../../xilinx/zynq/board.c"
diff --git a/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c 
b/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
new file mode 100644
index 000..2b111d0
--- /dev/null
+++ b/board/opalkelly/zynq/zynq-syzygy-hub/ps7_init_gpl.c
@@ -0,0 +1,1078 @@
+/**
+* (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
+*
+*
+* SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include "ps7_init_gpl.h"
+
+unsigned long ps7_pll_init_data_3_0[] = {
+   EMIT_WRITE(0XF808, 0xDF0DU),
+   EMIT_MASKWRITE(0XF8000110, 0x0030U, 0x001772C0U),
+   EMIT_MASKWRITE(0XF8000100, 0x0007F000U, 0x0001A000U),
+   EMIT_MASKWRITE(0XF8000100, 0x0010U, 0x0010U),
+   EMIT_MASKWRITE(0XF8000100, 0x0001U, 0x0001U),
+