Re: [U-Boot] [PATCH] EXYNOS: SPL: Add a custom spi copy function

2013-05-11 Thread Simon Glass
Hi Rajeshwari,

On Wed, Mar 27, 2013 at 4:28 AM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
 This CL implements a custom spi_copy funtion to copy u-boot from SF to
 RAM. This is faster then iROM spi_copy funtion as this runs spi at 50Mhz
 and also in WORD mode of operation.

 Changed a printf in pimux.c to debug just to avoid the the compilation
 error in SPL.
 Removed the enum for boot mode from spl_boot.c as it was already define in 
 spl.h

 Signed-off-by: Alim Akhtar alim.akh...@samsung.com
 Signed-off-by: Tom Wai-Hong Tam waih...@chromium.org
 Signe-off-by: Rajeshwari Shinde rajeshwar...@samsung.com

This now conflicts with the MMC series. I have an updated patch so
will post it as a v2 to this one. That way the MMC patches can be
applied first, then all your SPI patches.

Regards,
Simon
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[U-Boot] [PATCH] EXYNOS: SPL: Add a custom spi copy function

2013-03-27 Thread Rajeshwari Shinde
This CL implements a custom spi_copy funtion to copy u-boot from SF to
RAM. This is faster then iROM spi_copy funtion as this runs spi at 50Mhz
and also in WORD mode of operation.

Changed a printf in pimux.c to debug just to avoid the the compilation
error in SPL.
Removed the enum for boot mode from spl_boot.c as it was already define in spl.h

Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Tom Wai-Hong Tam waih...@chromium.org
Signe-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
 arch/arm/cpu/armv7/exynos/pinmux.c |2 +-
 arch/arm/include/asm/arch-exynos/spi.h |2 +
 board/samsung/smdk5250/spl_boot.c  |  126 +---
 include/configs/exynos5250-dt.h|3 +
 spl/Makefile   |4 +
 5 files changed, 124 insertions(+), 13 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c 
b/arch/arm/cpu/armv7/exynos/pinmux.c
index 1e7d14c..445f6fa 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -399,7 +399,7 @@ static int exynos4_pinmux_config(int peripheral, int flags)
case PERIPH_ID_SDMMC1:
case PERIPH_ID_SDMMC3:
case PERIPH_ID_SDMMC4:
-   printf(SDMMC device %d not implemented\n, peripheral);
+   debug(SDMMC device %d not implemented\n, peripheral);
return -1;
default:
debug(%s: invalid peripheral %d, __func__, peripheral);
diff --git a/arch/arm/include/asm/arch-exynos/spi.h 
b/arch/arm/include/asm/arch-exynos/spi.h
index e67ad27..3430ac1 100644
--- a/arch/arm/include/asm/arch-exynos/spi.h
+++ b/arch/arm/include/asm/arch-exynos/spi.h
@@ -43,6 +43,8 @@ struct exynos_spi {
 
 #define SPI_TIMEOUT_MS 10
 
+#define SF_READ_DATA_CMD   0x3
+
 /* SPI_CHCFG */
 #define SPI_CH_HS_EN   (1  6)
 #define SPI_CH_RST (1  5)
diff --git a/board/samsung/smdk5250/spl_boot.c 
b/board/samsung/smdk5250/spl_boot.c
index d8f3c1e..9e99512 100644
--- a/board/samsung/smdk5250/spl_boot.c
+++ b/board/samsung/smdk5250/spl_boot.c
@@ -22,16 +22,119 @@
 
 #includecommon.h
 #includeconfig.h
+#include spi.h
+#include asm/arch/clk.h
+#include asm/arch/spi.h
+#include asm/arch/pinmux.h
+#include asm/arch/periph.h
+#include asm/arch/spl.h
 
-enum boot_mode {
-   BOOT_MODE_MMC = 4,
-   BOOT_MODE_SERIAL = 20,
-   /* Boot based on Operating Mode pin settings */
-   BOOT_MODE_OM = 32,
-   BOOT_MODE_USB,  /* Boot using USB download */
-};
+static void spi_rx_tx(struct exynos_spi *regs, int todo,
+   void *dinp, void const *doutp, int i)
+{
+   uint *rxp = (uint *)(dinp + (i * (32 * 1024)));
+   int rx_lvl, tx_lvl;
+   uint out_bytes, in_bytes;
+
+   out_bytes = in_bytes = todo;
+   setbits_le32(regs-ch_cfg, SPI_CH_RST);
+   clrbits_le32(regs-ch_cfg, SPI_CH_RST);
+   writel(((todo * 8) / 32) | SPI_PACKET_CNT_EN, regs-pkt_cnt);
+
+   while (in_bytes) {
+   uint32_t spi_sts;
+   int temp;
+
+   spi_sts = readl(regs-spi_sts);
+   rx_lvl = ((spi_sts  15)  0x7f);
+   tx_lvl = ((spi_sts  6)  0x7f);
+   while (tx_lvl  32  out_bytes) {
+   temp = 0x;
+   writel(temp, regs-tx_data);
+   out_bytes -= 4;
+   tx_lvl += 4;
+   }
+   while (rx_lvl = 4  in_bytes) {
+   temp = readl(regs-rx_data);
+   if (rxp)
+   *rxp++ = temp;
+   in_bytes -= 4;
+   rx_lvl -= 4;
+   }
+   }
+}
+
+/**
+ * Copy uboot from spi flash to RAM
+ *
+ * @parma uboot_size   size of u-boot to copy
+ * @param uboot_addr   address of u-boot to copy
+ */
+static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr)
+{
+   int upto, todo;
+   int i;
+   struct exynos_spi *regs = (struct exynos_spi *)CONFIG_ENV_SPI_BASE;
+
+   set_spi_clk(PERIPH_ID_SPI1, 5000); /* set spi clock to 50Mhz */
+   /* set the spi1 GPIO */
+   exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE);
+
+   /* set pktcnt and enable it */
+   writel(4 | SPI_PACKET_CNT_EN, regs-pkt_cnt);
+   /* set FB_CLK_SEL */
+   writel(SPI_FB_DELAY_180, regs-fb_clk);
+   /* set CH_WIDTH and BUS_WIDTH as word */
+   setbits_le32(regs-mode_cfg, SPI_MODE_CH_WIDTH_WORD |
+   SPI_MODE_BUS_WIDTH_WORD);
+   clrbits_le32(regs-ch_cfg, SPI_CH_CPOL_L); /* CPOL: active high */
+
+   /* clear rx and tx channel if set priveously */
+   clrbits_le32(regs-ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON);
 
-   typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst);
+   setbits_le32(regs-swap_cfg, SPI_RX_SWAP_EN |
+   SPI_RX_BYTE_SWAP |
+   SPI_RX_HWORD_SWAP);
+
+   /* do a