Re: [U-Boot] [PATCH] arm: dra7xx: Assign omap_vcores based on board type

2016-06-12 Thread Keerthy 

Hi Tom,

On Tuesday 07 June 2016 04:05 PM, Keerthy wrote:

Currently omap_vcores which holds pmic data is being assigned based
on the SoC type. PMIC is not a part of SoC. It is logical to
to assign omap_vcores based on board type. Hence over ride the
vcores_init function and assign omap_vcores based on the board type.



If there are no comments on this one. Can you please pull this patch?



Reported-by: Nishanth Menon 
Signed-off-by: Keerthy 
---

Boot tested on both dra7-evm and dra72-evm.

  arch/arm/cpu/armv7/omap5/hw_data.c | 78 
  board/ti/dra7xx/evm.c  | 91 ++
  2 files changed, 91 insertions(+), 78 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c 
b/arch/arm/cpu/armv7/omap5/hw_data.c
index a517b13..65f43d6 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -364,82 +364,6 @@ struct vcores_data omap5430_volts_es2 = {
.mm.abb_tx_done_mask = OMAP_ABB_MM_TXDONE_MASK,
  };

-struct vcores_data dra752_volts = {
-   .mpu.value  = VDD_MPU_DRA7,
-   .mpu.efuse.reg  = STD_FUSE_OPP_VMIN_MPU,
-   .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .mpu.addr   = TPS659038_REG_ADDR_SMPS12,
-   .mpu.pmic   = ,
-   .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
-
-   .eve.value  = VDD_EVE_DRA7,
-   .eve.efuse.reg  = STD_FUSE_OPP_VMIN_DSPEVE,
-   .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .eve.addr   = TPS659038_REG_ADDR_SMPS45,
-   .eve.pmic   = ,
-   .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
-
-   .gpu.value  = VDD_GPU_DRA7,
-   .gpu.efuse.reg  = STD_FUSE_OPP_VMIN_GPU,
-   .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .gpu.addr   = TPS659038_REG_ADDR_SMPS6,
-   .gpu.pmic   = ,
-   .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK,
-
-   .core.value = VDD_CORE_DRA7,
-   .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE,
-   .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .core.addr  = TPS659038_REG_ADDR_SMPS7,
-   .core.pmic  = ,
-
-   .iva.value  = VDD_IVA_DRA7,
-   .iva.efuse.reg  = STD_FUSE_OPP_VMIN_IVA,
-   .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .iva.addr   = TPS659038_REG_ADDR_SMPS8,
-   .iva.pmic   = ,
-   .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
-};
-
-struct vcores_data dra722_volts = {
-   .mpu.value  = VDD_MPU_DRA7,
-   .mpu.efuse.reg  = STD_FUSE_OPP_VMIN_MPU,
-   .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .mpu.addr   = TPS65917_REG_ADDR_SMPS1,
-   .mpu.pmic   = ,
-   .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
-
-   .core.value = VDD_CORE_DRA7,
-   .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE,
-   .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .core.addr  = TPS65917_REG_ADDR_SMPS2,
-   .core.pmic  = ,
-
-   /*
-* The DSPEVE, GPU and IVA rails are usually grouped on DRA72x
-* designs and powered by TPS65917 SMPS3, as on the J6Eco EVM.
-*/
-   .gpu.value  = VDD_GPU_DRA7,
-   .gpu.efuse.reg  = STD_FUSE_OPP_VMIN_GPU,
-   .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .gpu.addr   = TPS65917_REG_ADDR_SMPS3,
-   .gpu.pmic   = ,
-   .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK,
-
-   .eve.value  = VDD_EVE_DRA7,
-   .eve.efuse.reg  = STD_FUSE_OPP_VMIN_DSPEVE,
-   .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .eve.addr   = TPS65917_REG_ADDR_SMPS3,
-   .eve.pmic   = ,
-   .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
-
-   .iva.value  = VDD_IVA_DRA7,
-   .iva.efuse.reg  = STD_FUSE_OPP_VMIN_IVA,
-   .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .iva.addr   = TPS65917_REG_ADDR_SMPS3,
-   .iva.pmic   = ,
-   .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
-};
-
  /*
   * Enable essential clock domains, modules and
   * do some additional special settings needed
@@ -804,7 +728,6 @@ void __weak hw_data_init(void)
case DRA752_ES2_0:
*prcm = _prcm;
*dplls_data = _dplls;
-   *omap_vcores = _volts;
*ctrl = _ctrl;
break;

@@ -812,7 +735,6 @@ void __weak hw_data_init(void)
case DRA722_ES2_0:
*prcm = _prcm;
*dplls_data = _dplls;
-   *omap_vcores = _volts;
*ctrl = _ctrl;
break;

diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 8c916a3..c5f7190 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -310,6 +310,82 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs 
**dmm_lisa_regs)
}
  }

+struct vcores_data dra752_volts = {
+   .mpu.value  = VDD_MPU_DRA7,
+   .mpu.efuse.reg  = STD_FUSE_OPP_VMIN_MPU,
+   .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+   .mpu.addr   =

[U-Boot] [PATCH] arm: dra7xx: Assign omap_vcores based on board type

2016-06-08 Thread Keerthy 
Currently omap_vcores which holds pmic data is being assigned based
on the SoC type. PMIC is not a part of SoC. It is logical to
to assign omap_vcores based on board type. Hence over ride the
vcores_init function and assign omap_vcores based on the board type.

Reported-by: Nishanth Menon 
Signed-off-by: Keerthy 
---

Boot tested on both dra7-evm and dra72-evm.

 arch/arm/cpu/armv7/omap5/hw_data.c | 78 
 board/ti/dra7xx/evm.c  | 91 ++
 2 files changed, 91 insertions(+), 78 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c 
b/arch/arm/cpu/armv7/omap5/hw_data.c
index a517b13..65f43d6 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -364,82 +364,6 @@ struct vcores_data omap5430_volts_es2 = {
.mm.abb_tx_done_mask = OMAP_ABB_MM_TXDONE_MASK,
 };
 
-struct vcores_data dra752_volts = {
-   .mpu.value  = VDD_MPU_DRA7,
-   .mpu.efuse.reg  = STD_FUSE_OPP_VMIN_MPU,
-   .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .mpu.addr   = TPS659038_REG_ADDR_SMPS12,
-   .mpu.pmic   = ,
-   .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
-
-   .eve.value  = VDD_EVE_DRA7,
-   .eve.efuse.reg  = STD_FUSE_OPP_VMIN_DSPEVE,
-   .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .eve.addr   = TPS659038_REG_ADDR_SMPS45,
-   .eve.pmic   = ,
-   .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
-
-   .gpu.value  = VDD_GPU_DRA7,
-   .gpu.efuse.reg  = STD_FUSE_OPP_VMIN_GPU,
-   .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .gpu.addr   = TPS659038_REG_ADDR_SMPS6,
-   .gpu.pmic   = ,
-   .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK,
-
-   .core.value = VDD_CORE_DRA7,
-   .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE,
-   .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .core.addr  = TPS659038_REG_ADDR_SMPS7,
-   .core.pmic  = ,
-
-   .iva.value  = VDD_IVA_DRA7,
-   .iva.efuse.reg  = STD_FUSE_OPP_VMIN_IVA,
-   .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .iva.addr   = TPS659038_REG_ADDR_SMPS8,
-   .iva.pmic   = ,
-   .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
-};
-
-struct vcores_data dra722_volts = {
-   .mpu.value  = VDD_MPU_DRA7,
-   .mpu.efuse.reg  = STD_FUSE_OPP_VMIN_MPU,
-   .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .mpu.addr   = TPS65917_REG_ADDR_SMPS1,
-   .mpu.pmic   = ,
-   .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
-
-   .core.value = VDD_CORE_DRA7,
-   .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE,
-   .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .core.addr  = TPS65917_REG_ADDR_SMPS2,
-   .core.pmic  = ,
-
-   /*
-* The DSPEVE, GPU and IVA rails are usually grouped on DRA72x
-* designs and powered by TPS65917 SMPS3, as on the J6Eco EVM.
-*/
-   .gpu.value  = VDD_GPU_DRA7,
-   .gpu.efuse.reg  = STD_FUSE_OPP_VMIN_GPU,
-   .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .gpu.addr   = TPS65917_REG_ADDR_SMPS3,
-   .gpu.pmic   = ,
-   .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK,
-
-   .eve.value  = VDD_EVE_DRA7,
-   .eve.efuse.reg  = STD_FUSE_OPP_VMIN_DSPEVE,
-   .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .eve.addr   = TPS65917_REG_ADDR_SMPS3,
-   .eve.pmic   = ,
-   .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
-
-   .iva.value  = VDD_IVA_DRA7,
-   .iva.efuse.reg  = STD_FUSE_OPP_VMIN_IVA,
-   .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
-   .iva.addr   = TPS65917_REG_ADDR_SMPS3,
-   .iva.pmic   = ,
-   .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
-};
-
 /*
  * Enable essential clock domains, modules and
  * do some additional special settings needed
@@ -804,7 +728,6 @@ void __weak hw_data_init(void)
case DRA752_ES2_0:
*prcm = _prcm;
*dplls_data = _dplls;
-   *omap_vcores = _volts;
*ctrl = _ctrl;
break;
 
@@ -812,7 +735,6 @@ void __weak hw_data_init(void)
case DRA722_ES2_0:
*prcm = _prcm;
*dplls_data = _dplls;
-   *omap_vcores = _volts;
*ctrl = _ctrl;
break;
 
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 8c916a3..c5f7190 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -310,6 +310,82 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs 
**dmm_lisa_regs)
}
 }
 
+struct vcores_data dra752_volts = {
+   .mpu.value  = VDD_MPU_DRA7,
+   .mpu.efuse.reg  = STD_FUSE_OPP_VMIN_MPU,
+   .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+   .mpu.addr   = TPS659038_REG_ADDR_SMPS12,
+   .mpu.pmic   = ,
+   .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
+
+   .eve.value  =