Re: [U-Boot] [PATCH] imx: fix CAAM base for i.MX6UL

[Stefano Babic]

On 11/01/2018 15:14, Anatolij Gustschin wrote:
> HW accelerated "hash sha256 ..." command doesn't work on i.MX6UL, we get
> "CAAM was not setup properly or it is faulty" error message.
> 
> This is due to wrong CAAM base 0x0210, on i.MX6UL the CAAM base
> address is 0x0214. Fix it.
> 
> Note: with this patch applied the "hash sha256" commant still has some
> issues on i.MX6UL ("Invalid KEY Command" or other errors). With data
> cache off the "hash sha256" command works as expected.
> 
> Signed-off-by: Anatolij Gustschin 
> ---
>  arch/arm/include/asm/arch-mx6/imx-regs.h | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h 
> b/arch/arm/include/asm/arch-mx6/imx-regs.h
> index 48ce0edd06..6cab049648 100644
> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
> @@ -232,7 +232,11 @@
>  #define AIPS2_OFF_BASE_ADDR (ATZ2_BASE_ADDR + 0x8)
>  #define AIPS3_ON_BASE_ADDR  (ATZ3_BASE_ADDR + 0x7C000)
>  #define AIPS3_OFF_BASE_ADDR (ATZ3_BASE_ADDR + 0x8)
> +#if defined(CONFIG_MX6UL)
> +#define CAAM_BASE_ADDR  (ATZ2_BASE_ADDR + 0x4)
> +#else
>  #define CAAM_BASE_ADDR  (ATZ2_BASE_ADDR)
> +#endif
>  #define ARM_BASE_ADDR(ATZ2_BASE_ADDR + 0x4)
>  
>  #define CONFIG_SYS_FSL_SEC_OFFSET   0
> 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] [PATCH] imx: fix CAAM base for i.MX6UL

[Breno Matheus Lima]

Hi Anatolij,

2018-01-11 12:54 GMT-02:00 Fabio Estevam :
> Hi Anatolij,
>
> Thanks for the fix.
>
> On Thu, Jan 11, 2018 at 12:14 PM, Anatolij Gustschin  wrote:
>> HW accelerated "hash sha256 ..." command doesn't work on i.MX6UL, we get
>> "CAAM was not setup properly or it is faulty" error message.
>>
>> This is due to wrong CAAM base 0x0210, on i.MX6UL the CAAM base
>> address is 0x0214. Fix it.
>>
>> Note: with this patch applied the "hash sha256" commant still has some
>> issues on i.MX6UL ("Invalid KEY Command" or other errors). With data
>> cache off the "hash sha256" command works as expected.
>
> Breno, could you please take a look at this issue when possible ?

I managed to reproduce this issue on a mx6sabreauto, with data cache
off the "hash sha256" command works as expected.

I will take a look on this issue and let you know any progress.

Thanks,
Breno Lima
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Re: [U-Boot] [PATCH] imx: fix CAAM base for i.MX6UL

[Fabio Estevam]

Hi Anatolij,

Thanks for the fix.

On Thu, Jan 11, 2018 at 12:14 PM, Anatolij Gustschin  wrote:
> HW accelerated "hash sha256 ..." command doesn't work on i.MX6UL, we get
> "CAAM was not setup properly or it is faulty" error message.
>
> This is due to wrong CAAM base 0x0210, on i.MX6UL the CAAM base
> address is 0x0214. Fix it.
>
> Note: with this patch applied the "hash sha256" commant still has some
> issues on i.MX6UL ("Invalid KEY Command" or other errors). With data
> cache off the "hash sha256" command works as expected.

Breno, could you please take a look at this issue when possible ?

> Signed-off-by: Anatolij Gustschin 

Reviewed-by: Fabio Estevam 
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[U-Boot] [PATCH] imx: fix CAAM base for i.MX6UL

[Anatolij Gustschin]

HW accelerated "hash sha256 ..." command doesn't work on i.MX6UL, we get
"CAAM was not setup properly or it is faulty" error message.

This is due to wrong CAAM base 0x0210, on i.MX6UL the CAAM base
address is 0x0214. Fix it.

Note: with this patch applied the "hash sha256" commant still has some
issues on i.MX6UL ("Invalid KEY Command" or other errors). With data
cache off the "hash sha256" command works as expected.

Signed-off-by: Anatolij Gustschin 
---
 arch/arm/include/asm/arch-mx6/imx-regs.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h 
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 48ce0edd06..6cab049648 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -232,7 +232,11 @@
 #define AIPS2_OFF_BASE_ADDR (ATZ2_BASE_ADDR + 0x8)
 #define AIPS3_ON_BASE_ADDR  (ATZ3_BASE_ADDR + 0x7C000)
 #define AIPS3_OFF_BASE_ADDR (ATZ3_BASE_ADDR + 0x8)
+#if defined(CONFIG_MX6UL)
+#define CAAM_BASE_ADDR  (ATZ2_BASE_ADDR + 0x4)
+#else
 #define CAAM_BASE_ADDR  (ATZ2_BASE_ADDR)
+#endif
 #define ARM_BASE_ADDR  (ATZ2_BASE_ADDR + 0x4)
 
 #define CONFIG_SYS_FSL_SEC_OFFSET   0
-- 
2.11.0

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