Re: [U-Boot] [PATCH] mpc83xx: Size optimization of start.S

2009-01-22 Thread Kim Phillips
On Thu, 22 Jan 2009 10:00:56 -0800 (PST)
Ron Madrid ron_mad...@sbcglobal.net wrote:

 Since my new board patch is dependent on this being applied is it possible to 
 now resubmit my new board patch?

I thought you'd never ask :)

please base it on u-boot-mpc83xx next.

Kim
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Re: [U-Boot] [PATCH] mpc83xx: Size optimization of start.S

2009-01-22 Thread Ron Madrid
Should this go to the main u-boot mail list or should I send it somewhere else?

Ron


--- On Thu, 1/22/09, Kim Phillips kim.phill...@freescale.com wrote:

 From: Kim Phillips kim.phill...@freescale.com
 Subject: Re: [U-Boot] [PATCH] mpc83xx: Size optimization of start.S
 To: ron_mad...@sbcglobal.net
 Cc: u-boot@lists.denx.de
 Date: Thursday, January 22, 2009, 10:37 AM
 On Thu, 22 Jan 2009 10:00:56 -0800 (PST)
 Ron Madrid ron_mad...@sbcglobal.net wrote:
 
  Since my new board patch is dependent on this being
 applied is it possible to now resubmit my new board patch?
 
 I thought you'd never ask :)
 
 please base it on u-boot-mpc83xx next.
 
 Kim
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Re: [U-Boot] [PATCH] mpc83xx: Size optimization of start.S

2009-01-21 Thread Kim Phillips
On Fri, 12 Dec 2008 13:12:45 -0800
Ron Madrid ron_mad...@sbcglobal.net wrote:

 Currently there are in excess of 100 bytes located at the beginning of the 
 image
 built by start.S that are not being utilized.  This patch moves a few 
 functions
 into this part of the image.  This will create a greater number of *available*
 bytes that can be used by board specific code in NAND builds and will decrease
 the size of the assembled code in other builds.
 
 Signed-off-by: Ron Madrid ron_mad...@sbcglobal.net
 ---

applied to u-boot-mpc83xx next.

Thanks, and sorry for the delay,

Kim
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Re: [U-Boot] [PATCH] mpc83xx: Size optimization of start.S

2009-01-12 Thread Ron Madrid
I haven't received any communication about this patch in a while.
Is is still being looked at or did it slip through the cracks?
Or did I miss an email?

Let me know.

Ron


--- On Fri, 12/12/08, Ron Madrid ron_mad...@sbcglobal.net wrote:

 From: Ron Madrid ron_mad...@sbcglobal.net
 Subject: [PATCH] mpc83xx: Size optimization of start.S
 To: u-boot@lists.denx.de
 Cc: Ron Madrid ron_mad...@sbcglobal.net
 Date: Friday, December 12, 2008, 1:12 PM
 Currently there are in excess of 100 bytes located at the
 beginning of the image
 built by start.S that are not being utilized.  This patch
 moves a few functions
 into this part of the image.  This will create a greater
 number of *available*
 bytes that can be used by board specific code in NAND
 builds and will decrease
 the size of the assembled code in other builds.
 
 Signed-off-by: Ron Madrid ron_mad...@sbcglobal.net
 ---
  cpu/mpc83xx/start.S |   77
 ++-
  1 files changed, 39 insertions(+), 38 deletions(-)
 
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Re: [U-Boot] [PATCH] mpc83xx: Size optimization of start.S

2008-12-15 Thread Scott Wood
On Mon, Dec 15, 2008 at 08:26:03AM +0100, Jens Gehrlein wrote:
 Hi Ron,
 
 Ron Madrid schrieb:
  Currently there are in excess of 100 bytes located at the beginning of the 
  image
  built by start.S that are not being utilized.
 
 Hmmm, are you sure? What if someone designs a board, where the processor
 shall load its reset configuration from a local bus EEPROM, e.g. the
 same NOR-Flash containing the U-Boot image (CFG_RESET_SOURCE[0:2] =
 000b?
 
 Or did I misunderstand something?

That's covered by the _HRCW_TABLE_ENTRY lines earlier in the file.

-Scott
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Re: [U-Boot] [PATCH] mpc83xx: Size optimization of start.S

2008-12-15 Thread Jens Gehrlein
Hi Scott,

Scott Wood schrieb:
 On Mon, Dec 15, 2008 at 08:26:03AM +0100, Jens Gehrlein wrote:
 Hi Ron,

 Ron Madrid schrieb:
 Currently there are in excess of 100 bytes located at the beginning of the 
 image
 built by start.S that are not being utilized.
 Hmmm, are you sure? What if someone designs a board, where the processor
 shall load its reset configuration from a local bus EEPROM, e.g. the
 same NOR-Flash containing the U-Boot image (CFG_RESET_SOURCE[0:2] =
 000b?

 Or did I misunderstand something?
 
 That's covered by the _HRCW_TABLE_ENTRY lines earlier in the file.

I see. I understood Ron's comment as first 100 hex bytes.
Thanks for the hint, Scott.

Kind regards,
Jens
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Re: [U-Boot] [PATCH] mpc83xx: Size optimization of start.S

2008-12-14 Thread Jens Gehrlein
Hi Ron,

Ron Madrid schrieb:
 Currently there are in excess of 100 bytes located at the beginning of the 
 image
 built by start.S that are not being utilized.

Hmmm, are you sure? What if someone designs a board, where the processor
shall load its reset configuration from a local bus EEPROM, e.g. the
same NOR-Flash containing the U-Boot image (CFG_RESET_SOURCE[0:2] =
000b?

Or did I misunderstand something?

Kind regards,
Jens
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[U-Boot] [PATCH] mpc83xx: Size optimization of start.S

2008-12-12 Thread Ron Madrid
Currently there are in excess of 100 bytes located at the beginning of the image
built by start.S that are not being utilized.  This patch moves a few functions
into this part of the image.  This will create a greater number of *available*
bytes that can be used by board specific code in NAND builds and will decrease
the size of the assembled code in other builds.

Signed-off-by: Ron Madrid ron_mad...@sbcglobal.net
---
 cpu/mpc83xx/start.S |   77 ++-
 1 files changed, 39 insertions(+), 38 deletions(-)

diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S
index cd566b2..b040e3b 100644
--- a/cpu/mpc83xx/start.S
+++ b/cpu/mpc83xx/start.S
@@ -108,6 +108,45 @@ version_string:
.ascii  (, __DATE__,  - , __TIME__, )
.ascii  , CONFIG_IDENT_STRING, \0
 
+   .align 2
+
+   .globl enable_addr_trans
+enable_addr_trans:
+   /* enable address translation */
+   mfmsr   r5
+   ori r5, r5, (MSR_IR | MSR_DR)
+   mtmsr   r5
+   isync
+   blr
+
+   .globl disable_addr_trans
+disable_addr_trans:
+   /* disable address translation */
+   mflrr4
+   mfmsr   r3
+   andi.   r0, r3, (MSR_IR | MSR_DR)
+   beqlr
+   andcr3, r3, r0
+   mtspr   SRR0, r4
+   mtspr   SRR1, r3
+   rfi
+
+   .globl get_pvr
+get_pvr:
+   mfspr   r3, PVR
+   blr
+
+   .globl  ppcDWstore
+ppcDWstore:
+   lfd 1, 0(r4)
+   stfd1, 0(r3)
+   blr
+
+   .globl  ppcDWload
+ppcDWload:
+   lfd 1, 0(r3)
+   stfd1, 0(r4)
+   blr
 
 #ifndef CONFIG_DEFAULT_IMMR
 #error CONFIG_DEFAULT_IMMR must be defined
@@ -697,27 +736,6 @@ setup_bats:
 
blr
 
-   .globl enable_addr_trans
-enable_addr_trans:
-   /* enable address translation */
-   mfmsr   r5
-   ori r5, r5, (MSR_IR | MSR_DR)
-   mtmsr   r5
-   isync
-   blr
-
-   .globl disable_addr_trans
-disable_addr_trans:
-   /* disable address translation */
-   mflrr4
-   mfmsr   r3
-   andi.   r0, r3, (MSR_IR | MSR_DR)
-   beqlr
-   andcr3, r3, r0
-   mtspr   SRR0, r4
-   mtspr   SRR1, r3
-   rfi
-
 /* Cache functions.
  *
  * Note: requires that all cache bits in
@@ -795,23 +813,6 @@ flush_dcache:
b   1b
 2: blr
 
-   .globl get_pvr
-get_pvr:
-   mfspr   r3, PVR
-   blr
-
-   .globl  ppcDWstore
-ppcDWstore:
-   lfd 1, 0(r4)
-   stfd1, 0(r3)
-   blr
-
-   .globl  ppcDWload
-ppcDWload:
-   lfd 1, 0(r3)
-   stfd1, 0(r4)
-   blr
-
 /*---*/
 
 /*
-- 
1.5.5.1

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