Re: [U-Boot] [PATCH] mpc8xxx: Fix DRAM message formatting

[Wolfgang Denk]

Dear Kyle Moffett,

In message 1324001689-15226-1-git-send-email-kyle.d.moff...@boeing.com you 
wrote:
 When the Detected RDIMM [...] message was added, it broke the
 pretty-printing of the DRAM information during boot.
 
 It used to look like this:
   DRAM:  2 GiB (DDR2, 64-bit, CL=4, ECC on)
  DDR Chip-Select Interleaving Mode: CS0+CS1
 
 Right now, it looks like this:
   DRAM:  Detected RDIMM VL493T5663D-E6M
   2 GiB (DDR2, 64-bit, CL=4, ECC on)
  DDR Chip-Select Interleaving Mode: CS0+CS1
 
 After this patch, it is:
   DRAM:  Detected RDIMM VL493T5663D-E6M
  2 GiB (DDR2, 64-bit, CL=4, ECC on)
  DDR Chip-Select Interleaving Mode: CS0+CS1

We discussed this before.

This outpout is too verbose.  It should read:

DRAM:  2 GiB

And not more.  Any additional information should only be printed upon
explicit request from the user.

Thanks.

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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[U-Boot] [PATCH] mpc8xxx: Fix DRAM message formatting

[Kyle Moffett]

When the Detected RDIMM [...] message was added, it broke the
pretty-printing of the DRAM information during boot.

It used to look like this:
  DRAM:  2 GiB (DDR2, 64-bit, CL=4, ECC on)
 DDR Chip-Select Interleaving Mode: CS0+CS1

Right now, it looks like this:
  DRAM:  Detected RDIMM VL493T5663D-E6M
  2 GiB (DDR2, 64-bit, CL=4, ECC on)
 DDR Chip-Select Interleaving Mode: CS0+CS1

After this patch, it is:
  DRAM:  Detected RDIMM VL493T5663D-E6M
 2 GiB (DDR2, 64-bit, CL=4, ECC on)
 DDR Chip-Select Interleaving Mode: CS0+CS1

Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Wolfgang Denk w...@denx.de
Cc: Kim Phillips kim.phill...@freescale.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
---
 .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c|4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c 
b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
index 20c7db0..3f9104c 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c
@@ -209,11 +209,11 @@ compute_lowest_common_dimm_parameters(const dimm_params_t 
*dimm_params,
if (dimm_params[i].n_ranks) {
if (dimm_params[i].registered_dimm) {
temp1 = 1;
-   printf(Detected RDIMM %s\n,
+   printf(Detected RDIMM %s\n   ,
dimm_params[i].mpart);
} else {
temp2 = 1;
-   printf(Detected UDIMM %s\n,
+   printf(Detected UDIMM %s\n   ,
dimm_params[i].mpart);
}
}
-- 
1.7.7.3

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