Re: [U-Boot] [PATCH] p1020rdb-pd: platform support
Regards Haijun. > -Original Message- > From: Zhang Haijun-B42677 > Sent: Friday, June 28, 2013 9:55 AM > To: Wood Scott-B07421 > Cc: Fleming Andy-AFLEMING; u-boot@lists.denx.de; Huang Changming-R66093; > sun york-R58495 > Subject: RE: [U-Boot] [PATCH] p1020rdb-pd: platform support > > > > > Regards > Haijun. > > > > -Original Message- > > From: Wood Scott-B07421 > > Sent: Friday, June 28, 2013 4:10 AM > > To: Zhang Haijun-B42677 > > Cc: Wood Scott-B07421; Fleming Andy-AFLEMING; u-boot@lists.denx.de; > > Huang Changming-R66093; sun york-R58495 > > Subject: Re: [U-Boot] [PATCH] p1020rdb-pd: platform support > > > > On 06/27/2013 03:58:57 AM, Zhang Haijun-B42677 wrote: > > > Hi, Scott > > > > > > Sorry to reply to so late. > > > Pls see my reply below. > > > > > > > > > Regards & Thanks > > > Haijun. > > > > > > > -Original Message- > > > > From: Wood Scott-B07421 > > > > Sent: Wednesday, May 22, 2013 6:24 AM > > > > To: Zhang Haijun-B42677 > > > > Cc: Fleming Andy-AFLEMING; u-boot@lists.denx.de; Huang > > > Changming-R66093; > > > > Zhang Haijun-B42677; Zhang Haijun-B42677; sun york-R58495 > > > > Subject: Re: [U-Boot] [PATCH] p1020rdb-pd: platform support > > > > > > > > On 04/28/2013 01:17:34 AM, Haijun.Zhang wrote: > > > > > From: "Haijun.Zhang" > > > > > > > > > > Add platform support for p1020rdb-pd > > > > > > > > Explain what is different about "-pd" and why this new revision > > > requires > > > > a separate compile-time target. > > > > > > > [Haijun Wrote:] We use P1020RDB-PD to instead of P1020RDB-PC board > > > later on. > > > They are all supported. Nand, DDR, Nor and Spi Flash are different > > > between them. > > > So I thinks they should be two separate board as P1020UTM and > > > P1020MBG do. > > > > Put this information in the changelog. [Haijun Wrote:] change log you mean? > > > > > > If it's due to raw DDR config, say so in the changelog. Is there > > > any way > > > > we could read a revision register to select the proper DDR config > > > > at runtime? > > > [Haijun Wrote:] Now we read DDR config from SPD fist, if not found > > > read from config file. > > > > Is there any reason why SPD would not be found? [Haijun Wrote:] If someone erase the I2C area(SPD EEPROM) by mistake or change by other possible reason. They will need to read from local config file to make sure uboot can working. > > > > > > > +#if (defined(CONFIG_P1020RDB) || defined(CONFIG_P1020RDB_PD)) > > > > > #if defined(CONFIG_P1020RDB) > > > > > #define CONFIG_BOARDNAME "P1020RDB-PC" > > > > > +#elif defined(CONFIG_P1020RDB_PD) #define CONFIG_BOARDNAME > > > > > +"P1020RDB-PD" > > > > > +#endif > > > > > > > > CONFIG_P1020RDB is not a good name to mean specifically the -PC > > > revision. > > > > Change it so that CONFIG_P1020RDB is set for all revisions of > > > P1020RDB, > > > > and introduce CONFIG_P1020RDB-PC for PC-specific things. > > > > Could you reply to this one? > > > > ...and of course I meant CONFIG_P1020RDB_PC rather than > > CONFIG_P1020RDB- PC. :-) [Haijun Wrote:] Oh, yes I agree. It a little strange to have "-PD", but this patch was aim at add new board p1020rdb-pd board. If need i'll send another patch to change the config name for PC,RDB and PD. > > > > -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] p1020rdb-pd: platform support
On 06/27/2013 08:55:26 PM, Zhang Haijun-B42677 wrote: > -Original Message- > From: Wood Scott-B07421 > Sent: Friday, June 28, 2013 4:10 AM > To: Zhang Haijun-B42677 > Cc: Wood Scott-B07421; Fleming Andy-AFLEMING; u-boot@lists.denx.de; Huang > Changming-R66093; sun york-R58495 > Subject: Re: [U-Boot] [PATCH] p1020rdb-pd: platform support > > On 06/27/2013 03:58:57 AM, Zhang Haijun-B42677 wrote: > > Hi, Scott > > > > Sorry to reply to so late. > > Pls see my reply below. > > > > > > Regards & Thanks > > Haijun. > > > > > -Original Message- > > > From: Wood Scott-B07421 > > > Sent: Wednesday, May 22, 2013 6:24 AM > > > To: Zhang Haijun-B42677 > > > Cc: Fleming Andy-AFLEMING; u-boot@lists.denx.de; Huang > > Changming-R66093; > > > Zhang Haijun-B42677; Zhang Haijun-B42677; sun york-R58495 > > > Subject: Re: [U-Boot] [PATCH] p1020rdb-pd: platform support > > > > > > On 04/28/2013 01:17:34 AM, Haijun.Zhang wrote: > > > > From: "Haijun.Zhang" > > > > > > > > Add platform support for p1020rdb-pd > > > > > > Explain what is different about "-pd" and why this new revision > > requires > > > a separate compile-time target. > > > > > [Haijun Wrote:] We use P1020RDB-PD to instead of P1020RDB-PC board > > later on. > > They are all supported. Nand, DDR, Nor and Spi Flash are different > > between them. > > So I thinks they should be two separate board as P1020UTM and P1020MBG > > do. > > Put this information in the changelog. [Haijun Wrote:] change log you mean? The git commit message. > > > If it's due to raw DDR config, say so in the changelog. Is there > > any way > > > we could read a revision register to select the proper DDR config at > > > runtime? > > [Haijun Wrote:] Now we read DDR config from SPD fist, if not found > > read from config file. > > Is there any reason why SPD would not be found? [Haijun Wrote:] If someone erase the I2C area(SPD EEPROM) by mistake or change by other possible reason. They will need to read from local config file to make sure uboot can working. I don't think we normally provide backup DDR config for such a case. There are many other, easier ways the user can accidentally screw up the system (e.g. they could erase U-Boot). And it would get little to no testing, so likely bitrot or otherwise not work (e.g. the board starts shipping with different RAM, or the settings were never quite right to begin with). > > > > +#if (defined(CONFIG_P1020RDB) || defined(CONFIG_P1020RDB_PD)) > > > > #if defined(CONFIG_P1020RDB) > > > > #define CONFIG_BOARDNAME "P1020RDB-PC" > > > > +#elif defined(CONFIG_P1020RDB_PD) #define CONFIG_BOARDNAME > > > > +"P1020RDB-PD" > > > > +#endif > > > > > > CONFIG_P1020RDB is not a good name to mean specifically the -PC > > revision. > > > Change it so that CONFIG_P1020RDB is set for all revisions of > > P1020RDB, > > > and introduce CONFIG_P1020RDB-PC for PC-specific things. > > Could you reply to this one? > > ...and of course I meant CONFIG_P1020RDB_PC rather than CONFIG_P1020RDB- > PC. :-) [Haijun Wrote:] Oh, yes I agree. It a little strange to have "-PD", but this patch was aim at add new board p1020rdb-pd board. If need i'll send another patch to change the config name for PC,RDB and PD. I had send another patch(Mean v2 of this patch), pls give some advice. Respin that patch so that CONFIG_P1020RDB is set for all revisions of p1020rdb, and either CONFIG_P1020RDB_PC or CONFIG_P1020RDB_PD is specified to indicated the revision. -SCott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] p1020rdb-pd: platform support
Regards
Haijun.
> -Original Message-
> From: Wood Scott-B07421
> Sent: Friday, June 28, 2013 4:10 AM
> To: Zhang Haijun-B42677
> Cc: Wood Scott-B07421; Fleming Andy-AFLEMING; u-boot@lists.denx.de; Huang
> Changming-R66093; sun york-R58495
> Subject: Re: [U-Boot] [PATCH] p1020rdb-pd: platform support
>
> On 06/27/2013 03:58:57 AM, Zhang Haijun-B42677 wrote:
> > Hi, Scott
> >
> > Sorry to reply to so late.
> > Pls see my reply below.
> >
> >
> > Regards & Thanks
> > Haijun.
> >
> > > -Original Message-
> > > From: Wood Scott-B07421
> > > Sent: Wednesday, May 22, 2013 6:24 AM
> > > To: Zhang Haijun-B42677
> > > Cc: Fleming Andy-AFLEMING; u-boot@lists.denx.de; Huang
> > Changming-R66093;
> > > Zhang Haijun-B42677; Zhang Haijun-B42677; sun york-R58495
> > > Subject: Re: [U-Boot] [PATCH] p1020rdb-pd: platform support
> > >
> > > On 04/28/2013 01:17:34 AM, Haijun.Zhang wrote:
> > > > From: "Haijun.Zhang"
> > > >
> > > > Add platform support for p1020rdb-pd
> > >
> > > Explain what is different about "-pd" and why this new revision
> > requires
> > > a separate compile-time target.
> > >
> > [Haijun Wrote:] We use P1020RDB-PD to instead of P1020RDB-PC board
> > later on.
> > They are all supported. Nand, DDR, Nor and Spi Flash are different
> > between them.
> > So I thinks they should be two separate board as P1020UTM and P1020MBG
> > do.
>
> Put this information in the changelog.
[Haijun Wrote:] change log you mean?
>
> > > If it's due to raw DDR config, say so in the changelog. Is there
> > any way
> > > we could read a revision register to select the proper DDR config at
> > > runtime?
> > [Haijun Wrote:] Now we read DDR config from SPD fist, if not found
> > read from config file.
>
> Is there any reason why SPD would not be found?
[Haijun Wrote:] If someone erase the I2C area(SPD EEPROM) by mistake or change
by other possible reason.
They will need to read from local config file to make sure uboot can working.
>
> > > > +#if (defined(CONFIG_P1020RDB) || defined(CONFIG_P1020RDB_PD))
> > > > #if defined(CONFIG_P1020RDB)
> > > > #define CONFIG_BOARDNAME "P1020RDB-PC"
> > > > +#elif defined(CONFIG_P1020RDB_PD) #define CONFIG_BOARDNAME
> > > > +"P1020RDB-PD"
> > > > +#endif
> > >
> > > CONFIG_P1020RDB is not a good name to mean specifically the -PC
> > revision.
> > > Change it so that CONFIG_P1020RDB is set for all revisions of
> > P1020RDB,
> > > and introduce CONFIG_P1020RDB-PC for PC-specific things.
>
> Could you reply to this one?
>
> ...and of course I meant CONFIG_P1020RDB_PC rather than CONFIG_P1020RDB-
> PC. :-)
[Haijun Wrote:] Oh, yes I agree. It a little strange to have "-PD", but this
patch was aim at add new board p1020rdb-pd board. If need i'll send another
patch to change the config name for PC,RDB and PD.
I had send another patch(Mean v2 of this patch), pls give some advice.
Thanks in advance.
>
> -Scott
--- Begin Message ---
From: "Haijun.Zhang"
Signed-off-by: Jerry Huang
Signed-off-by: Haijun Zhang
CC: Scott Wood
CC: Sun Yusong-R58495
---
board/freescale/p1_p2_rdb_pc/ddr.c | 2 +-
board/freescale/p1_p2_rdb_pc/tlb.c | 2 +-
boards.cfg | 4
include/configs/p1_p2_rdb_pc.h | 48 --
4 files changed, 52 insertions(+), 4 deletions(-)
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c
b/board/freescale/p1_p2_rdb_pc/ddr.c
index 9355536..262fd36 100644
--- a/board/freescale/p1_p2_rdb_pc/ddr.c
+++ b/board/freescale/p1_p2_rdb_pc/ddr.c
@@ -80,7 +80,7 @@ dimm_params_t ddr_raw_timing = {
.refresh_rate_ps = 780,
.tFAW_ps = 3,
};
-#elif defined(CONFIG_P1020MBG)
+#elif (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
/* Micron MT41J512M8_187E */
dimm_params_t ddr_raw_timing = {
.n_ranks = 2,
diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c
b/board/freescale/p1_p2_rdb_pc/tlb.c
index 3e4dffd..e19002f 100644
--- a/board/freescale/p1_p2_rdb_pc/tlb.c
+++ b/board/freescale/p1_p2_rdb_pc/tlb.c
@@ -110,7 +110,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 8, BOOKE_PAGESZ_1G, 1),
-#ifdef CONFIG_P1020MBG
+#if defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD)
/* 2G DDR on P1020MBG, map the second 1G */
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x4000,
CONFIG_SYS_DDR_SDRAM_BASE + 0
Re: [U-Boot] [PATCH] p1020rdb-pd: platform support
On 06/27/2013 03:58:57 AM, Zhang Haijun-B42677 wrote: Hi, Scott Sorry to reply to so late. Pls see my reply below. Regards & Thanks Haijun. > -Original Message- > From: Wood Scott-B07421 > Sent: Wednesday, May 22, 2013 6:24 AM > To: Zhang Haijun-B42677 > Cc: Fleming Andy-AFLEMING; u-boot@lists.denx.de; Huang Changming-R66093; > Zhang Haijun-B42677; Zhang Haijun-B42677; sun york-R58495 > Subject: Re: [U-Boot] [PATCH] p1020rdb-pd: platform support > > On 04/28/2013 01:17:34 AM, Haijun.Zhang wrote: > > From: "Haijun.Zhang" > > > > Add platform support for p1020rdb-pd > > Explain what is different about "-pd" and why this new revision requires > a separate compile-time target. > [Haijun Wrote:] We use P1020RDB-PD to instead of P1020RDB-PC board later on. They are all supported. Nand, DDR, Nor and Spi Flash are different between them. So I thinks they should be two separate board as P1020UTM and P1020MBG do. Put this information in the changelog. > If it's due to raw DDR config, say so in the changelog. Is there any way > we could read a revision register to select the proper DDR config at > runtime? [Haijun Wrote:] Now we read DDR config from SPD fist, if not found read from config file. Is there any reason why SPD would not be found? > > +#if (defined(CONFIG_P1020RDB) || defined(CONFIG_P1020RDB_PD)) > > #if defined(CONFIG_P1020RDB) > > #define CONFIG_BOARDNAME "P1020RDB-PC" > > +#elif defined(CONFIG_P1020RDB_PD) > > +#define CONFIG_BOARDNAME "P1020RDB-PD" > > +#endif > > CONFIG_P1020RDB is not a good name to mean specifically the -PC revision. > Change it so that CONFIG_P1020RDB is set for all revisions of P1020RDB, > and introduce CONFIG_P1020RDB-PC for PC-specific things. Could you reply to this one? ...and of course I meant CONFIG_P1020RDB_PC rather than CONFIG_P1020RDB-PC. :-) -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] p1020rdb-pd: platform support
Hi, Scott Sorry to reply to so late. Pls see my reply below. Regards & Thanks Haijun. > -Original Message- > From: Wood Scott-B07421 > Sent: Wednesday, May 22, 2013 6:24 AM > To: Zhang Haijun-B42677 > Cc: Fleming Andy-AFLEMING; u-boot@lists.denx.de; Huang Changming-R66093; > Zhang Haijun-B42677; Zhang Haijun-B42677; sun york-R58495 > Subject: Re: [U-Boot] [PATCH] p1020rdb-pd: platform support > > On 04/28/2013 01:17:34 AM, Haijun.Zhang wrote: > > From: "Haijun.Zhang" > > > > Add platform support for p1020rdb-pd > > Explain what is different about "-pd" and why this new revision requires > a separate compile-time target. > [Haijun Wrote:] We use P1020RDB-PD to instead of P1020RDB-PC board later on. They are all supported. Nand, DDR, Nor and Spi Flash are different between them. So I thinks they should be two separate board as P1020UTM and P1020MBG do. > If it's due to raw DDR config, say so in the changelog. Is there any way > we could read a revision register to select the proper DDR config at > runtime? [Haijun Wrote:] Now we read DDR config from SPD fist, if not found read from config file. > > If it's due to different NAND page size, that will no longer be an issue > once this is applied: > http://patchwork.ozlabs.org/patch/223436/ > > > +#if (defined(CONFIG_P1020RDB) || defined(CONFIG_P1020RDB_PD)) > > #if defined(CONFIG_P1020RDB) > > #define CONFIG_BOARDNAME "P1020RDB-PC" > > +#elif defined(CONFIG_P1020RDB_PD) > > +#define CONFIG_BOARDNAME "P1020RDB-PD" > > +#endif > > CONFIG_P1020RDB is not a good name to mean specifically the -PC revision. > Change it so that CONFIG_P1020RDB is set for all revisions of P1020RDB, > and introduce CONFIG_P1020RDB-PC for PC-specific things. > > -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] p1020rdb-pd: platform support
From: "Haijun.Zhang"
Signed-off-by: Jerry Huang
Signed-off-by: Haijun Zhang
CC: Scott Wood
CC: Sun Yusong-R58495
---
board/freescale/p1_p2_rdb_pc/ddr.c | 2 +-
board/freescale/p1_p2_rdb_pc/tlb.c | 2 +-
boards.cfg | 4
include/configs/p1_p2_rdb_pc.h | 48 --
4 files changed, 52 insertions(+), 4 deletions(-)
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c
b/board/freescale/p1_p2_rdb_pc/ddr.c
index 9355536..262fd36 100644
--- a/board/freescale/p1_p2_rdb_pc/ddr.c
+++ b/board/freescale/p1_p2_rdb_pc/ddr.c
@@ -80,7 +80,7 @@ dimm_params_t ddr_raw_timing = {
.refresh_rate_ps = 780,
.tFAW_ps = 3,
};
-#elif defined(CONFIG_P1020MBG)
+#elif (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
/* Micron MT41J512M8_187E */
dimm_params_t ddr_raw_timing = {
.n_ranks = 2,
diff --git a/board/freescale/p1_p2_rdb_pc/tlb.c
b/board/freescale/p1_p2_rdb_pc/tlb.c
index 3e4dffd..e19002f 100644
--- a/board/freescale/p1_p2_rdb_pc/tlb.c
+++ b/board/freescale/p1_p2_rdb_pc/tlb.c
@@ -110,7 +110,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
MAS3_SX|MAS3_SW|MAS3_SR, 0,
0, 8, BOOKE_PAGESZ_1G, 1),
-#ifdef CONFIG_P1020MBG
+#if defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD)
/* 2G DDR on P1020MBG, map the second 1G */
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x4000,
CONFIG_SYS_DDR_SDRAM_BASE + 0x4000,
diff --git a/boards.cfg b/boards.cfg
index 35f38f3..aefff92 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -768,6 +768,10 @@ P1020RDB-PC_SDCARD powerpc mpc85xx
p1_p2_rdb_pcfreesca
P1020RDB-PC_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020RDB,SPIFLASH
P1020RDB_SDCARD powerpc mpc85xx p1_p2_rdb
freescale - P1_P2_RDB:P1020RDB,SDCARD
P1020RDB_SPIFLASHpowerpc mpc85xx p1_p2_rdb
freescale - P1_P2_RDB:P1020RDB,SPIFLASH
+P1020RDB-PD powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020RDB_PD
+P1020RDB-PD_NAND powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020RDB_PD,NAND
+P1020RDB-PD_SDCARD powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020RDB_PD,SDCARD
+P1020RDB-PD_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020RDB_PD,SPIFLASH
P1020UTM-PC powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020UTM
P1020UTM-PC_36BITpowerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020UTM,36BIT
P1020UTM-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020UTM,36BIT,SDCARD
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 964bfcd..36aad8c 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -66,6 +66,35 @@
#define CONFIG_SYS_L2_SIZE (256 << 10)
#endif
+/*
+ * P1020RDB-PD board has user selectable switches for evaluating different
+ * frequency and boot options for the P1020 device. The table that
+ * follow describe the available options. The front six binary number was in
+ * accordance with SW3[1:6].
+ * 01 533 533 267 667 NOR Core0 boot; Core1 hold-off
+ * 101101 667 667 333 667 NOR Core0 boot; Core1 hold-off
+ * 011001 800 800 400 667 NOR Core0 boot; Core1 hold-off
+ * 001001 800 800 400 667 SD/MMC Core0 boot; Core1 hold-off
+ * 001101 800 800 400 667 SPI Core0 boot; Core1 hold-off
+ * 010001 800 800 400 667 NAND Core0 boot; Core1 hold-off
+ * 011101 800 800 400 667 PCIe-2 Core0 boot; Core1 hold-off
+ */
+#if defined(CONFIG_P1020RDB_PD)
+#define CONFIG_BOARDNAME "P1020RDB-PD"
+#define CONFIG_NAND_FSL_ELBC
+#define CONFIG_P1020
+#define CONFIG_SPI_FLASH
+#define CONFIG_VSC7385_ENET
+#define CONFIG_SLIC
+#define __SW_BOOT_MASK 0x03
+#define __SW_BOOT_NOR 0x64
+#define __SW_BOOT_SPI 0x34
+#define __SW_BOOT_SD 0x24
+#define __SW_BOOT_NAND 0x44
+#define __SW_BOOT_PCIE 0x74
+#define CONFIG_SYS_L2_SIZE (256 << 10)
+#endif
+
#if defined(CONFIG_P1021RDB)
#define CONFIG_BOARDNAME "P1021RDB-PC"
#define CONFIG_NAND_FSL_ELBC
@@ -274,7 +303,7 @@
#define SPD_EEPROM_ADDRESS 0x52
#undef CONFIG_FSL_DDR_INTERACTIVE
-#ifdef CONFIG_P1020MBG
+#if (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
#else
@@ -345,7 +374,7 @@
/*
* Local Bus Definitions
*/
-#if defined(CONFIG_P1020MBG)
+#if (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
#define CONFIG_SYS_MAX_FLASH_SECT
Re: [U-Boot] [PATCH] p1020rdb-pd: platform support
On 04/28/2013 01:17:34 AM, Haijun.Zhang wrote: From: "Haijun.Zhang" Add platform support for p1020rdb-pd Explain what is different about "-pd" and why this new revision requires a separate compile-time target. If it's due to raw DDR config, say so in the changelog. Is there any way we could read a revision register to select the proper DDR config at runtime? If it's due to different NAND page size, that will no longer be an issue once this is applied: http://patchwork.ozlabs.org/patch/223436/ +#if (defined(CONFIG_P1020RDB) || defined(CONFIG_P1020RDB_PD)) #if defined(CONFIG_P1020RDB) #define CONFIG_BOARDNAME "P1020RDB-PC" +#elif defined(CONFIG_P1020RDB_PD) +#define CONFIG_BOARDNAME "P1020RDB-PD" +#endif CONFIG_P1020RDB is not a good name to mean specifically the -PC revision. Change it so that CONFIG_P1020RDB is set for all revisions of P1020RDB, and introduce CONFIG_P1020RDB-PC for PC-specific things. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] p1020rdb-pd: platform support
From: "Haijun.Zhang"
Add platform support for p1020rdb-pd
Signed-off-by: Jerry Huang
Signed-off-by: Haijun Zhang
CC: Sun Yusong-R58495
CC: u-boot@lists.denx.de
---
board/freescale/p1_p2_rdb_pc/ddr.c | 2 +-
boards.cfg | 4
include/configs/p1_p2_rdb_pc.h | 19 +--
3 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c
b/board/freescale/p1_p2_rdb_pc/ddr.c
index 9355536..262fd36 100644
--- a/board/freescale/p1_p2_rdb_pc/ddr.c
+++ b/board/freescale/p1_p2_rdb_pc/ddr.c
@@ -80,7 +80,7 @@ dimm_params_t ddr_raw_timing = {
.refresh_rate_ps = 780,
.tFAW_ps = 3,
};
-#elif defined(CONFIG_P1020MBG)
+#elif (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
/* Micron MT41J512M8_187E */
dimm_params_t ddr_raw_timing = {
.n_ranks = 2,
diff --git a/boards.cfg b/boards.cfg
index 79ee5e7..a855348 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -772,6 +772,10 @@ P1020RDB-PC_SDCARD powerpc mpc85xx
p1_p2_rdb_pcfreesca
P1020RDB-PC_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020RDB,SPIFLASH
P1020RDB_SDCARD powerpc mpc85xx p1_p2_rdb
freescale - P1_P2_RDB:P1020RDB,SDCARD
P1020RDB_SPIFLASHpowerpc mpc85xx p1_p2_rdb
freescale - P1_P2_RDB:P1020RDB,SPIFLASH
+P1020RDB-PD powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020RDB_PD
+P1020RDB-PD_NAND powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020RDB_PD,NAND
+P1020RDB-PD_SDCARD powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020RDB_PD,SDCARD
+P1020RDB-PD_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020RDB_PD,SPIFLASH
P1020UTM-PC powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020UTM
P1020UTM-PC_36BITpowerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020UTM,36BIT
P1020UTM-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc
freescale - p1_p2_rdb_pc:P1020UTM,36BIT,SDCARD
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 1a8ea3a..d65c5b7 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -50,8 +50,12 @@
#define CONFIG_SYS_L2_SIZE (256 << 10)
#endif
+#if (defined(CONFIG_P1020RDB) || defined(CONFIG_P1020RDB_PD))
#if defined(CONFIG_P1020RDB)
#define CONFIG_BOARDNAME "P1020RDB-PC"
+#elif defined(CONFIG_P1020RDB_PD)
+#define CONFIG_BOARDNAME "P1020RDB-PD"
+#endif
#define CONFIG_NAND_FSL_ELBC
#define CONFIG_P1020
#define CONFIG_SPI_FLASH
@@ -278,7 +282,7 @@
#define SPD_EEPROM_ADDRESS 0x52
#undef CONFIG_FSL_DDR_INTERACTIVE
-#ifdef CONFIG_P1020MBG
+#if (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G
#define CONFIG_CHIP_SELECTS_PER_CTRL 2
#else
@@ -349,7 +353,7 @@
/*
* Local Bus Definitions
*/
-#if defined(CONFIG_P1020MBG)
+#if (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD))
#define CONFIG_SYS_MAX_FLASH_SECT 512 /* 64M */
#define CONFIG_SYS_FLASH_BASE 0xec00
#elif defined(CONFIG_P1020UTM)
@@ -407,6 +411,16 @@
| BR_PS_8 /* Port Size = 8 bit */ \
| BR_MS_FCM /* MSEL = FCM */ \
| BR_V) /* valid */
+#if defined(CONFIG_P1020RDB_PD)
+#define CONFIG_SYS_NAND_OR_PRELIM (OR_AM_32KB \
+ | OR_FCM_PGS/* Large Page*/ \
+ | OR_FCM_CSCT \
+ | OR_FCM_CST \
+ | OR_FCM_CHT \
+ | OR_FCM_SCY_1 \
+ | OR_FCM_TRLX \
+ | OR_FCM_EHTR)
+#else
#define CONFIG_SYS_NAND_OR_PRELIM (OR_AM_32KB /* small page */ \
| OR_FCM_CSCT \
| OR_FCM_CST \
@@ -414,6 +428,7 @@
| OR_FCM_SCY_1 \
| OR_FCM_TRLX \
| OR_FCM_EHTR)
+#endif
#endif /* CONFIG_NAND_FSL_ELBC */
#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
--
1.8.0
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