[U-Boot] [PATCH] powerpc/p1010rdb: add p1010rdb-pb support with updating p1010rdb-pa
- Rename old P1010RDB board as P1010RDB-PA.
- Add support for new P1010RDB-PB board.
- Enable IFC flash access in case of SD boot via hwconfig or mux command.
- Some optimization and code cleanup.
For more details, see board/freescale/p1010rdb/README.
Signed-off-by: Shengzhou Liu
---
board/freescale/p1010rdb/law.c | 2 -
board/freescale/p1010rdb/p1010rdb.c | 332 ++--
board/freescale/p1010rdb/tlb.c | 4 -
boards.cfg | 41 +++--
include/configs/P1010RDB.h | 113 +---
5 files changed, 391 insertions(+), 101 deletions(-)
diff --git a/board/freescale/p1010rdb/law.c b/board/freescale/p1010rdb/law.c
index 0045127..ed41a05 100644
--- a/board/freescale/p1010rdb/law.c
+++ b/board/freescale/p1010rdb/law.c
@@ -9,11 +9,9 @@
#include
struct law_entry law_table[] = {
-#ifndef CONFIG_SDCARD
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
-#endif
};
int num_law_entries = ARRAY_SIZE(law_table);
diff --git a/board/freescale/p1010rdb/p1010rdb.c
b/board/freescale/p1010rdb/p1010rdb.c
index 06aa800..7f30ccb 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -21,10 +21,8 @@
#include
#include
#include
-
-#ifndef CONFIG_SDCARD
#include
-#endif
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -33,10 +31,30 @@ DECLARE_GLOBAL_DATA_PTR;
#define MUX_CPLD_TDM 0x01
#define MUX_CPLD_SPICS0_FLASH 0x00
#define MUX_CPLD_SPICS0_SLIC 0x02
+#define PMUXCR1_IFC_MASK 0x0000
+#define PMUXCR1_SDHC_MASK 0x00fff000
+#define PMUXCR1_SDHC_ENABLE 0x00555000
+
+enum {
+ MUX_TYPE_IFC,
+ MUX_TYPE_SDHC,
+ MUX_TYPE_SPIFLASH,
+ MUX_TYPE_TDM,
+ MUX_TYPE_CAN,
+ MUX_TYPE_CS0_NOR,
+ MUX_TYPE_CS0_NAND,
+};
+
+enum {
+ I2C_READ_BANK,
+ I2C_READ_PCB_VER,
+};
+
+static uint sd_ifc_mux;
-#ifndef CONFIG_SDCARD
struct cpld_data {
u8 cpld_ver; /* cpld revision */
+#if defined(CONFIG_P1010RDB_PA)
u8 pcba_ver; /* pcb revision number */
u8 twindie_ddr3;
u8 res1[6];
@@ -51,53 +69,18 @@ struct cpld_data {
u8 por1; /* POR Options */
u8 por2; /* POR Options */
u8 por3; /* POR Options */
-};
-
-void cpld_show(void)
-{
- struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
-
- printf("CPLD: V%x.%x PCBA: V%x.0\n",
- in_8(&cpld_data->cpld_ver) & 0xF0,
- in_8(&cpld_data->cpld_ver) & 0x0F,
- in_8(&cpld_data->pcba_ver) & 0x0F);
-
-#ifdef CONFIG_DEBUG
- printf("twindie_ddr =%x\n",
- in_8(&cpld_data->twindie_ddr3));
- printf("bank_sel =%x\n",
- in_8(&cpld_data->bank_sel));
- printf("usb2_sel =%x\n",
- in_8(&cpld_data->usb2_sel));
- printf("porsw_sel =%x\n",
- in_8(&cpld_data->porsw_sel));
- printf("tdm_can_sel =%x\n",
- in_8(&cpld_data->tdm_can_sel));
- printf("tdm_can_sel =%x\n",
- in_8(&cpld_data->tdm_can_sel));
- printf("spi_cs0_sel =%x\n",
- in_8(&cpld_data->spi_cs0_sel));
- printf("bcsr0 =%x\n",
- in_8(&cpld_data->bcsr0));
- printf("bcsr1 =%x\n",
- in_8(&cpld_data->bcsr1));
- printf("bcsr2 =%x\n",
- in_8(&cpld_data->bcsr2));
- printf("bcsr3 =%x\n",
- in_8(&cpld_data->bcsr3));
-#endif
-}
+#elif defined(CONFIG_P1010RDB_PB)
+ u8 rom_loc;
#endif
+};
int board_early_init_f(void)
{
ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
-#ifndef CONFIG_SDCARD
struct fsl_ifc *ifc = (void *)CONFIG_SYS_IFC_ADDR;
/* Clock configuration to access CPLD using IFC(GPCM) */
setbits_be32(&ifc->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT);
-#endif
/*
* Reset PCIe slots via GPIO4
*/
@@ -109,7 +92,6 @@ int board_early_init_f(void)
int board_early_init_r(void)
{
-#ifndef CONFIG_SDCARD
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
@@ -133,7 +115,7 @@ int board_early_init_r(void)
CONFIG_SYS_FLASH_BASE_PHYS + 0x100,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel+1, BOOKE_PAGESZ_16M, 1);
-#endif
+
return 0;
}
@@ -144,13 +126,201 @@ void pci_init_board(void)
}
#endif /* ifdef CONFIG_PCI */
+int config_board_mux(int ctrl_type)
+{
+ ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ u8 tmp;
+
+#if defined(CONFIG_P1010RDB_PA)
+ struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
+
+ switch (ctrl_type) {
+ case MUX_TYPE_IFC:
+
[U-Boot] [PATCH] powerpc/p1010rdb: add p1010rdb-pb support with updating p1010rdb-pa
- Rename old P1010RDB board as P1010RDB-PA.
- Add support for new P1010RDB-PB board.
- Enable IFC flash access in case of SD boot.
- Some optimization and code cleanup.
Only P1010RDB-PB board is supported officially, but we still
reserve code-support for previous P1010RDB-PA board.
Signed-off-by: Shengzhou Liu
---
board/freescale/p1010rdb/law.c | 2 -
board/freescale/p1010rdb/p1010rdb.c | 330 ++--
board/freescale/p1010rdb/tlb.c | 4 -
boards.cfg | 41 +++--
include/configs/P1010RDB.h | 113 +---
5 files changed, 389 insertions(+), 101 deletions(-)
diff --git a/board/freescale/p1010rdb/law.c b/board/freescale/p1010rdb/law.c
index 0045127..ed41a05 100644
--- a/board/freescale/p1010rdb/law.c
+++ b/board/freescale/p1010rdb/law.c
@@ -9,11 +9,9 @@
#include
struct law_entry law_table[] = {
-#ifndef CONFIG_SDCARD
SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC),
SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_IFC),
-#endif
};
int num_law_entries = ARRAY_SIZE(law_table);
diff --git a/board/freescale/p1010rdb/p1010rdb.c
b/board/freescale/p1010rdb/p1010rdb.c
index 06aa800..2fd7790 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -21,10 +21,8 @@
#include
#include
#include
-
-#ifndef CONFIG_SDCARD
#include
-#endif
+#include
DECLARE_GLOBAL_DATA_PTR;
@@ -33,10 +31,30 @@ DECLARE_GLOBAL_DATA_PTR;
#define MUX_CPLD_TDM 0x01
#define MUX_CPLD_SPICS0_FLASH 0x00
#define MUX_CPLD_SPICS0_SLIC 0x02
+#define PMUXCR1_IFC_MASK 0x0000
+#define PMUXCR1_SDHC_MASK 0x00fff000
+#define PMUXCR1_SDHC_ENABLE 0x00555000
+
+enum {
+ MUX_TYPE_IFC,
+ MUX_TYPE_SDHC,
+ MUX_TYPE_SPIFLASH,
+ MUX_TYPE_TDM,
+ MUX_TYPE_CAN,
+ MUX_TYPE_CS0_NOR,
+ MUX_TYPE_CS0_NAND,
+};
+
+enum {
+ I2C_READ_BANK,
+ I2C_READ_PCB_VER,
+};
+
+static uint sd_ifc_mux;
-#ifndef CONFIG_SDCARD
struct cpld_data {
u8 cpld_ver; /* cpld revision */
+#if defined(CONFIG_P1010RDB_PA)
u8 pcba_ver; /* pcb revision number */
u8 twindie_ddr3;
u8 res1[6];
@@ -51,53 +69,18 @@ struct cpld_data {
u8 por1; /* POR Options */
u8 por2; /* POR Options */
u8 por3; /* POR Options */
-};
-
-void cpld_show(void)
-{
- struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
-
- printf("CPLD: V%x.%x PCBA: V%x.0\n",
- in_8(&cpld_data->cpld_ver) & 0xF0,
- in_8(&cpld_data->cpld_ver) & 0x0F,
- in_8(&cpld_data->pcba_ver) & 0x0F);
-
-#ifdef CONFIG_DEBUG
- printf("twindie_ddr =%x\n",
- in_8(&cpld_data->twindie_ddr3));
- printf("bank_sel =%x\n",
- in_8(&cpld_data->bank_sel));
- printf("usb2_sel =%x\n",
- in_8(&cpld_data->usb2_sel));
- printf("porsw_sel =%x\n",
- in_8(&cpld_data->porsw_sel));
- printf("tdm_can_sel =%x\n",
- in_8(&cpld_data->tdm_can_sel));
- printf("tdm_can_sel =%x\n",
- in_8(&cpld_data->tdm_can_sel));
- printf("spi_cs0_sel =%x\n",
- in_8(&cpld_data->spi_cs0_sel));
- printf("bcsr0 =%x\n",
- in_8(&cpld_data->bcsr0));
- printf("bcsr1 =%x\n",
- in_8(&cpld_data->bcsr1));
- printf("bcsr2 =%x\n",
- in_8(&cpld_data->bcsr2));
- printf("bcsr3 =%x\n",
- in_8(&cpld_data->bcsr3));
-#endif
-}
+#elif defined(CONFIG_P1010RDB_PB)
+ u8 rom_loc;
#endif
+};
int board_early_init_f(void)
{
ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
-#ifndef CONFIG_SDCARD
struct fsl_ifc *ifc = (void *)CONFIG_SYS_IFC_ADDR;
/* Clock configuration to access CPLD using IFC(GPCM) */
setbits_be32(&ifc->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT);
-#endif
/*
* Reset PCIe slots via GPIO4
*/
@@ -109,7 +92,6 @@ int board_early_init_f(void)
int board_early_init_r(void)
{
-#ifndef CONFIG_SDCARD
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
@@ -133,7 +115,7 @@ int board_early_init_r(void)
CONFIG_SYS_FLASH_BASE_PHYS + 0x100,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel+1, BOOKE_PAGESZ_16M, 1);
-#endif
+
return 0;
}
@@ -144,13 +126,201 @@ void pci_init_board(void)
}
#endif /* ifdef CONFIG_PCI */
+int config_board_mux(int ctrl_type)
+{
+ ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ u8 tmp;
+
+#if defined(CONFIG_P1010RDB_PA)
+ struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
+
+ switch (ctrl_type) {
+
