Hi, Andy,
This patch is based on following patch sent at 2012-12-04,
http://patchwork.ozlabs.org/patch/203583/
will there be any update for this patch?
Best Regards,
Shaohui Xie
-Original Message-
From: Xie Shaohui-B21989
Sent: Wednesday, January 23, 2013 3:14 PM
To: u-boot@lists.denx.de; Fleming Andy-AFLEMING
Cc: Xie Shaohui-B21989
Subject: [PATCH] powerpc/p2041: fix serdes reference clock frequency for
PC board
PC board has different serdes clock setting with PB board, it uses same
serdes frequency setting on bank2 as on bank1. PC board can be
distingushed from PB board by checking CPLD version, if running on PC
board, then fix the serdes reference clock frequency of bank2.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
board/freescale/p2041rdb/p2041rdb.c |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/board/freescale/p2041rdb/p2041rdb.c
b/board/freescale/p2041rdb/p2041rdb.c
index 4e4d18f..f6de0d3 100644
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -227,6 +227,11 @@ int misc_init_r(void)
'00' is unsupported\n);
else
actual[i] = freq[i][clock];
+
+ if ((i == 1) (CPLD_READ(cpld_ver_sub) == 1)
+ (CPLD_READ(pcba_ver) == 5))
+ /* PC board frequency */
+ actual[i] = freq[i-1][clock];
}
for (i = 0; i NUM_SRDS_BANKS; i++) {
--
1.6.4
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