[U-Boot] [PATCH] powerpc: Add cpu_late_init_r to allow for initialization post env setup
We can simplify some cpu/SoC level initialization by moving it to be
after the environment and non-volatile storage is setup as there might
be dependancies on such things in various boot configurations.
For example for FSL SoC's with QE if we boot from NAND we need it setup
to extra the ucode image to initialize the QE. If we always do this
after environment non-volatile storage is working we can have the code
be the same regardless of NOR, NAND, SPI, MMC boot.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 15 +--
arch/powerpc/lib/board.c|7 +++
2 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 8ece970..fa77857 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -384,12 +384,6 @@ int cpu_init_r(void)
enable_cpc();
-#ifdef CONFIG_QE
- uint qe_base = CONFIG_SYS_IMMR + 0x0008; /* QE immr base */
- qe_init(qe_base);
- qe_reset();
-#endif
-
/* needs to be in ram since code uses global static vars */
fsl_serdes_init();
@@ -449,3 +443,12 @@ int sata_initialize(void)
return 1;
}
#endif
+
+void cpu_late_init_r(void)
+{
+#ifdef CONFIG_QE
+ uint qe_base = CONFIG_SYS_IMMR + 0x0008; /* QE immr base */
+ qe_init(qe_base);
+ qe_reset();
+#endif
+}
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index b88cf6b..525a0d4 100644
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
@@ -186,6 +186,11 @@ int __board_flash_wp_on(void)
}
int board_flash_wp_on(void) __attribute__((weak,
alias(__board_flash_wp_on)));
+void __cpu_late_init_r(void)
+{
+}
+void cpu_late_init_r(void) __attribute__((weak, alias(__cpu_late_init_r)));
+
static int init_func_ram (void)
{
#ifdef CONFIG_BOARD_TYPES
@@ -986,6 +991,8 @@ void board_init_r (gd_t *id, ulong dest_addr)
#endif
#endif
+ cpu_late_init_r();
+
#ifdef CONFIG_LAST_STAGE_INIT
WATCHDOG_RESET ();
/*
--
1.7.2.3
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Re: [U-Boot] [PATCH] powerpc: Add cpu_late_init_r to allow for initialization post env setup
On Wed, 2011-02-02 at 11:27 -0600, Kumar Gala wrote:
+void cpu_late_init_r(void)
+{
+#ifdef CONFIG_QE
+ uint qe_base = CONFIG_SYS_IMMR + 0x0008; /* QE immr base */
+ qe_init(qe_base);
+ qe_reset();
+#endif
+}
You did not move qe_reset() inside qe_init() as you recommended.:)
For NAND boot case, the microcode needs to be read from nand flash via
nand_read first, so you might add some more code like:
+void cpu_late_init_r(void)
+{
+#ifdef CONFIG_QE
+#ifdef CONFIG_SYS_QE_FW_IN_NAND
+ int ret;
+ size_t fw_length = CONFIG_SYS_QE_FW_LENGTH;
+ /* load QE firmware from NAND flash to DDR first */
+ ret = nand_read(nand_info[0],(loff_t)CONFIG_SYS_QE_FW_IN_NAND,
+ fw_length, (u_char *)CONFIG_SYS_QE_FW_ADDR);
+ if (ret ret == -EUCLEAN) {
+ printf (NAND read for QE firmware at offset %x failed %
d\n,
+ CONFIG_SYS_QE_FW_IN_NAND, ret);
+ }
+#endif
+ uint qe_base = CONFIG_SYS_IMMR + 0x0008; /* QE immr base */
+ qe_init(qe_base);
+ qe_reset();
+#endif
+}
Haiying
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Re: [U-Boot] [PATCH] powerpc: Add cpu_late_init_r to allow for initialization post env setup
On Feb 2, 2011, at 11:53 AM, Haiying Wang wrote:
On Wed, 2011-02-02 at 11:27 -0600, Kumar Gala wrote:
+void cpu_late_init_r(void)
+{
+#ifdef CONFIG_QE
+uint qe_base = CONFIG_SYS_IMMR + 0x0008; /* QE immr base */
+qe_init(qe_base);
+qe_reset();
+#endif
+}
You did not move qe_reset() inside qe_init() as you recommended.:)
Yeah, forgot about that. Part of this was to see what response the patch got
(ie is this even acceptable).
For NAND boot case, the microcode needs to be read from nand flash via
nand_read first, so you might add some more code like:
+void cpu_late_init_r(void)
+{
+#ifdef CONFIG_QE
+#ifdef CONFIG_SYS_QE_FW_IN_NAND
+ int ret;
+ size_t fw_length = CONFIG_SYS_QE_FW_LENGTH;
+ /* load QE firmware from NAND flash to DDR first */
+ ret = nand_read(nand_info[0],(loff_t)CONFIG_SYS_QE_FW_IN_NAND,
+ fw_length, (u_char *)CONFIG_SYS_QE_FW_ADDR);
+ if (ret ret == -EUCLEAN) {
+ printf (NAND read for QE firmware at offset %x failed %
d\n,
+ CONFIG_SYS_QE_FW_IN_NAND, ret);
+ }
+#endif
+ uint qe_base = CONFIG_SYS_IMMR + 0x0008; /* QE immr base */
+ qe_init(qe_base);
+ qe_reset();
+#endif
+}
Haiying
I leave that to you when we add a board (like P1021 MDS) that needs boot from
NAND.
- k
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