Re: [U-Boot] [PATCH] spi: add support SuperH SPI module
Dear Yoshihiro Shimoda, In message 4d33c089.8040...@renesas.com you wrote: SH7757 has SPI module. This patch supports it. Signed-off-by: Yoshihiro Shimoda yoshihiro.shimoda...@renesas.com --- drivers/spi/Makefile |1 + drivers/spi/sh_spi.c | 295 ++ 2 files changed, 296 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/sh_spi.c diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index e34a124..d582fbb 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -37,6 +37,7 @@ COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o +COBJS-$(CONFIG_SH_SPI) += sh_spi.o Please keep list sorted. diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c new file mode 100644 index 000..89ea5e2 --- /dev/null +++ b/drivers/spi/sh_spi.c ... +#define SPI_TBR 0x00 +#define SPI_RBR 0x00 +#define SPI_CR1 0x08 +#define SPI_CR2 0x10 +#define SPI_CR3 0x18 +#define SPI_CR4 0x20 Please declare a poper C struct instead. +/* CR1 */ +#define SPI_TBE 0x80 +#define SPI_TBF 0x40 +#define SPI_RBE 0x20 +#define SPI_RBF 0x10 +#define SPI_PFONRD 0x08 +#define SPI_SSDB 0x04 +#define SPI_SSD 0x02 +#define SPI_SSA 0x01 + +/* CR2 */ +#define SPI_RSTF 0x80 +#define SPI_LOOPBK 0x40 +#define SH_SPI_CPOL 0x20 +#define SH_SPI_CPHA 0x10 +#define SPI_L1M0 0x08 + +/* CR3 */ +#define SPI_MAX_BYTE 0xFF + +/* CR4 */ +#define SPI_TBEI 0x80 +#define SPI_TBFI 0x40 +#define SPI_RBEI 0x20 +#define SPI_RBFI 0x10 +#define SPI_WPABRT 0x04 +#define SPI_SSS 0x01 + +#define SPI_FIFO_SIZE32 All this stuff should better go into a separate header file. +static void sh_spi_write(unsigned long data, unsigned long offset) +{ + writel(data, CONFIG_SH_SPI_BASE + offset); NAK. We do not allow the base + offset notation. Pleaseuse a proper C struct instead. Please fix globally. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de When the only tool you have is a hammer, you tend to treat everything as if it were a nail.- Abraham Maslow ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] spi: add support SuperH SPI module
Hi, Shioda-san. 2011/1/17 Yoshihiro Shimoda yoshihiro.shimoda...@renesas.com: SH7757 has SPI module. This patch supports it. Signed-off-by: Yoshihiro Shimoda yoshihiro.shimoda...@renesas.com --- drivers/spi/Makefile | 1 + drivers/spi/sh_spi.c | 295 ++ 2 files changed, 296 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/sh_spi.c diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index e34a124..d582fbb 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -37,6 +37,7 @@ COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o +COBJS-$(CONFIG_SH_SPI) += sh_spi.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c new file mode 100644 index 000..89ea5e2 --- /dev/null +++ b/drivers/spi/sh_spi.c @@ -0,0 +1,295 @@ +/* + * SH SPI driver + * + * Copyright (C) 2011 Renesas Solutions Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + */ + +#include common.h +#include malloc.h +#include spi.h +#include asm/io.h + +#define SPI_TBR 0x00 +#define SPI_RBR 0x00 +#define SPI_CR1 0x08 +#define SPI_CR2 0x10 +#define SPI_CR3 0x18 +#define SPI_CR4 0x20 + +/* CR1 */ +#define SPI_TBE 0x80 +#define SPI_TBF 0x40 +#define SPI_RBE 0x20 +#define SPI_RBF 0x10 +#define SPI_PFONRD 0x08 +#define SPI_SSDB 0x04 +#define SPI_SSD 0x02 +#define SPI_SSA 0x01 + +/* CR2 */ +#define SPI_RSTF 0x80 +#define SPI_LOOPBK 0x40 +#define SH_SPI_CPOL 0x20 +#define SH_SPI_CPHA 0x10 +#define SPI_L1M0 0x08 + +/* CR3 */ +#define SPI_MAX_BYTE 0xFF + +/* CR4 */ +#define SPI_TBEI 0x80 +#define SPI_TBFI 0x40 +#define SPI_RBEI 0x20 +#define SPI_RBFI 0x10 +#define SPI_WPABRT 0x04 +#define SPI_SSS 0x01 + +#define SPI_FIFO_SIZE 32 + Please add prefix of SH_. +static void sh_spi_write(unsigned long data, unsigned long offset) +{ + writel(data, CONFIG_SH_SPI_BASE + offset); +} + snip \ + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return 1; +} Why does this function return 1 every time? + +void spi_cs_activate(struct spi_slave *slave) +{ + +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + +} + -- 1.7.1 Best regards, Nobuhiro -- Nobuhiro Iwamatsu iwamatsu at {nigauri.org / debian.org} GPG ID: 40AD1FA6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] spi: add support SuperH SPI module
Hi, Iwamatsu-san, Thank you for your review. 2011/01/17 19:28, Nobuhiro Iwamatsu wrote: Hi, Shioda-san. 2011/1/17 Yoshihiro Shimoda yoshihiro.shimoda...@renesas.com: +#define SPI_TBR0x00 +#define SPI_RBR0x00 +#define SPI_CR10x08 +#define SPI_CR20x10 +#define SPI_CR30x18 +#define SPI_CR40x20 snip Please add prefix of SH_. Yes, I will add it. +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return 1; +} Why does this function return 1 every time? Oh, it's temporary code. I will fix this function. Best regards, Yoshihiro Shimoda ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] spi: add support SuperH SPI module
SH7757 has SPI module. This patch supports it. Signed-off-by: Yoshihiro Shimoda yoshihiro.shimoda...@renesas.com --- drivers/spi/Makefile |1 + drivers/spi/sh_spi.c | 295 ++ 2 files changed, 296 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/sh_spi.c diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index e34a124..d582fbb 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -37,6 +37,7 @@ COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o +COBJS-$(CONFIG_SH_SPI) += sh_spi.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c new file mode 100644 index 000..89ea5e2 --- /dev/null +++ b/drivers/spi/sh_spi.c @@ -0,0 +1,295 @@ +/* + * SH SPI driver + * + * Copyright (C) 2011 Renesas Solutions Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + */ + +#include common.h +#include malloc.h +#include spi.h +#include asm/io.h + +#define SPI_TBR0x00 +#define SPI_RBR0x00 +#define SPI_CR10x08 +#define SPI_CR20x10 +#define SPI_CR30x18 +#define SPI_CR40x20 + +/* CR1 */ +#define SPI_TBE0x80 +#define SPI_TBF0x40 +#define SPI_RBE0x20 +#define SPI_RBF0x10 +#define SPI_PFONRD 0x08 +#define SPI_SSDB 0x04 +#define SPI_SSD0x02 +#define SPI_SSA0x01 + +/* CR2 */ +#define SPI_RSTF 0x80 +#define SPI_LOOPBK 0x40 +#define SH_SPI_CPOL0x20 +#define SH_SPI_CPHA0x10 +#define SPI_L1M0 0x08 + +/* CR3 */ +#define SPI_MAX_BYTE 0xFF + +/* CR4 */ +#define SPI_TBEI 0x80 +#define SPI_TBFI 0x40 +#define SPI_RBEI 0x20 +#define SPI_RBFI 0x10 +#define SPI_WPABRT 0x04 +#define SPI_SSS0x01 + +#define SPI_FIFO_SIZE 32 + +static void sh_spi_write(unsigned long data, unsigned long offset) +{ + writel(data, CONFIG_SH_SPI_BASE + offset); +} + +static unsigned long sh_spi_read(unsigned long offset) +{ + return readl(CONFIG_SH_SPI_BASE + offset); +} + +static void sh_spi_set_bit(unsigned long val, unsigned long offset) +{ + unsigned long tmp; + + tmp = sh_spi_read(offset); + tmp |= val; + sh_spi_write(tmp, offset); +} + +static void sh_spi_clear_bit(unsigned long val, unsigned long offset) +{ + unsigned long tmp; + + tmp = sh_spi_read(offset); + tmp = ~val; + sh_spi_write(tmp, offset); +} + +static void clear_fifo(void) +{ + sh_spi_set_bit(SPI_RSTF, SPI_CR2); + sh_spi_clear_bit(SPI_RSTF, SPI_CR2); +} + +static int recvbuf_wait(void) +{ + while (sh_spi_read(SPI_CR1) SPI_RBE) { + if (ctrlc()) + return 1; + udelay(10); + } + return 0; +} + +static int write_fifo_full_wait(void) +{ + while (sh_spi_read(SPI_CR1) SPI_TBF) { + udelay(10); + if (ctrlc()) + return 1; + } + return 0; +} + +static int write_fifo_empty_wait(void) +{ + while (!(sh_spi_read(SPI_CR1) SPI_TBE)) { + if (ctrlc()) + return 1; + udelay(10); + } + return 0; +} + +void spi_init(void) +{ + +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct spi_slave *slave; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + slave = malloc(sizeof(struct spi_slave)); + if (!slave) + return NULL; + + slave-bus = bus; + slave-cs = cs; + + /* SPI sycle stop */ + sh_spi_write(0xfe, SPI_CR1); + /* CR1 init */ + sh_spi_write(0x00, SPI_CR1); + /* CR3 init */ + sh_spi_write(0x00, SPI_CR3); + + clear_fifo(); + + /* 1/8 clock */ + sh_spi_write(sh_spi_read(SPI_CR2) | 0x07, SPI_CR2); + udelay(10); + + return slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + free(slave); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + return 0; +} + +void