Re: [U-Boot] [PATCH 05/17] LEON3: added memory controller initialization using the new AMBA PnP routines.
Dear Daniel Hellstrom, In message <1274194143-8994-4-git-send-email-dan...@gaisler.com> you wrote: > Signed-off-by: Daniel Hellstrom > --- > arch/sparc/cpu/leon3/Makefile |5 +- > arch/sparc/cpu/leon3/memcfg.c | 276 > + > arch/sparc/cpu/leon3/memcfg.h | 106 ++ > arch/sparc/cpu/leon3/memcfg_low.S | 270 > arch/sparc/cpu/leon3/start.S | 36 + > include/configs/gr_cpci_ax2000.h | 27 ++-- > include/configs/gr_ep2s60.h | 32 +++-- > include/configs/gr_xc3s_1500.h| 23 ++-- > include/configs/grsim.h | 27 ++-- > 9 files changed, 754 insertions(+), 48 deletions(-) > create mode 100644 arch/sparc/cpu/leon3/memcfg.c > create mode 100644 arch/sparc/cpu/leon3/memcfg.h > create mode 100644 arch/sparc/cpu/leon3/memcfg_low.S > > diff --git a/arch/sparc/cpu/leon3/Makefile b/arch/sparc/cpu/leon3/Makefile > index d8f89bc..f1bb808 100644 > --- a/arch/sparc/cpu/leon3/Makefile > +++ b/arch/sparc/cpu/leon3/Makefile > @@ -26,8 +26,9 @@ include $(TOPDIR)/config.mk > LIB = $(obj)lib$(CPU).a > > START= start.o > -SOBJS= ambapp_low.o ambapp_low_c.o > -COBJS= cpu_init.o serial.o cpu.o ambapp.o interrupts.o prom.o > usb_uhci.o > +SOBJS= ambapp_low.o ambapp_low_c.o memcfg_low.o > +COBJS= cpu_init.o serial.o cpu.o ambapp.o interrupts.o prom.o > usb_uhci.o \ > + memcfg.o Please sort lists. > SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) > OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) > diff --git a/arch/sparc/cpu/leon3/memcfg.c b/arch/sparc/cpu/leon3/memcfg.c > new file mode 100644 > index 000..4a9bded > --- /dev/null > +++ b/arch/sparc/cpu/leon3/memcfg.c > @@ -0,0 +1,276 @@ > +/* GRLIB Memory controller setup. The register values are used > + * from the associated low level assembler routine implemented > + * in memcfg_low.S. Please apply all review comments to the previous patch here, too (white space, multiline comment style, brace style, etc.) Ditto for your other patches. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Vor allem kein Gedanke! Nichts ist kompromittierender als ein Gedan- ke!- Friedrich Wilhelm Nietzsche _Der Fall Wagner_ (1888) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 05/17] LEON3: added memory controller initialization using the new AMBA PnP routines.
Signed-off-by: Daniel Hellstrom
---
arch/sparc/cpu/leon3/Makefile |5 +-
arch/sparc/cpu/leon3/memcfg.c | 276 +
arch/sparc/cpu/leon3/memcfg.h | 106 ++
arch/sparc/cpu/leon3/memcfg_low.S | 270
arch/sparc/cpu/leon3/start.S | 36 +
include/configs/gr_cpci_ax2000.h | 27 ++--
include/configs/gr_ep2s60.h | 32 +++--
include/configs/gr_xc3s_1500.h| 23 ++--
include/configs/grsim.h | 27 ++--
9 files changed, 754 insertions(+), 48 deletions(-)
create mode 100644 arch/sparc/cpu/leon3/memcfg.c
create mode 100644 arch/sparc/cpu/leon3/memcfg.h
create mode 100644 arch/sparc/cpu/leon3/memcfg_low.S
diff --git a/arch/sparc/cpu/leon3/Makefile b/arch/sparc/cpu/leon3/Makefile
index d8f89bc..f1bb808 100644
--- a/arch/sparc/cpu/leon3/Makefile
+++ b/arch/sparc/cpu/leon3/Makefile
@@ -26,8 +26,9 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(CPU).a
START = start.o
-SOBJS = ambapp_low.o ambapp_low_c.o
-COBJS = cpu_init.o serial.o cpu.o ambapp.o interrupts.o prom.o usb_uhci.o
+SOBJS = ambapp_low.o ambapp_low_c.o memcfg_low.o
+COBJS = cpu_init.o serial.o cpu.o ambapp.o interrupts.o prom.o usb_uhci.o \
+ memcfg.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/arch/sparc/cpu/leon3/memcfg.c b/arch/sparc/cpu/leon3/memcfg.c
new file mode 100644
index 000..4a9bded
--- /dev/null
+++ b/arch/sparc/cpu/leon3/memcfg.c
@@ -0,0 +1,276 @@
+/* GRLIB Memory controller setup. The register values are used
+ * from the associated low level assembler routine implemented
+ * in memcfg_low.S.
+ *
+ * (C) Copyright 2010
+ * Daniel Hellstrom, Aeroflex Gaisler, dan...@gaisler.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include
+#include "memcfg.h"
+#include
+
+#ifdef CONFIG_SYS_GRLIB_ESA_MCTRL1
+struct mctrl_setup esa_mctrl1_cfg =
+{
+ .reg_mask = 0x7,
+ .regs =
+ {
+ {
+ .mask = 0x0300,
+ .value = CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3,
+ },
+ }
+};
+#ifdef CONFIG_SYS_GRLIB_ESA_MCTRL2
+struct mctrl_setup esa_mctrl2_cfg =
+{
+ .reg_mask = 0x7,
+ .regs =
+ {
+ {
+ .mask = 0x0300,
+ .value = CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG1,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG2,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG3,
+ },
+ }
+};
+#endif
+#endif
+
+#ifdef CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
+struct mctrl_setup gaisler_ftmctrl1_cfg =
+{
+ .reg_mask = 0x7,
+ .regs =
+ {
+ {
+ .mask = 0x0300,
+ .value = CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3,
+ },
+ }
+};
+#ifdef CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2
+struct mctrl_setup gaisler_ftmctrl2_cfg =
+{
+ .reg_mask = 0x7,
+ .regs =
+ {
+ {
+ .mask = 0x0300,
+ .value = CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG1,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG2,
+ },
+ {
+ .mask = 0x,
+
[U-Boot] [PATCH 05/17] LEON3: added memory controller initialization using the new AMBA PnP routines.
Signed-off-by: Daniel Hellstrom
---
cpu/leon3/Makefile |5 +-
cpu/leon3/memcfg.c | 276 ++
cpu/leon3/memcfg.h | 106 +++
cpu/leon3/memcfg_low.S | 270 +
cpu/leon3/start.S| 36 +
include/configs/gr_cpci_ax2000.h | 27 ++--
include/configs/gr_ep2s60.h | 32 +++--
include/configs/gr_xc3s_1500.h | 23 ++--
include/configs/grsim.h | 27 +++--
9 files changed, 754 insertions(+), 48 deletions(-)
create mode 100644 cpu/leon3/memcfg.c
create mode 100644 cpu/leon3/memcfg.h
create mode 100644 cpu/leon3/memcfg_low.S
diff --git a/cpu/leon3/Makefile b/cpu/leon3/Makefile
index d8f89bc..f1bb808 100644
--- a/cpu/leon3/Makefile
+++ b/cpu/leon3/Makefile
@@ -26,8 +26,9 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(CPU).a
START = start.o
-SOBJS = ambapp_low.o ambapp_low_c.o
-COBJS = cpu_init.o serial.o cpu.o ambapp.o interrupts.o prom.o usb_uhci.o
+SOBJS = ambapp_low.o ambapp_low_c.o memcfg_low.o
+COBJS = cpu_init.o serial.o cpu.o ambapp.o interrupts.o prom.o usb_uhci.o \
+ memcfg.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/leon3/memcfg.c b/cpu/leon3/memcfg.c
new file mode 100644
index 000..83e55e4
--- /dev/null
+++ b/cpu/leon3/memcfg.c
@@ -0,0 +1,276 @@
+/* GRLIB Memory controller setup. The register values are used
+ * from the associated low level assembler routine implemented
+ * in memcfg_low.S.
+ *
+ * (C) Copyright 2010
+ * Daniel Hellstrom, Aeroflex Gaisler, dan...@gaisler.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include
+#include "memcfg.h"
+#include
+
+#ifdef CONFIG_SYS_GRLIB_ESA_MCTRL1
+struct mctrl_setup esa_mctrl1_cfg =
+{
+ .reg_mask = 0x7,
+ .regs =
+ {
+ {
+ .mask = 0x0300,
+ .value = CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3,
+ },
+ }
+};
+#ifdef CONFIG_SYS_GRLIB_ESA_MCTRL2
+struct mctrl_setup esa_mctrl2_cfg =
+{
+ .reg_mask = 0x7,
+ .regs =
+ {
+ {
+ .mask = 0x0300,
+ .value = CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG1,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG2,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_ESA_MCTRL2_CFG3,
+ },
+ }
+};
+#endif
+#endif
+
+#ifdef CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
+struct mctrl_setup gaisler_ftmctrl1_cfg =
+{
+ .reg_mask = 0x7,
+ .regs =
+ {
+ {
+ .mask = 0x0300,
+ .value = CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3,
+ },
+ }
+};
+#ifdef CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2
+struct mctrl_setup gaisler_ftmctrl2_cfg =
+{
+ .reg_mask = 0x7,
+ .regs =
+ {
+ {
+ .mask = 0x0300,
+ .value = CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG1,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG2,
+ },
+ {
+ .mask = 0x,
+ .value = CONFIG_SYS_GRLIB_GAISLER_FTMCTRL2_CFG3,
+ },
+ }
