Re: [U-Boot] [PATCH 08/28] SPEAr : FSMC driver support added

2010-07-15 Thread Wolfgang Denk
Dear Vipin KUMAR,

In message 1279084204-3263-9-git-send-email-vipin.ku...@st.com you wrote:
 From: Vipin KUMAR vipin.ku...@st.com
 
 Flexible static memory controller is a peripheral provided by ST,
 which controls the access to NAND chips along with many other
 memory device chips eg NOR, SRAM.
 
 This patch adds the driver support for FSMC controller interfacing
 with NAND memory.
 
 Signed-off-by: Vipin Kumar vipin.ku...@st.com
...
 +static void fsmc_nand_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl)
 +{
 + struct nand_chip *this = mtd-priv;
 + ulong IO_ADDR_W;

We don't allow for CAPITAL C identifiers - these are reserved for
macros.


Best regards,

Wolfgang Denk

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[U-Boot] [PATCH 08/28] SPEAr : FSMC driver support added

2010-07-13 Thread Vipin KUMAR
From: Vipin KUMAR vipin.ku...@st.com

Flexible static memory controller is a peripheral provided by ST,
which controls the access to NAND chips along with many other
memory device chips eg NOR, SRAM.

This patch adds the driver support for FSMC controller interfacing
with NAND memory.

Signed-off-by: Vipin Kumar vipin.ku...@st.com
---
 drivers/mtd/nand/Makefile |1 +
 drivers/mtd/nand/fsmc_nand.c  |  401 +
 include/linux/mtd/fsmc_nand.h |  108 +++
 3 files changed, 510 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/nand/fsmc_nand.c
 create mode 100644 include/linux/mtd/fsmc_nand.h

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 28f27da..4c6b54f 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -38,6 +38,7 @@ COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
 COBJS-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
 COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
+COBJS-$(CONFIG_NAND_FSMC) += fsmc_nand.o
 COBJS-$(CONFIG_NAND_KB9202) += kb9202_nand.o
 COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
 COBJS-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
new file mode 100644
index 000..314db16
--- /dev/null
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -0,0 +1,401 @@
+/*
+ * (C) Copyright 2010
+ * Vipin Kumar, ST Micoelectronics, vipin.ku...@st.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include nand.h
+#include asm/io.h
+#include linux/bitops.h
+#include linux/err.h
+#include linux/mtd/nand_ecc.h
+#include linux/mtd/fsmc_nand.h
+#include asm/arch/hardware.h
+
+static u32 fsmc_version;
+static struct fsmc_regs *const fsmc_regs_p =
+(struct fsmc_regs *)CONFIG_SYS_FSMC_BASE;
+
+/*
+ * ECC4 and ECC1 have 13 bytes and 3 bytes of ecc respectively for 512 bytes of
+ * data. ECC4 can correct up to 8 bits in 512 bytes of data while ECC1 can
+ * correct 1 bit in 512 bytes
+ */
+
+static struct nand_ecclayout fsmc_ecc4_lp_layout = {
+   .eccbytes = 104,
+   .eccpos = {  2,   3,   4,   5,   6,   7,   8,
+   9,  10,  11,  12,  13,  14,
+   18,  19,  20,  21,  22,  23,  24,
+   25,  26,  27,  28,  29,  30,
+   34,  35,  36,  37,  38,  39,  40,
+   41,  42,  43,  44,  45,  46,
+   50,  51,  52,  53,  54,  55,  56,
+   57,  58,  59,  60,  61,  62,
+   66,  67,  68,  69,  70,  71,  72,
+   73,  74,  75,  76,  77,  78,
+   82,  83,  84,  85,  86,  87,  88,
+   89,  90,  91,  92,  93,  94,
+   98,  99, 100, 101, 102, 103, 104,
+   105, 106, 107, 108, 109, 110,
+   114, 115, 116, 117, 118, 119, 120,
+   121, 122, 123, 124, 125, 126
+   },
+   .oobfree = {
+   {.offset = 15, .length = 3},
+   {.offset = 31, .length = 3},
+   {.offset = 47, .length = 3},
+   {.offset = 63, .length = 3},
+   {.offset = 79, .length = 3},
+   {.offset = 95, .length = 3},
+   {.offset = 111, .length = 3},
+   {.offset = 127, .length = 1}
+   }
+};
+
+/*
+ * ECC placement definitions in oobfree type format
+ * There are 13 bytes of ecc for every 512 byte block and it has to be read
+ * consecutively and immediately after the 512 byte data block for hardware to
+ * generate the error bit offsets in 512 byte data
+ * Managing the ecc bytes in the following way makes it easier for software to
+ * read ecc bytes consecutive to data bytes. This way is similar to
+ * oobfree structure maintained already in u-boot nand driver
+ */
+static struct fsmc_eccplace fsmc_eccpl_lp = {
+   .eccplace = {
+   {.offset = 2, .length = 13},
+   {.offset = 18, .length = 13},
+   {.offset = 34, .length = 13},
+   {.offset = 50, .length = 13},
+   {.offset = 66, .length = 13},
+   {.offset = 82, .length = 13},
+   {.offset = 98, .length = 13},
+   {.offset = 114, .length = 13}
+