Re: [U-Boot] [PATCH 1/1] i.MX31: switch to CFG_HZ=1000

2008-09-21 Thread Wolfgang Denk
Dear Jean-Christophe,

in message [EMAIL PROTECTED]
Guennadi Liakhovetski wrote:
 
 I still don't understand the purpose of this post. The patch has been 
 posted by the author to the list, you are the subsystem custodian. I 
 think, you have mainly three possibilities now:
 
 1. you are happy with the patch, you add your Sob, pull it into your tree 
 and ask Wolfgang to pull from it.

Actually I think that no Sob is required if a patch gets applied
without any changes.

 2. you have minor corrections to the patch. You may correct them yourself, 
 add your Sob, re-post to the list and to the original author _specifying_ 
 in the comments section, what you have changed and asking the original 
 author if he agrees with the changes, if they are non-trivial.
 
 3. comment back on the patch and ask the author to fix the issues and 
 re-submit.

Agreed.

 What you have done is you modified the patch, sent it back to the list and 
 the author without your Sob and without explaining what and why you 
 modified.

This is indeed not the way it should be done.

Jean-Christophe, please fix.

Best regards,

Wolfgang Denk

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[U-Boot] [PATCH 1/1] i.MX31: switch to CFG_HZ=1000

2008-09-16 Thread Jean-Christophe PLAGNIOL-VILLARD
From: Guennadi Liakhovetski [EMAIL PROTECTED]

Switch to the standard CFG_HZ=1000 value, while at it, minor white-space
cleanup, remove CFG_CLKS_IN_HZ from config-headers. Tested on mx31ads,
provides 2% or 0.4% precision depending on the
CONFIG_MX31_TIMER_HIGH_PRECISION flag. Measured with stop-watch on 100s
boot-delay.

Signed-off-by: Guennadi Liakhovetski [EMAIL PROTECTED]
---
 cpu/arm1136/mx31/interrupts.c   |   81 --
 include/configs/imx31_litekit.h |4 +-
 include/configs/imx31_phycore.h |2 +-
 include/configs/mx31ads.h   |4 +-
 4 files changed, 54 insertions(+), 37 deletions(-)

diff --git a/cpu/arm1136/mx31/interrupts.c b/cpu/arm1136/mx31/interrupts.c
index 6e08c71..4515147 100644
--- a/cpu/arm1136/mx31/interrupts.c
+++ b/cpu/arm1136/mx31/interrupts.c
@@ -27,30 +27,49 @@
 #define TIMER_BASE 0x53f9 /* General purpose timer 1 */
 
 /* General purpose timers registers */
-#define GPTCR   __REG(TIMER_BASE) /* Control register */
-#define GPTPR  __REG(TIMER_BASE + 0x4) /* Prescaler register */
-#define GPTSR   __REG(TIMER_BASE + 0x8) /* Status register */
-#define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
+#define GPTCR  __REG(TIMER_BASE)   /* Control register */
+#define GPTPR  __REG(TIMER_BASE + 0x4) /* Prescaler register   */
+#define GPTSR  __REG(TIMER_BASE + 0x8) /* Status register  */
+#define GPTCNT __REG(TIMER_BASE + 0x24)/* Counter register */
 
 /* General purpose timers bitfields */
-#define GPTCR_SWR   (115) /* Software reset */
-#define GPTCR_FRR   (19)  /* Freerun / restart */
-#define GPTCR_CLKSOURCE_32 (46)  /* Clock source */
-#define GPTCR_TEN   (1) /* Timer enable */
+#define GPTCR_SWR  (1  15)   /* Software reset   */
+#define GPTCR_FRR  (1  9)/* Freerun / restart*/
+#define GPTCR_CLKSOURCE_32 (4  6)/* Clock source */
+#define GPTCR_TEN  (1) /* Timer enable */
+
+/* time is measured in 1 / CFG_HZ seconds, tick is internal timer period */
+#ifdef CONFIG_MX31_TIMER_HIGH_PRECISION
+/* ~0.4% error - measured with stop-watch on 100s boot-delay */
+#define TICK_TO_TIME(t)((t) * CFG_HZ / CONFIG_MX31_CLK32)
+#define TIME_TO_TICK(t)((unsigned long long)(t) * CONFIG_MX31_CLK32 / 
CFG_HZ)
+#define US_TO_TICK(t)  (((unsigned long long)(t) * CONFIG_MX31_CLK32 + \
+   99) / 100)
+#else
+/* ~2% error */
+#define TICK_PER_TIME  ((CONFIG_MX31_CLK32 + CFG_HZ / 2) / CFG_HZ)
+#define US_PER_TICK(100 / CONFIG_MX31_CLK32)
+#define TICK_TO_TIME(t)((t) / TICK_PER_TIME)
+#define TIME_TO_TICK(t)((unsigned long long)(t) * TICK_PER_TIME)
+#define US_TO_TICK(t)  (((t) + US_PER_TICK - 1) / US_PER_TICK)
+#endif
 
 static ulong timestamp;
 static ulong lastinc;
 
 /* nothing really to do with interrupts, just starts up a counter. */
+/* The 32768Hz 32-bit timer overruns in 131072 seconds */
 int interrupt_init (void)
 {
int i;
 
/* setup GP Timer 1 */
GPTCR = GPTCR_SWR;
-   for ( i=0; i100; i++) GPTCR = 0; /* We have no udelay by now */
+   for (i = 0; i  100; i++)
+   GPTCR = 0; /* We have no udelay by now */
GPTPR = 0; /* 32Khz */
-   GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN; /* Freerun Mode, PERCLK1 input 
*/
+   /* Freerun Mode, PERCLK1 input */
+   GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
 
return 0;
 }
@@ -67,9 +86,9 @@ void reset_timer(void)
reset_timer_masked();
 }
 
-ulong get_timer_masked (void)
+unsigned long long get_ticks (void)
 {
-   ulong now = GPTCNT; /* current tick value */
+   ulong now = GPTCNT;
 
if (now = lastinc) /* normal mode (non roll) */
/* move stamp forward with absolut diff ticks */
@@ -80,6 +99,17 @@ ulong get_timer_masked (void)
return timestamp;
 }
 
+ulong get_timer_masked (void)
+{
+   /*
+* get_ticks() returns a long long (64 bit), it wraps in
+* 2^64 / CONFIG_MX31_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
+* 5 * 10^9 days... and get_ticks() * CFG_HZ wraps in
+* 5 * 10^6 days - long enough.
+*/
+   return TICK_TO_TIME(get_ticks());
+}
+
 ulong get_timer (ulong base)
 {
return get_timer_masked () - base;
@@ -87,29 +117,20 @@ ulong get_timer (ulong base)
 
 void set_timer (ulong t)
 {
+   timestamp = TIME_TO_TICK(t);
 }
 
 /* delay x useconds AND perserve advance timstamp value */
 void udelay (unsigned long usec)
 {
-   ulong tmo, tmp;
-
-   if (usec = 1000) { /* if big number, spread 
normalization to seconds */
-   tmo = usec / 1000;  /* start to normalize for usec 
to ticks per sec */
-   tmo *= CFG_HZ;  /* find number of ticks to 
wait to achieve target */
-   tmo /= 1000;/* finish normalize.