Re: [U-Boot] [PATCH 1/2] spi: microblaze: Adds driver for Xilinx SPI controller

2012-07-30 Thread Michal Simek 

On 07/29/2012 12:25 AM, Stephan Linz wrote:

This is an improved version of the driver patch original
submitted by Graeme Smecher 

The changes are:
 - remove hard coded Xilinx BSP defines (XPAR_SPI_*) and
   use CONFIG_SYS_SPI_BASE from config.h instead
 - add extensive register struct definitions
 - remove offset calculation for register access and
   use the new register struct instead
 - move default SPI controller configuration from
   spi_setup_slave() to spi_claim_bus()
 - add spi_set_speed()
 - insert SPI controller deactivation in spi_release_bus()
 - protect while loops in spi_xfer() with counter / timeouts
 - support SPI mode flags: LSB_FIRST, CPHA, CPOL, LOOP

Come from:
 http://patchwork.ozlabs.org/patch/71797/

Signed-off-by: Stephan Linz 
---
v2: Remove useles information from commit message
 Add newline and split variable declaration from code


Should be v2 in subject but
I have tested and applied to microblaze custodian repo.

Thanks,
Michal


--
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
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[U-Boot] [PATCH 1/2] spi: microblaze: Adds driver for Xilinx SPI controller

2012-07-28 Thread Stephan Linz 
This is an improved version of the driver patch original
submitted by Graeme Smecher 

The changes are:
- remove hard coded Xilinx BSP defines (XPAR_SPI_*) and
  use CONFIG_SYS_SPI_BASE from config.h instead
- add extensive register struct definitions
- remove offset calculation for register access and
  use the new register struct instead
- move default SPI controller configuration from
  spi_setup_slave() to spi_claim_bus()
- add spi_set_speed()
- insert SPI controller deactivation in spi_release_bus()
- protect while loops in spi_xfer() with counter / timeouts
- support SPI mode flags: LSB_FIRST, CPHA, CPOL, LOOP

Come from:
http://patchwork.ozlabs.org/patch/71797/

Signed-off-by: Stephan Linz 
---
v2: Remove useles information from commit message
Add newline and split variable declaration from code
---
 drivers/spi/Makefile |1 +
 drivers/spi/xilinx_spi.c |  214 ++
 drivers/spi/xilinx_spi.h |  135 +
 3 files changed, 350 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/xilinx_spi.c
 create mode 100644 drivers/spi/xilinx_spi.h

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index c967d87..3ae38e5 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -44,6 +44,7 @@ COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
 COBJS-$(CONFIG_SH_SPI) += sh_spi.o
 COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
 COBJS-$(CONFIG_TEGRA2_SPI) += tegra2_spi.o
+COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
new file mode 100644
index 000..e563c19
--- /dev/null
+++ b/drivers/spi/xilinx_spi.c
@@ -0,0 +1,214 @@
+/*
+ * Xilinx SPI driver
+ *
+ * supports 8 bit SPI transfers only, with or w/o FIFO
+ *
+ * based on bfin_spi.c, by way of altera_spi.c
+ * Copyright (c) 2005-2008 Analog Devices Inc.
+ * Copyright (c) 2010 Thomas Chou 
+ * Copyright (c) 2010 Graeme Smecher 
+ * Copyright (c) 2012 Stephan Linz 
+ *
+ * Licensed under the GPL-2 or later.
+ *
+ * [0]: http://www.xilinx.com/support/documentation
+ *
+ * [S]:[0]/ip_documentation/xps_spi.pdf
+ * [0]/ip_documentation/axi_spi_ds742.pdf
+ */
+#include 
+#include 
+#include 
+#include 
+
+#include "xilinx_spi.h"
+
+#ifndef CONFIG_SYS_XILINX_SPI_LIST
+#define CONFIG_SYS_XILINX_SPI_LIST { CONFIG_SYS_SPI_BASE }
+#endif
+
+#ifndef CONFIG_XILINX_SPI_IDLE_VAL
+#define CONFIG_XILINX_SPI_IDLE_VAL 0xff
+#endif
+
+#define XILSPI_SPICR_DFLT_ON   (SPICR_MANUAL_SS | \
+SPICR_MASTER_MODE | \
+SPICR_SPE)
+
+#define XILSPI_SPICR_DFLT_OFF  (SPICR_MASTER_INHIBIT | \
+SPICR_MANUAL_SS)
+
+#define XILSPI_MAX_XFER_BITS   8
+
+static unsigned long xilinx_spi_base_list[] = CONFIG_SYS_XILINX_SPI_LIST;
+
+__attribute__((weak))
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+   return bus < ARRAY_SIZE(xilinx_spi_base_list) && cs < 32;
+}
+
+__attribute__((weak))
+void spi_cs_activate(struct spi_slave *slave)
+{
+   struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave);
+
+   writel(SPISSR_ACT(slave->cs), &xilspi->regs->spissr);
+}
+
+__attribute__((weak))
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+   struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave);
+
+   writel(SPISSR_OFF, &xilspi->regs->spissr);
+}
+
+void spi_init(void)
+{
+   /* do nothing */
+}
+
+void spi_set_speed(struct spi_slave *slave, uint hz)
+{
+   /* xilinx spi core does not support programmable speed */
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+   struct xilinx_spi_slave *xilspi;
+   struct xilinx_spi_reg *regs;
+
+   if (!spi_cs_is_valid(bus, cs)) {
+   printf("XILSPI error: %s: unsupported bus %d / cs %d\n",
+   __func__, bus, cs);
+   return NULL;
+   }
+
+   xilspi = malloc(sizeof(*xilspi));
+   if (!xilspi) {
+   printf("XILSPI error: %s: malloc of SPI structure failed\n",
+   __func__);
+   return NULL;
+   }
+   xilspi->slave.bus = bus;
+   xilspi->slave.cs = cs;
+   xilspi->regs = (struct xilinx_spi_reg *)xilinx_spi_base_list[bus];
+   xilspi->freq = max_hz;
+   xilspi->mode = mode;
+   debug("%s: bus:%i cs:%i base:%p mode:%x max_hz:%d\n", __func__,
+   bus, cs, xilspi->regs, xilspi->mode, xilspi->freq);
+
+   return &xilspi->slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+   struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave);
+
+   free(xilspi);
+}
+
+int spi_claim_bus(struct spi_slave *slave)
+{
+   struct xilinx_spi_slave *xilspi =

Re: [U-Boot] [PATCH 1/2] spi: microblaze: Adds driver for Xilinx SPI controller

2012-07-28 Thread Stephan Linz 
Hi Michal,

I'll resubmit a new patch which fixes your notes.

br,
Stephan

Am Dienstag, den 24.07.2012, 12:56 +0200 schrieb Michal Simek: 
> On 07/14/2012 12:30 AM, Stephan Linz wrote:
> > This is an improved version of the driver patch original
> > submitted by Graeme Smecher 
> >
> > The changes are:
> >  - remove hard coded Xilinx BSP defines (XPAR_SPI_*) and
> >use CONFIG_SYS_SPI_BASE from config.h instead
> >  - add extensive register struct definitions
> >  - remove offset calculation for register access and
> >use the new register struct instead
> >  - move default SPI controller configuration from
> >spi_setup_slave() to spi_claim_bus()
> >  - add spi_set_speed()
> >  - insert SPI controller deactivation in spi_release_bus()
> >  - protect while loops in spi_xfer() with counter / timeouts
> >  - support SPI mode flags: LSB_FIRST, CPHA, CPOL, LOOP
> >
> > Come from:
> >  http://patchwork.ozlabs.org/patch/71797/
> >
> > Applied with:
> >  git apply -v --whitespace=fix --reject \
> >  U-Boot-Adds-driver-for-Xilinx-xps_spi-SPI-controller.patch
> 
> not interesting in description.
> 
> 
> >
> > Fix manual:
> >  drivers/spi/Makefile
> 
> this too.
> 
> >
> > Signed-off-by: Stephan Linz 
> > ---
> >   drivers/spi/Makefile |1 +
> >   drivers/spi/xilinx_spi.c |  210 
> > ++
> >   drivers/spi/xilinx_spi.h |  135 +
> >   3 files changed, 346 insertions(+), 0 deletions(-)
> >   create mode 100644 drivers/spi/xilinx_spi.c
> >   create mode 100644 drivers/spi/xilinx_spi.h
> >
> > diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> > index c967d87..3ae38e5 100644
> > --- a/drivers/spi/Makefile
> > +++ b/drivers/spi/Makefile
> > @@ -44,6 +44,7 @@ COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
> >   COBJS-$(CONFIG_SH_SPI) += sh_spi.o
> >   COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
> >   COBJS-$(CONFIG_TEGRA2_SPI) += tegra2_spi.o
> > +COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
> >
> >   COBJS := $(COBJS-y)
> >   SRCS  := $(COBJS:.o=.c)
> > diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
> > new file mode 100644
> > index 000..4d83bd3
> > --- /dev/null
> > +++ b/drivers/spi/xilinx_spi.c
> > @@ -0,0 +1,210 @@
> > +/*
> > + * Xilinx SPI driver
> > + *
> > + * supports 8 bit SPI transfers only, with or w/o FIFO
> > + *
> > + * based on bfin_spi.c, by way of altera_spi.c
> > + * Copyright (c) 2005-2008 Analog Devices Inc.
> > + * Copyright (c) 2010 Thomas Chou 
> > + * Copyright (c) 2010 Graeme Smecher 
> > + * Copyright (c) 2012 Stephan Linz 
> > + *
> > + * Licensed under the GPL-2 or later.
> > + *
> > + * [0]: http://www.xilinx.com/support/documentation
> > + *
> > + * [S]:[0]/ip_documentation/xps_spi.pdf
> > + * [0]/ip_documentation/axi_spi_ds742.pdf
> > + */
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#include "xilinx_spi.h"
> > +
> > +#ifndef CONFIG_SYS_XILINX_SPI_LIST
> > +#define CONFIG_SYS_XILINX_SPI_LIST { CONFIG_SYS_SPI_BASE }
> > +#endif
> > +
> > +#ifndef CONFIG_XILINX_SPI_IDLE_VAL
> > +#define CONFIG_XILINX_SPI_IDLE_VAL 0xff
> > +#endif
> > +
> > +#define XILSPI_SPICR_DFLT_ON   (SPICR_MANUAL_SS | \
> > +SPICR_MASTER_MODE | \
> > +SPICR_SPE)
> > +
> > +#define XILSPI_SPICR_DFLT_OFF  (SPICR_MASTER_INHIBIT | \
> > +SPICR_MANUAL_SS)
> > +
> > +#define XILSPI_MAX_XFER_BITS   8
> > +
> > +static unsigned long xilinx_spi_base_list[] = CONFIG_SYS_XILINX_SPI_LIST;
> > +
> > +__attribute__((weak))
> > +int spi_cs_is_valid(unsigned int bus, unsigned int cs)
> > +{
> > +   return bus < ARRAY_SIZE(xilinx_spi_base_list) && cs < 32;
> > +}
> > +
> > +__attribute__((weak))
> > +void spi_cs_activate(struct spi_slave *slave)
> > +{
> > +   struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave);
> 
> newline
> 
> > +   writel(SPISSR_ACT(slave->cs), &xilspi->regs->spissr);
> > +}
> > +
> > +__attribute__((weak))
> > +void spi_cs_deactivate(struct spi_slave *slave)
> > +{
> > +   struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave);
> 
> newline
> 
> > +   writel(SPISSR_OFF, &xilspi->regs->spissr);
> > +}
> > +
> > +void spi_init(void)
> > +{
> > +   /* do nothing */
> > +}
> > +
> > +void spi_set_speed(struct spi_slave *slave, uint hz)
> > +{
> > +   /* xilinx spi core does not support programmable speed */
> > +}
> > +
> > +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
> > + unsigned int max_hz, unsigned int mode)
> > +{
> > +   struct xilinx_spi_slave *xilspi;
> > +   struct xilinx_spi_reg *regs;
> > +
> > +   if (!spi_cs_is_valid(bus, cs)) {
> > +   printf("XILSPI error: %s: unsupported bus %d / cs %d\n",
> > +   __func__, bus, cs);
> > +   return NULL;
> > +   }
> > +

Re: [U-Boot] [PATCH 1/2] spi: microblaze: Adds driver for Xilinx SPI controller

2012-07-24 Thread Michal Simek 

On 07/14/2012 12:30 AM, Stephan Linz wrote:

This is an improved version of the driver patch original
submitted by Graeme Smecher 

The changes are:
 - remove hard coded Xilinx BSP defines (XPAR_SPI_*) and
   use CONFIG_SYS_SPI_BASE from config.h instead
 - add extensive register struct definitions
 - remove offset calculation for register access and
   use the new register struct instead
 - move default SPI controller configuration from
   spi_setup_slave() to spi_claim_bus()
 - add spi_set_speed()
 - insert SPI controller deactivation in spi_release_bus()
 - protect while loops in spi_xfer() with counter / timeouts
 - support SPI mode flags: LSB_FIRST, CPHA, CPOL, LOOP

Come from:
 http://patchwork.ozlabs.org/patch/71797/

Applied with:
 git apply -v --whitespace=fix --reject \
 U-Boot-Adds-driver-for-Xilinx-xps_spi-SPI-controller.patch


not interesting in description.




Fix manual:
 drivers/spi/Makefile


this too.



Signed-off-by: Stephan Linz 
---
  drivers/spi/Makefile |1 +
  drivers/spi/xilinx_spi.c |  210 ++
  drivers/spi/xilinx_spi.h |  135 +
  3 files changed, 346 insertions(+), 0 deletions(-)
  create mode 100644 drivers/spi/xilinx_spi.c
  create mode 100644 drivers/spi/xilinx_spi.h

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index c967d87..3ae38e5 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -44,6 +44,7 @@ COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
  COBJS-$(CONFIG_SH_SPI) += sh_spi.o
  COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
  COBJS-$(CONFIG_TEGRA2_SPI) += tegra2_spi.o
+COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o

  COBJS := $(COBJS-y)
  SRCS  := $(COBJS:.o=.c)
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
new file mode 100644
index 000..4d83bd3
--- /dev/null
+++ b/drivers/spi/xilinx_spi.c
@@ -0,0 +1,210 @@
+/*
+ * Xilinx SPI driver
+ *
+ * supports 8 bit SPI transfers only, with or w/o FIFO
+ *
+ * based on bfin_spi.c, by way of altera_spi.c
+ * Copyright (c) 2005-2008 Analog Devices Inc.
+ * Copyright (c) 2010 Thomas Chou 
+ * Copyright (c) 2010 Graeme Smecher 
+ * Copyright (c) 2012 Stephan Linz 
+ *
+ * Licensed under the GPL-2 or later.
+ *
+ * [0]: http://www.xilinx.com/support/documentation
+ *
+ * [S]:[0]/ip_documentation/xps_spi.pdf
+ * [0]/ip_documentation/axi_spi_ds742.pdf
+ */
+#include 
+#include 
+#include 
+#include 
+
+#include "xilinx_spi.h"
+
+#ifndef CONFIG_SYS_XILINX_SPI_LIST
+#define CONFIG_SYS_XILINX_SPI_LIST { CONFIG_SYS_SPI_BASE }
+#endif
+
+#ifndef CONFIG_XILINX_SPI_IDLE_VAL
+#define CONFIG_XILINX_SPI_IDLE_VAL 0xff
+#endif
+
+#define XILSPI_SPICR_DFLT_ON   (SPICR_MANUAL_SS | \
+SPICR_MASTER_MODE | \
+SPICR_SPE)
+
+#define XILSPI_SPICR_DFLT_OFF  (SPICR_MASTER_INHIBIT | \
+SPICR_MANUAL_SS)
+
+#define XILSPI_MAX_XFER_BITS   8
+
+static unsigned long xilinx_spi_base_list[] = CONFIG_SYS_XILINX_SPI_LIST;
+
+__attribute__((weak))
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+   return bus < ARRAY_SIZE(xilinx_spi_base_list) && cs < 32;
+}
+
+__attribute__((weak))
+void spi_cs_activate(struct spi_slave *slave)
+{
+   struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave);


newline


+   writel(SPISSR_ACT(slave->cs), &xilspi->regs->spissr);
+}
+
+__attribute__((weak))
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+   struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave);


newline


+   writel(SPISSR_OFF, &xilspi->regs->spissr);
+}
+
+void spi_init(void)
+{
+   /* do nothing */
+}
+
+void spi_set_speed(struct spi_slave *slave, uint hz)
+{
+   /* xilinx spi core does not support programmable speed */
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+   struct xilinx_spi_slave *xilspi;
+   struct xilinx_spi_reg *regs;
+
+   if (!spi_cs_is_valid(bus, cs)) {
+   printf("XILSPI error: %s: unsupported bus %d / cs %d\n",
+   __func__, bus, cs);
+   return NULL;
+   }
+
+   xilspi = malloc(sizeof(*xilspi));
+   if (!xilspi) {
+   printf("XILSPI error: %s: malloc of SPI structure failed\n",
+   __func__);
+   return NULL;
+   }
+   xilspi->slave.bus = bus;
+   xilspi->slave.cs = cs;
+   xilspi->regs = (struct xilinx_spi_reg *)xilinx_spi_base_list[bus];
+   xilspi->freq = max_hz;
+   xilspi->mode = mode;
+   debug("%s: bus:%i cs:%i base:%p mode:%x max_hz:%d\n", __func__,
+   bus, cs, xilspi->regs, xilspi->mode, xilspi->freq);
+
+   return &xilspi->slave;
+}
+
+void spi_free_slave(struct spi_slave *slav

[U-Boot] [PATCH 1/2] spi: microblaze: Adds driver for Xilinx SPI controller

2012-07-13 Thread Stephan Linz 
This is an improved version of the driver patch original
submitted by Graeme Smecher 

The changes are:
- remove hard coded Xilinx BSP defines (XPAR_SPI_*) and
  use CONFIG_SYS_SPI_BASE from config.h instead
- add extensive register struct definitions
- remove offset calculation for register access and
  use the new register struct instead
- move default SPI controller configuration from
  spi_setup_slave() to spi_claim_bus()
- add spi_set_speed()
- insert SPI controller deactivation in spi_release_bus()
- protect while loops in spi_xfer() with counter / timeouts
- support SPI mode flags: LSB_FIRST, CPHA, CPOL, LOOP

Come from:
http://patchwork.ozlabs.org/patch/71797/

Applied with:
git apply -v --whitespace=fix --reject \
U-Boot-Adds-driver-for-Xilinx-xps_spi-SPI-controller.patch

Fix manual:
drivers/spi/Makefile

Signed-off-by: Stephan Linz 
---
 drivers/spi/Makefile |1 +
 drivers/spi/xilinx_spi.c |  210 ++
 drivers/spi/xilinx_spi.h |  135 +
 3 files changed, 346 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/xilinx_spi.c
 create mode 100644 drivers/spi/xilinx_spi.h

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index c967d87..3ae38e5 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -44,6 +44,7 @@ COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
 COBJS-$(CONFIG_SH_SPI) += sh_spi.o
 COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
 COBJS-$(CONFIG_TEGRA2_SPI) += tegra2_spi.o
+COBJS-$(CONFIG_XILINX_SPI) += xilinx_spi.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
new file mode 100644
index 000..4d83bd3
--- /dev/null
+++ b/drivers/spi/xilinx_spi.c
@@ -0,0 +1,210 @@
+/*
+ * Xilinx SPI driver
+ *
+ * supports 8 bit SPI transfers only, with or w/o FIFO
+ *
+ * based on bfin_spi.c, by way of altera_spi.c
+ * Copyright (c) 2005-2008 Analog Devices Inc.
+ * Copyright (c) 2010 Thomas Chou 
+ * Copyright (c) 2010 Graeme Smecher 
+ * Copyright (c) 2012 Stephan Linz 
+ *
+ * Licensed under the GPL-2 or later.
+ *
+ * [0]: http://www.xilinx.com/support/documentation
+ *
+ * [S]:[0]/ip_documentation/xps_spi.pdf
+ * [0]/ip_documentation/axi_spi_ds742.pdf
+ */
+#include 
+#include 
+#include 
+#include 
+
+#include "xilinx_spi.h"
+
+#ifndef CONFIG_SYS_XILINX_SPI_LIST
+#define CONFIG_SYS_XILINX_SPI_LIST { CONFIG_SYS_SPI_BASE }
+#endif
+
+#ifndef CONFIG_XILINX_SPI_IDLE_VAL
+#define CONFIG_XILINX_SPI_IDLE_VAL 0xff
+#endif
+
+#define XILSPI_SPICR_DFLT_ON   (SPICR_MANUAL_SS | \
+SPICR_MASTER_MODE | \
+SPICR_SPE)
+
+#define XILSPI_SPICR_DFLT_OFF  (SPICR_MASTER_INHIBIT | \
+SPICR_MANUAL_SS)
+
+#define XILSPI_MAX_XFER_BITS   8
+
+static unsigned long xilinx_spi_base_list[] = CONFIG_SYS_XILINX_SPI_LIST;
+
+__attribute__((weak))
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+   return bus < ARRAY_SIZE(xilinx_spi_base_list) && cs < 32;
+}
+
+__attribute__((weak))
+void spi_cs_activate(struct spi_slave *slave)
+{
+   struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave);
+   writel(SPISSR_ACT(slave->cs), &xilspi->regs->spissr);
+}
+
+__attribute__((weak))
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+   struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave);
+   writel(SPISSR_OFF, &xilspi->regs->spissr);
+}
+
+void spi_init(void)
+{
+   /* do nothing */
+}
+
+void spi_set_speed(struct spi_slave *slave, uint hz)
+{
+   /* xilinx spi core does not support programmable speed */
+}
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+   struct xilinx_spi_slave *xilspi;
+   struct xilinx_spi_reg *regs;
+
+   if (!spi_cs_is_valid(bus, cs)) {
+   printf("XILSPI error: %s: unsupported bus %d / cs %d\n",
+   __func__, bus, cs);
+   return NULL;
+   }
+
+   xilspi = malloc(sizeof(*xilspi));
+   if (!xilspi) {
+   printf("XILSPI error: %s: malloc of SPI structure failed\n",
+   __func__);
+   return NULL;
+   }
+   xilspi->slave.bus = bus;
+   xilspi->slave.cs = cs;
+   xilspi->regs = (struct xilinx_spi_reg *)xilinx_spi_base_list[bus];
+   xilspi->freq = max_hz;
+   xilspi->mode = mode;
+   debug("%s: bus:%i cs:%i base:%p mode:%x max_hz:%d\n", __func__,
+   bus, cs, xilspi->regs, xilspi->mode, xilspi->freq);
+
+   return &xilspi->slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+   struct xilinx_spi_slave *xilspi = to_xilinx_spi_slave(slave);
+   free(xilspi);
+}
+
+int spi_claim_bus(struct spi_slave *slav