Re: [U-Boot] [PATCH 1/3] dm: mips: Fix lb60 WDT control

2012-08-19 Thread Daniel Schwierzeck
2012/7/27 Marek Vasut ma...@denx.de:
 Write the TSCR register via 32bit write instead of 16bit one.
 The register is 32bit wide and bit 16 is being set, triggering
 gcc overflow error and making the code broken.

 Signed-off-by: Marek Vasut ma...@denx.de
 Cc: Daniel z...@ingenic.cn
 Cc: Shinya Kuribayashi skuri...@pobox.com
 Cc: Xiangfu Liu xian...@openmobilefree.net
 ---
  arch/mips/cpu/xburst/cpu.c |2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

applied to u-boot-mips/master, thanks

-- 
Best regards,
Daniel
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Re: [U-Boot] [PATCH 1/3] dm: mips: Fix lb60 WDT control

2012-07-30 Thread Marek Vasut
Dear Marek Vasut,

 Write the TSCR register via 32bit write instead of 16bit one.
 The register is 32bit wide and bit 16 is being set, triggering
 gcc overflow error and making the code broken.
[...]
Dan, can you please pick these (I didn't CC you ... sigh :/ ) ?

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/3] dm: mips: Fix lb60 WDT control

2012-07-30 Thread Daniel Schwierzeck
2012/7/30 Marek Vasut ma...@denx.de:
 Dear Marek Vasut,

 Write the TSCR register via 32bit write instead of 16bit one.
 The register is 32bit wide and bit 16 is being set, triggering
 gcc overflow error and making the code broken.
 [...]
 Dan, can you please pick these (I didn't CC you ... sigh :/ ) ?


Sure. I'm still waiting for some comments from Xiangfu.

Best regards,
Daniel
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[U-Boot] [PATCH 1/3] dm: mips: Fix lb60 WDT control

2012-07-27 Thread Marek Vasut
Write the TSCR register via 32bit write instead of 16bit one.
The register is 32bit wide and bit 16 is being set, triggering
gcc overflow error and making the code broken.

Signed-off-by: Marek Vasut ma...@denx.de
Cc: Daniel z...@ingenic.cn
Cc: Shinya Kuribayashi skuri...@pobox.com
Cc: Xiangfu Liu xian...@openmobilefree.net
---
 arch/mips/cpu/xburst/cpu.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c
index e976341..ddcbfaa 100644
--- a/arch/mips/cpu/xburst/cpu.c
+++ b/arch/mips/cpu/xburst/cpu.c
@@ -62,7 +62,7 @@ void __attribute__((weak)) _machine_restart(void)
 
writew(100, wdt-tdr); /* wdt_set_data(100) */
writew(0, wdt-tcnt); /* wdt_set_count(0); */
-   writew(TCU_TSSR_WDTSC, tcu-tscr); /* tcu_start_wdt_clock */
+   writel(TCU_TSSR_WDTSC, tcu-tscr); /* tcu_start_wdt_clock */
writeb(readb(wdt-tcer) | WDT_TCER_TCEN, wdt-tcer); /* wdt start */
 
while (1)
-- 
1.7.10.4

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