Re: [U-Boot] [PATCH 1/3] x86: Change 4-level page table base address to low memory
Hi Heinrich, On Tue, Feb 5, 2019 at 7:32 PM Heinrich Schuchardt wrote: > > On 2/2/19 7:06 AM, Simon Glass wrote: > > On Thu, 31 Jan 2019 at 09:17, Bin Meng wrote: > >> > >> At present the 4-level page table base address for 64-bit U-Boot > >> proper is assigned an address that conflicts with CONFIG_LOADADDR. > >> Change it to an address within the low memory range instead. > >> > >> Fixes crashes seen when 'dhcp' on QEMU x86_64 with > >> "-net nic -net user,tftp=.,bootfile=u-boot". > >> > >> Reported-by: Alexander Graf > >> Signed-off-by: Bin Meng > >> --- > >> > >> arch/x86/cpu/i386/cpu.c | 6 ++ > >> 1 file changed, 2 insertions(+), 4 deletions(-) > > > > Reviewed-by: Simon Glass > > ___ > > U-Boot mailing list > > U-Boot@lists.denx.de > > https://lists.denx.de/listinfo/u-boot > > > > Hello Bin, > > this patch is needed together with > > test/py: use default load address for tftp > https://lists.denx.de/pipermail/u-boot/2019-January/356265.html > > to get the EFI patch queue merged. > > Should Tom pick the patch series? > Sorry I just came back from Chinese new year holiday vacation. I will send PR to Tom ASAP. applied to u-boot-x86, thanks! Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] x86: Change 4-level page table base address to low memory
On 2/2/19 7:06 AM, Simon Glass wrote: > On Thu, 31 Jan 2019 at 09:17, Bin Meng wrote: >> >> At present the 4-level page table base address for 64-bit U-Boot >> proper is assigned an address that conflicts with CONFIG_LOADADDR. >> Change it to an address within the low memory range instead. >> >> Fixes crashes seen when 'dhcp' on QEMU x86_64 with >> "-net nic -net user,tftp=.,bootfile=u-boot". >> >> Reported-by: Alexander Graf >> Signed-off-by: Bin Meng >> --- >> >> arch/x86/cpu/i386/cpu.c | 6 ++ >> 1 file changed, 2 insertions(+), 4 deletions(-) > > Reviewed-by: Simon Glass > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot > Hello Bin, this patch is needed together with test/py: use default load address for tftp https://lists.denx.de/pipermail/u-boot/2019-January/356265.html to get the EFI patch queue merged. Should Tom pick the patch series? Best regards Heinrich ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] x86: Change 4-level page table base address to low memory
On Thu, 31 Jan 2019 at 09:17, Bin Meng wrote: > > At present the 4-level page table base address for 64-bit U-Boot > proper is assigned an address that conflicts with CONFIG_LOADADDR. > Change it to an address within the low memory range instead. > > Fixes crashes seen when 'dhcp' on QEMU x86_64 with > "-net nic -net user,tftp=.,bootfile=u-boot". > > Reported-by: Alexander Graf > Signed-off-by: Bin Meng > --- > > arch/x86/cpu/i386/cpu.c | 6 ++ > 1 file changed, 2 insertions(+), 4 deletions(-) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] x86: Change 4-level page table base address to low memory
> Am 01.02.2019 um 08:29 schrieb Bin Meng : > > Hi Alex, > >> On Fri, Feb 1, 2019 at 8:01 AM Alexander Graf wrote: >> >> >> >>> Am 01.02.2019 um 00:40 schrieb Bin Meng : >>> >>> Hi Alex, >>> On Fri, Feb 1, 2019 at 2:30 AM Alexander Graf wrote: > Am 31.01.2019 um 17:22 schrieb Bin Meng : > > At present the 4-level page table base address for 64-bit U-Boot > proper is assigned an address that conflicts with CONFIG_LOADADDR. > Change it to an address within the low memory range instead. Can't you dynamically allocate the PT too? >>> >>> The dynamically allocated PT only makes sense when in SPL. It then >>> becomes an arbitrary address again when entering in the 64-bit proper. >> >> I'm not sure I follow? On aarch64, we allocate every level dynamically. I >> feel like I'm missing a piece of the puzzle here :) >> > > The current x86 implementation is the SPL allocates the page table for > the 64-bit U-Boot. We can certainly change the implementation but I > would leave that for future changes. I see. Works for me :) Alex > > Regards, > Bin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] x86: Change 4-level page table base address to low memory
Hi Alex, On Fri, Feb 1, 2019 at 8:01 AM Alexander Graf wrote: > > > > > Am 01.02.2019 um 00:40 schrieb Bin Meng : > > > > Hi Alex, > > > >> On Fri, Feb 1, 2019 at 2:30 AM Alexander Graf wrote: > >> > >> > >> > >>> Am 31.01.2019 um 17:22 schrieb Bin Meng : > >>> > >>> At present the 4-level page table base address for 64-bit U-Boot > >>> proper is assigned an address that conflicts with CONFIG_LOADADDR. > >>> Change it to an address within the low memory range instead. > >> > >> Can't you dynamically allocate the PT too? > >> > > > > The dynamically allocated PT only makes sense when in SPL. It then > > becomes an arbitrary address again when entering in the 64-bit proper. > > I'm not sure I follow? On aarch64, we allocate every level dynamically. I > feel like I'm missing a piece of the puzzle here :) > The current x86 implementation is the SPL allocates the page table for the 64-bit U-Boot. We can certainly change the implementation but I would leave that for future changes. Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] x86: Change 4-level page table base address to low memory
> Am 01.02.2019 um 00:40 schrieb Bin Meng : > > Hi Alex, > >> On Fri, Feb 1, 2019 at 2:30 AM Alexander Graf wrote: >> >> >> >>> Am 31.01.2019 um 17:22 schrieb Bin Meng : >>> >>> At present the 4-level page table base address for 64-bit U-Boot >>> proper is assigned an address that conflicts with CONFIG_LOADADDR. >>> Change it to an address within the low memory range instead. >> >> Can't you dynamically allocate the PT too? >> > > The dynamically allocated PT only makes sense when in SPL. It then > becomes an arbitrary address again when entering in the 64-bit proper. I'm not sure I follow? On aarch64, we allocate every level dynamically. I feel like I'm missing a piece of the puzzle here :) Alex > > Regards, > Bin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] x86: Change 4-level page table base address to low memory
Hi Alex, On Fri, Feb 1, 2019 at 2:30 AM Alexander Graf wrote: > > > > > Am 31.01.2019 um 17:22 schrieb Bin Meng : > > > > At present the 4-level page table base address for 64-bit U-Boot > > proper is assigned an address that conflicts with CONFIG_LOADADDR. > > Change it to an address within the low memory range instead. > > Can't you dynamically allocate the PT too? > The dynamically allocated PT only makes sense when in SPL. It then becomes an arbitrary address again when entering in the 64-bit proper. Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] x86: Change 4-level page table base address to low memory
> Am 31.01.2019 um 17:22 schrieb Bin Meng : > > At present the 4-level page table base address for 64-bit U-Boot > proper is assigned an address that conflicts with CONFIG_LOADADDR. > Change it to an address within the low memory range instead. Can't you dynamically allocate the PT too? Alex > > Fixes crashes seen when 'dhcp' on QEMU x86_64 with > "-net nic -net user,tftp=.,bootfile=u-boot". > > Reported-by: Alexander Graf > Signed-off-by: Bin Meng > --- > > arch/x86/cpu/i386/cpu.c | 6 ++ > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c > index 208ef08..af42431 100644 > --- a/arch/x86/cpu/i386/cpu.c > +++ b/arch/x86/cpu/i386/cpu.c > @@ -462,6 +462,7 @@ int cpu_has_64bit(void) >has_long_mode(); > } > > +#define PAGETABLE_BASE0x8 > #define PAGETABLE_SIZE(6 * 4096) > > /** > @@ -523,10 +524,7 @@ int cpu_jump_to_64bit_uboot(ulong target) >uint32_t *pgtable; >func_t func; > > -/* TODO(s...@chromium.org): Find a better place for this */ > -pgtable = (uint32_t *)0x100; > -if (!pgtable) > -return -ENOMEM; > +pgtable = (uint32_t *)PAGETABLE_BASE; > >build_pagetable(pgtable); > > -- > 2.7.4 > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] x86: Change 4-level page table base address to low memory
On 1/31/19 5:22 PM, Bin Meng wrote: > At present the 4-level page table base address for 64-bit U-Boot > proper is assigned an address that conflicts with CONFIG_LOADADDR. > Change it to an address within the low memory range instead. > > Fixes crashes seen when 'dhcp' on QEMU x86_64 with > "-net nic -net user,tftp=.,bootfile=u-boot". > > Reported-by: Alexander Graf > Signed-off-by: Bin Meng Thanks for addressing this. It fixes the problem reported in x86: #define CONFIG_LOADADDR 0x110 https://lists.denx.de/pipermail/u-boot/2019-January/356108.html I have set aforementioned patch to superseded. Tested on qemu-x86_64. Tested-by: Heinrich Schuchardt ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/3] x86: Change 4-level page table base address to low memory
At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf Signed-off-by: Bin Meng --- arch/x86/cpu/i386/cpu.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index 208ef08..af42431 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -462,6 +462,7 @@ int cpu_has_64bit(void) has_long_mode(); } +#define PAGETABLE_BASE 0x8 #define PAGETABLE_SIZE (6 * 4096) /** @@ -523,10 +524,7 @@ int cpu_jump_to_64bit_uboot(ulong target) uint32_t *pgtable; func_t func; - /* TODO(s...@chromium.org): Find a better place for this */ - pgtable = (uint32_t *)0x100; - if (!pgtable) - return -ENOMEM; + pgtable = (uint32_t *)PAGETABLE_BASE; build_pagetable(pgtable); -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
