Re: [U-Boot] [PATCH 1/3] xilinx: zynqmp: Add new target with only qspi enabled

2018-01-16 Thread Michal Simek 
On 5.1.2018 11:46, Siva Durga Prasad Paladugu wrote:
> This patch adds new target which is called as mini configuration
> with only qspi enabled. This will be used to run in system with
> small footprint and needs qspi support. One example of such case
> is that it can run from OCM and programs qspi flash in DDR less
> systems.
> 
> Signed-off-by: Siva Durga Prasad Paladugu 
> ---
>  arch/arm/dts/Makefile |  1 +
>  arch/arm/dts/zynqmp-mini-qspi-single.dts  | 13 +
>  arch/arm/dts/zynqmp-mini-qspi.dtsi| 96 
> +++
>  configs/xilinx_zynqmp_mini_qspi_defconfig | 56 ++
>  include/configs/xilinx_zynqmp_mini.h  | 45 +++
>  include/configs/xilinx_zynqmp_mini_qspi.h | 25 
>  6 files changed, 236 insertions(+)
>  create mode 100644 arch/arm/dts/zynqmp-mini-qspi-single.dts
>  create mode 100644 arch/arm/dts/zynqmp-mini-qspi.dtsi
>  create mode 100644 configs/xilinx_zynqmp_mini_qspi_defconfig
>  create mode 100644 include/configs/xilinx_zynqmp_mini.h
>  create mode 100644 include/configs/xilinx_zynqmp_mini_qspi.h
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index a895c70..5ef942e 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -147,6 +147,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>   zynq-zybo.dtb
>  dtb-$(CONFIG_ARCH_ZYNQMP) += \
>   zynqmp-ep108.dtb\
> + zynqmp-mini-qspi-single.dtb \
>   zynqmp-zcu102-revA.dtb  \
>   zynqmp-zcu102-revB.dtb  \
>   zynqmp-zcu102-rev1.0.dtb\
> diff --git a/arch/arm/dts/zynqmp-mini-qspi-single.dts 
> b/arch/arm/dts/zynqmp-mini-qspi-single.dts
> new file mode 100644
> index 000..c87eab3
> --- /dev/null
> +++ b/arch/arm/dts/zynqmp-mini-qspi-single.dts
> @@ -0,0 +1,13 @@
> +/*
> + * Xilinx ZynqMP QSPI single DTS
> + *
> + * Copyright (C) 2018 Xilinx, Inc.
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#include "zynqmp-mini-qspi.dtsi"
> +
> + {
> + spi-rx-bus-width = <4>;
> +};
> diff --git a/arch/arm/dts/zynqmp-mini-qspi.dtsi 
> b/arch/arm/dts/zynqmp-mini-qspi.dtsi
> new file mode 100644
> index 000..e4e6417
> --- /dev/null
> +++ b/arch/arm/dts/zynqmp-mini-qspi.dtsi
> @@ -0,0 +1,96 @@
> +/*
> + * dts file for Xilinx ZynqMP Mini Configuration
> + *
> + * (C) Copyright 2018, Xilinx, Inc.
> + *
> + * Siva Durga Prasad 
> + * Michal Simek 
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +/dts-v1/;
> +
> +/ {
> + model = "ZynqMP MINI QSPI";
> + compatible = "xlnx,zynqmp";
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + aliases {
> + serial0 = 
> + spi0 = 
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x0 0x4000>;
> + };
> +
> + dcc: dcc {
> + compatible = "arm,dcc";
> + status = "disabled";
> + u-boot,dm-pre-reloc;
> + };
> +
> + amba: amba {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <1>;
> + ranges;
> +
> + qspi: spi@ff0f {
> + compatible = "xlnx,zynqmp-qspi-1.0";
> + status = "disabled";
> + clock-names = "ref_clk", "pclk";
> + clocks = <_clk _clk>;
> + num-cs = <1>;
> + reg = <0x0 0xff0f 0x1000 0x0 0xc000 0x800>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + misc_clk: misc_clk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <12500>;
> + };
> + };
> +};
> +
> + {
> + status = "okay";
> + flash@0 {
> + compatible = "n25q512a11";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x0>;
> + spi-tx-bus-width = <1>;
> + spi-rx-bus-width = <4>;
> + spi-max-frequency = <1000>;
> + partition@qspi-fsbl-uboot { /* for testing purpose */
> + label = "qspi-fsbl-uboot";
> + reg = <0x0 0x10>;
> + };
> + partition@qspi-linux { /* for testing purpose */
> + label = "qspi-linux";
> + reg = <0x10 0x50>;
> + };
> + partition@qspi-device-tree { /* for testing purpose */
> + label = "qspi-device-tree";
> + reg = <0x60 0x2>;
> + };
> + partition@qspi-rootfs { /* for testing purpose

[U-Boot] [PATCH 1/3] xilinx: zynqmp: Add new target with only qspi enabled

2018-01-05 Thread Siva Durga Prasad Paladugu 
This patch adds new target which is called as mini configuration
with only qspi enabled. This will be used to run in system with
small footprint and needs qspi support. One example of such case
is that it can run from OCM and programs qspi flash in DDR less
systems.

Signed-off-by: Siva Durga Prasad Paladugu 
---
 arch/arm/dts/Makefile |  1 +
 arch/arm/dts/zynqmp-mini-qspi-single.dts  | 13 +
 arch/arm/dts/zynqmp-mini-qspi.dtsi| 96 +++
 configs/xilinx_zynqmp_mini_qspi_defconfig | 56 ++
 include/configs/xilinx_zynqmp_mini.h  | 45 +++
 include/configs/xilinx_zynqmp_mini_qspi.h | 25 
 6 files changed, 236 insertions(+)
 create mode 100644 arch/arm/dts/zynqmp-mini-qspi-single.dts
 create mode 100644 arch/arm/dts/zynqmp-mini-qspi.dtsi
 create mode 100644 configs/xilinx_zynqmp_mini_qspi_defconfig
 create mode 100644 include/configs/xilinx_zynqmp_mini.h
 create mode 100644 include/configs/xilinx_zynqmp_mini_qspi.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a895c70..5ef942e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -147,6 +147,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zybo.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-ep108.dtb\
+   zynqmp-mini-qspi-single.dtb \
zynqmp-zcu102-revA.dtb  \
zynqmp-zcu102-revB.dtb  \
zynqmp-zcu102-rev1.0.dtb\
diff --git a/arch/arm/dts/zynqmp-mini-qspi-single.dts 
b/arch/arm/dts/zynqmp-mini-qspi-single.dts
new file mode 100644
index 000..c87eab3
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini-qspi-single.dts
@@ -0,0 +1,13 @@
+/*
+ * Xilinx ZynqMP QSPI single DTS
+ *
+ * Copyright (C) 2018 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include "zynqmp-mini-qspi.dtsi"
+
+ {
+   spi-rx-bus-width = <4>;
+};
diff --git a/arch/arm/dts/zynqmp-mini-qspi.dtsi 
b/arch/arm/dts/zynqmp-mini-qspi.dtsi
new file mode 100644
index 000..e4e6417
--- /dev/null
+++ b/arch/arm/dts/zynqmp-mini-qspi.dtsi
@@ -0,0 +1,96 @@
+/*
+ * dts file for Xilinx ZynqMP Mini Configuration
+ *
+ * (C) Copyright 2018, Xilinx, Inc.
+ *
+ * Siva Durga Prasad 
+ * Michal Simek 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+
+/ {
+   model = "ZynqMP MINI QSPI";
+   compatible = "xlnx,zynqmp";
+   #address-cells = <2>;
+   #size-cells = <1>;
+
+   aliases {
+   serial0 = 
+   spi0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x0 0x4000>;
+   };
+
+   dcc: dcc {
+   compatible = "arm,dcc";
+   status = "disabled";
+   u-boot,dm-pre-reloc;
+   };
+
+   amba: amba {
+   compatible = "simple-bus";
+   #address-cells = <2>;
+   #size-cells = <1>;
+   ranges;
+
+   qspi: spi@ff0f {
+   compatible = "xlnx,zynqmp-qspi-1.0";
+   status = "disabled";
+   clock-names = "ref_clk", "pclk";
+   clocks = <_clk _clk>;
+   num-cs = <1>;
+   reg = <0x0 0xff0f 0x1000 0x0 0xc000 0x800>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   misc_clk: misc_clk {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <12500>;
+   };
+   };
+};
+
+ {
+   status = "okay";
+   flash@0 {
+   compatible = "n25q512a11";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   reg = <0x0>;
+   spi-tx-bus-width = <1>;
+   spi-rx-bus-width = <4>;
+   spi-max-frequency = <1000>;
+   partition@qspi-fsbl-uboot { /* for testing purpose */
+   label = "qspi-fsbl-uboot";
+   reg = <0x0 0x10>;
+   };
+   partition@qspi-linux { /* for testing purpose */
+   label = "qspi-linux";
+   reg = <0x10 0x50>;
+   };
+   partition@qspi-device-tree { /* for testing purpose */
+   label = "qspi-device-tree";
+   reg = <0x60 0x2>;
+   };
+   partition@qspi-rootfs { /* for testing purpose */
+   label = "qspi-rootfs";
+   reg = <0x62 0x5E>;
+   };
+   };
+};
+
+ {
+   status = "okay";
+};
diff --git