Re: [U-Boot] [PATCH 1/4] s5p6442: Support Samsung s5p6442 SoC
Dear Minkyu Kang, In message 1f3430fb1003301842kbff3d1fie305bb7c6bd21...@mail.gmail.com you wrote: These registers are used at asm code. Are they only used in assembler code? If so, these defines should be moved to a separate asm-offsets.h file. Keep in mind that this is considered to be a temporary workaround only. Later this file will be removed, and then auto-generated from the respective C structs. As soon as somebody finds time to adapt the respective code from Linux, that is. So, can't make C struct. But, It seemed to there are defined unused registers also. Joonyoung, Please remove unused defines. And move this definition to asm-offsets.h (which must not be included in any C code). Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A wise person makes his own decisions, a weak one obeys public opinion. -- Chinese proverb ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] s5p6442: Support Samsung s5p6442 SoC
Dear Joonyoung Shim, In message 4bb016dc.5000...@samsung.com you wrote: This patch adds support s5p6442 SoC. The s5p6442 SoC is ARM1176 processor. Cc: Minkyu Kang mk7.k...@samsung.com Cc: Kyungmin Park kyungmin.p...@samsung.com Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com ... +#define S5P6442_PWR_CFG 0xE010C000 ... +#define S5P6442_EINT_WAKEUP_MASK 0xE010C004 +#define S5P6442_WAKEUP_MASK 0xE010C008 +#define S5P6442_PWR_MODE 0xE010C00C +#define S5P6442_PWR_MODE_SLEEP (1 2) +#define S5P6442_NORMAL_CFG 0xE010C010 +#define S5P6442_IDLE_CFG 0xE010C020 +#define S5P6442_STOP_CFG 0xE010C030 +#define S5P6442_STOP_MEM_CFG 0xE010C034 +#define S5P6442_SLEEP_CFG0xE010C040 +#define S5P6442_OSC_FREQ 0xE010C100 +#define S5P6442_OSC_STABLE 0xE010C104 +#define S5P6442_PWR_STABLE 0xE010C108 +#define S5P6442_MTC_STABLE 0xE010C110 +#define S5P6442_CLAMP_STABLE 0xE010C114 +#define S5P6442_WAKEUP_STAT 0xE010C200 +#define S5P6442_OTHERS 0xE010E000 +#define S5P6442_OTHERS_SYSCON_INT_DISABLE(1 0) +#define S5P6442_MIE_CONTROL 0xE010E800 +#define S5P6442_HDMI_CONTROL 0xE010E804 +#define S5P6442_USB_PHY_CON 0xE010E80C +#define S5P6442_DAC_CONTROL 0xE010E810 +#define S5P6442_MIPI_DPHY_CONTROL0xE010E814 +#define S5P6442_ADC_CONTROL 0xE010E818 +#define S5P6442_PS_HOLD_CONTROL 0xE010E81C +#define S5P6442_PS_HOLD_DIR_OUTPUT (1 9) +#define S5P6442_PS_HOLD_DIR_INPUT(0 9) +#define S5P6442_PS_HOLD_DATA_HIGH(1 8) +#define S5P6442_PS_HOLD_DATA_LOW (0 8) +#define S5P6442_PS_HOLD_OUT_EN (1 0) +#define S5P6442_INFORM0 0xE010F000 +#define S5P6442_INFORM1 0xE010F004 +#define S5P6442_INFORM2 0xE010F008 +#define S5P6442_INFORM3 0xE010F00C +#define S5P6442_INFORM4 0xE010F010 +#define S5P6442_INFORM5 0xE010F014 +#define S5P6442_INFORM6 0xE010F018 +#define S5P6442_INFORM7 0xE010F01C Please use C structs to describe these registers. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Hiring experienced unix people is like a built-in filter against idiots. Hiring experienced NT people provides no such guarantee. -- Miguel Cruz in wgl96.349$cc.122...@typhoon2.ba-dsg.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] s5p6442: Support Samsung s5p6442 SoC
Dear Wolfgang Denk, On 31 March 2010 06:00, Wolfgang Denk w...@denx.de wrote: Dear Joonyoung Shim, In message 4bb016dc.5000...@samsung.com you wrote: This patch adds support s5p6442 SoC. The s5p6442 SoC is ARM1176 processor. Cc: Minkyu Kang mk7.k...@samsung.com Cc: Kyungmin Park kyungmin.p...@samsung.com Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com ... +#define S5P6442_PWR_CFG 0xE010C000 ... +#define S5P6442_EINT_WAKEUP_MASK 0xE010C004 +#define S5P6442_WAKEUP_MASK 0xE010C008 +#define S5P6442_PWR_MODE 0xE010C00C +#define S5P6442_PWR_MODE_SLEEP (1 2) +#define S5P6442_NORMAL_CFG 0xE010C010 +#define S5P6442_IDLE_CFG 0xE010C020 +#define S5P6442_STOP_CFG 0xE010C030 +#define S5P6442_STOP_MEM_CFG 0xE010C034 +#define S5P6442_SLEEP_CFG 0xE010C040 +#define S5P6442_OSC_FREQ 0xE010C100 +#define S5P6442_OSC_STABLE 0xE010C104 +#define S5P6442_PWR_STABLE 0xE010C108 +#define S5P6442_MTC_STABLE 0xE010C110 +#define S5P6442_CLAMP_STABLE 0xE010C114 +#define S5P6442_WAKEUP_STAT 0xE010C200 +#define S5P6442_OTHERS 0xE010E000 +#define S5P6442_OTHERS_SYSCON_INT_DISABLE (1 0) +#define S5P6442_MIE_CONTROL 0xE010E800 +#define S5P6442_HDMI_CONTROL 0xE010E804 +#define S5P6442_USB_PHY_CON 0xE010E80C +#define S5P6442_DAC_CONTROL 0xE010E810 +#define S5P6442_MIPI_DPHY_CONTROL 0xE010E814 +#define S5P6442_ADC_CONTROL 0xE010E818 +#define S5P6442_PS_HOLD_CONTROL 0xE010E81C +#define S5P6442_PS_HOLD_DIR_OUTPUT (1 9) +#define S5P6442_PS_HOLD_DIR_INPUT (0 9) +#define S5P6442_PS_HOLD_DATA_HIGH (1 8) +#define S5P6442_PS_HOLD_DATA_LOW (0 8) +#define S5P6442_PS_HOLD_OUT_EN (1 0) +#define S5P6442_INFORM0 0xE010F000 +#define S5P6442_INFORM1 0xE010F004 +#define S5P6442_INFORM2 0xE010F008 +#define S5P6442_INFORM3 0xE010F00C +#define S5P6442_INFORM4 0xE010F010 +#define S5P6442_INFORM5 0xE010F014 +#define S5P6442_INFORM6 0xE010F018 +#define S5P6442_INFORM7 0xE010F01C Please use C structs to describe these registers. These registers are used at asm code. So, can't make C struct. But, It seemed to there are defined unused registers also. Joonyoung, Please remove unused defines. Thanks Minkyu Kang -- from. prom. www.promsoft.net ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] s5p6442: Support Samsung s5p6442 SoC
Dear Joonyoung Shim,
On 29 March 2010 11:56, Joonyoung Shim jy0922.s...@samsung.com wrote:
This patch adds support s5p6442 SoC. The s5p6442 SoC is ARM1176
processor.
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
---
cpu/arm1176/s5p64xx/Makefile | 52 +
cpu/arm1176/s5p64xx/clock.c | 163 +++
cpu/arm1176/s5p64xx/cpu_info.c | 58 ++
cpu/arm1176/s5p64xx/reset.S | 35 ++
cpu/arm1176/s5p64xx/timer.c | 204
++
include/asm-arm/arch-s5p64xx/clk.h | 38 +++
include/asm-arm/arch-s5p64xx/clock.h | 69
include/asm-arm/arch-s5p64xx/cpu.h | 57 ++
include/asm-arm/arch-s5p64xx/gpio.h | 111 ++
include/asm-arm/arch-s5p64xx/power.h | 76 +
include/asm-arm/arch-s5p64xx/pwm.h | 58 ++
include/asm-arm/arch-s5p64xx/uart.h | 47
12 files changed, 968 insertions(+), 0 deletions(-)
create mode 100644 cpu/arm1176/s5p64xx/Makefile
create mode 100644 cpu/arm1176/s5p64xx/clock.c
create mode 100644 cpu/arm1176/s5p64xx/cpu_info.c
create mode 100644 cpu/arm1176/s5p64xx/reset.S
create mode 100644 cpu/arm1176/s5p64xx/timer.c
create mode 100644 include/asm-arm/arch-s5p64xx/clk.h
create mode 100644 include/asm-arm/arch-s5p64xx/clock.h
create mode 100644 include/asm-arm/arch-s5p64xx/cpu.h
create mode 100644 include/asm-arm/arch-s5p64xx/gpio.h
create mode 100644 include/asm-arm/arch-s5p64xx/power.h
create mode 100644 include/asm-arm/arch-s5p64xx/pwm.h
create mode 100644 include/asm-arm/arch-s5p64xx/uart.h
diff --git a/cpu/arm1176/s5p64xx/clock.c b/cpu/arm1176/s5p64xx/clock.c
new file mode 100644
index 000..5fe0482
--- /dev/null
+++ b/cpu/arm1176/s5p64xx/clock.c
@@ -0,0 +1,163 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics
+ * Minkyu Kang mk7.k...@samsung.com
+ * Joonyoung Shim jy0922.s...@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/clock.h
+#include asm/arch/clk.h
+
+#ifndef CONFIG_SYS_CLK_FREQ_6442
+#define CONFIG_SYS_CLK_FREQ_6442 1200
+#endif
+
+unsigned long (*get_pclk)(void);
+unsigned long (*get_arm_clk)(void);
+unsigned long (*get_pll_clk)(int);
+
+/* s5p6442: return pll clock frequency */
+static unsigned long s5p6442_get_pll_clk(int pllreg)
+{
+ struct s5p6442_clock *clk = (struct s5p6442_clock
*)S5P64XX_CLOCK_BASE;
+ unsigned long r, m, p, s, mask, fout;
+ unsigned int freq;
+
+ switch (pllreg) {
+ case APLL:
+ r = readl(clk-apll_con);
+ break;
+ case MPLL:
+ r = readl(clk-mpll_con);
+ break;
+ case EPLL:
+ r = readl(clk-epll_con);
+ break;
+ case VPLL:
+ r = readl(clk-vpll_con);
+ break;
+ default:
+ printf(Unsupported PLL (%d)\n, pllreg);
+ return 0;
+ }
+
+ /*
+ * APLL_CON: MIDV [25:16]
+ * MPLL_CON: MIDV [25:16]
+ * EPLL_CON: MIDV [24:16]
+ * VPLL_CON: MIDV [24:16]
+ */
+ if (pllreg == APLL || pllreg == MPLL)
+ mask = 0x3ff;
+ else
+ mask = 0x1ff;
+
+ m = (r 16) mask;
+
+ /* PDIV [13:8] */
+ p = (r 8) 0x3f;
+ /* SDIV [2:0] */
+ s = r 0x7;
+
+ freq = CONFIG_SYS_CLK_FREQ_6442;
+ if (pllreg == APLL) {
+ if (s 1)
+ s = 1;
+ /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
+ fout = m * (freq / (p * (1 (s - 1;
+ } else {
+ /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
+ fout = m * (freq / (p * (1 s)));
+ }
+
+ return fout;
+}
+
+/* s5p6442: return ARM clock frequency */
+static unsigned long s5p6442_get_arm_clk(void)
+{
+ struct s5p6442_clock *clk = (struct s5p6442_clock
*)S5P64XX_CLOCK_BASE;
+
