subject:"\[U\-Boot\] \[PATCH 12\/15\] ATMEL\: fix dataflash \(dirty\)"

[U-Boot] [PATCH 12/15] ATMEL: fix dataflash (dirty)

2011-02-18 Thread Reinhard Meyer

Signed-off-by: Reinhard Meyer u-b...@emk-elektronik.de
---
 drivers/spi/atmel_dataflash_spi.c |   94 ++--
 include/dataflash.h   |1 -
 2 files changed, 57 insertions(+), 38 deletions(-)

diff --git a/drivers/spi/atmel_dataflash_spi.c 
b/drivers/spi/atmel_dataflash_spi.c
index 4a5c4aa..6e632cc 100644
--- a/drivers/spi/atmel_dataflash_spi.c
+++ b/drivers/spi/atmel_dataflash_spi.c
@@ -21,13 +21,21 @@
 
 #include common.h
 #ifndef CONFIG_AT91_LEGACY
-#define CONFIG_AT91_LEGACY
-#warning Please update to use C structur SoC access !
+# define CONFIG_AT91_LEGACY
+# warning Please update to use C structur SoC access !
 #endif
-#include asm/arch/hardware.h
+#include common.h
+#include spi.h
+#include malloc.h
+
+#include asm/io.h
+
 #include asm/arch/clk.h
+#include asm/arch/hardware.h
+
+#include atmel_spi.h
+
 #include asm/arch/gpio.h
-#include asm/arch/io.h
 #include asm/arch/at91_pio.h
 #include asm/arch/at91_spi.h
 
@@ -41,18 +49,18 @@
 void AT91F_SpiInit(void)
 {
/* Reset the SPI */
-   writel(AT91_SPI_SWRST, AT91_BASE_SPI + AT91_SPI_CR);
+   writel(AT91_SPI_SWRST, ATMEL_BASE_SPI0 + AT91_SPI_CR);
 
/* Configure SPI in Master Mode with No CS selected !!! */
writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS,
-  AT91_BASE_SPI + AT91_SPI_MR);
+  ATMEL_BASE_SPI0 + AT91_SPI_MR);
 
/* Configure CS0 */
writel(AT91_SPI_NCPHA |
   (AT91_SPI_DLYBS  DATAFLASH_TCSS) |
   (AT91_SPI_DLYBCT  DATAFLASH_TCHS) |
   ((get_mck_clk_rate() / AT91_SPI_CLK)  8),
-  AT91_BASE_SPI + AT91_SPI_CSR(0));
+  ATMEL_BASE_SPI0 + AT91_SPI_CSR(0));
 
 #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
/* Configure CS1 */
@@ -60,7 +68,7 @@ void AT91F_SpiInit(void)
   (AT91_SPI_DLYBS  DATAFLASH_TCSS) |
   (AT91_SPI_DLYBCT  DATAFLASH_TCHS) |
   ((get_mck_clk_rate() / AT91_SPI_CLK)  8),
-  AT91_BASE_SPI + AT91_SPI_CSR(1));
+  ATMEL_BASE_SPI0 + AT91_SPI_CSR(1));
 #endif
 #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
/* Configure CS2 */
@@ -68,7 +76,7 @@ void AT91F_SpiInit(void)
   (AT91_SPI_DLYBS  DATAFLASH_TCSS) |
   (AT91_SPI_DLYBCT  DATAFLASH_TCHS) |
   ((get_mck_clk_rate() / AT91_SPI_CLK)  8),
-  AT91_BASE_SPI + AT91_SPI_CSR(2));
+  ATMEL_BASE_SPI0 + AT91_SPI_CSR(2));
 #endif
 #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
/* Configure CS3 */
@@ -76,21 +84,22 @@ void AT91F_SpiInit(void)
   (AT91_SPI_DLYBS  DATAFLASH_TCSS) |
   (AT91_SPI_DLYBCT  DATAFLASH_TCHS) |
   ((get_mck_clk_rate() / AT91_SPI_CLK)  8),
-  AT91_BASE_SPI + AT91_SPI_CSR(3));
+  ATMEL_BASE_SPI0 + AT91_SPI_CSR(3));
 #endif
 
/* SPI_Enable */
-   writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR);
+   writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
 
-   while (!(readl(AT91_BASE_SPI + AT91_SPI_SR)  AT91_SPI_SPIENS));
+   while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR)  AT91_SPI_SPIENS))
+   ;
 
/*
 * Add tempo to get SPI in a safe state.
 * Should not be needed for new silicon (Rev B)
 */
udelay(50);
-   readl(AT91_BASE_SPI + AT91_SPI_SR);
-   readl(AT91_BASE_SPI + AT91_SPI_RDR);
+   readl(ATMEL_BASE_SPI0 + AT91_SPI_SR);
+   readl(ATMEL_BASE_SPI0 + AT91_SPI_RDR);
 
 }
 
@@ -100,33 +109,33 @@ void AT91F_SpiEnable(int cs)
 
switch (cs) {
case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
-   mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+   mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
mode = 0xFFF0;
writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD16)  
AT91_SPI_PCS),
-  AT91_BASE_SPI + AT91_SPI_MR);
+  ATMEL_BASE_SPI0 + AT91_SPI_MR);
break;
case 1: /* Configure SPI CS1 for Serial DataFlash AT45DBxx */
-   mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+   mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
mode = 0xFFF0;
writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD16)  
AT91_SPI_PCS),
-  AT91_BASE_SPI + AT91_SPI_MR);
+  ATMEL_BASE_SPI0 + AT91_SPI_MR);
break;
case 2: /* Configure SPI CS2 for Serial DataFlash AT45DBxx */
-   mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+   mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
mode = 0xFFF0;
writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD16)  
AT91_SPI_PCS),
-  AT91_BASE_SPI + AT91_SPI_MR);
+  ATMEL_BASE_SPI0 + AT91_SPI_MR);
break;
case 3:
-   mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+

Re: [U-Boot] [PATCH 12/15] ATMEL: fix dataflash (dirty)

2011-02-18 Thread Andreas Bießmann

Am 18.02.2011 13:50, schrieb Reinhard Meyer:
 Signed-off-by: Reinhard Meyer u-b...@emk-elektronik.de
 ---
  drivers/spi/atmel_dataflash_spi.c |   94 ++--
  include/dataflash.h   |1 -
  2 files changed, 57 insertions(+), 38 deletions(-)
 
 diff --git a/drivers/spi/atmel_dataflash_spi.c 
 b/drivers/spi/atmel_dataflash_spi.c
 index 4a5c4aa..6e632cc 100644
 --- a/drivers/spi/atmel_dataflash_spi.c
 +++ b/drivers/spi/atmel_dataflash_spi.c
 @@ -21,13 +21,21 @@
  
  #include common.h
  #ifndef CONFIG_AT91_LEGACY
 -#define CONFIG_AT91_LEGACY
 -#warning Please update to use C structur SoC access !
 +# define CONFIG_AT91_LEGACY

this would be CONFIG_ATMEL_LEGACY

 +# warning Please update to use C structur SoC access !
  #endif
 -#include asm/arch/hardware.h
 +#include common.h
 +#include spi.h
 +#include malloc.h
 +
 +#include asm/io.h
 +
  #include asm/arch/clk.h
 +#include asm/arch/hardware.h
 +
 +#include atmel_spi.h
 +
  #include asm/arch/gpio.h
 -#include asm/arch/io.h
  #include asm/arch/at91_pio.h
  #include asm/arch/at91_spi.h
  
 @@ -41,18 +49,18 @@
  void AT91F_SpiInit(void)
  {
   /* Reset the SPI */
 - writel(AT91_SPI_SWRST, AT91_BASE_SPI + AT91_SPI_CR);
 + writel(AT91_SPI_SWRST, ATMEL_BASE_SPI0 + AT91_SPI_CR);
  
   /* Configure SPI in Master Mode with No CS selected !!! */
   writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS,
 -AT91_BASE_SPI + AT91_SPI_MR);
 +ATMEL_BASE_SPI0 + AT91_SPI_MR);
  
   /* Configure CS0 */
   writel(AT91_SPI_NCPHA |
  (AT91_SPI_DLYBS  DATAFLASH_TCSS) |
  (AT91_SPI_DLYBCT  DATAFLASH_TCHS) |
  ((get_mck_clk_rate() / AT91_SPI_CLK)  8),
 -AT91_BASE_SPI + AT91_SPI_CSR(0));
 +ATMEL_BASE_SPI0 + AT91_SPI_CSR(0));
  
  #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
   /* Configure CS1 */
 @@ -60,7 +68,7 @@ void AT91F_SpiInit(void)
  (AT91_SPI_DLYBS  DATAFLASH_TCSS) |
  (AT91_SPI_DLYBCT  DATAFLASH_TCHS) |
  ((get_mck_clk_rate() / AT91_SPI_CLK)  8),
 -AT91_BASE_SPI + AT91_SPI_CSR(1));
 +ATMEL_BASE_SPI0 + AT91_SPI_CSR(1));
  #endif
  #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
   /* Configure CS2 */
 @@ -68,7 +76,7 @@ void AT91F_SpiInit(void)
  (AT91_SPI_DLYBS  DATAFLASH_TCSS) |
  (AT91_SPI_DLYBCT  DATAFLASH_TCHS) |
  ((get_mck_clk_rate() / AT91_SPI_CLK)  8),
 -AT91_BASE_SPI + AT91_SPI_CSR(2));
 +ATMEL_BASE_SPI0 + AT91_SPI_CSR(2));
  #endif
  #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
   /* Configure CS3 */
 @@ -76,21 +84,22 @@ void AT91F_SpiInit(void)
  (AT91_SPI_DLYBS  DATAFLASH_TCSS) |
  (AT91_SPI_DLYBCT  DATAFLASH_TCHS) |
  ((get_mck_clk_rate() / AT91_SPI_CLK)  8),
 -AT91_BASE_SPI + AT91_SPI_CSR(3));
 +ATMEL_BASE_SPI0 + AT91_SPI_CSR(3));
  #endif
  
   /* SPI_Enable */
 - writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR);
 + writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
  
 - while (!(readl(AT91_BASE_SPI + AT91_SPI_SR)  AT91_SPI_SPIENS));
 + while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR)  AT91_SPI_SPIENS))
 + ;
  
   /*
* Add tempo to get SPI in a safe state.
* Should not be needed for new silicon (Rev B)
*/
   udelay(50);
 - readl(AT91_BASE_SPI + AT91_SPI_SR);
 - readl(AT91_BASE_SPI + AT91_SPI_RDR);
 + readl(ATMEL_BASE_SPI0 + AT91_SPI_SR);
 + readl(ATMEL_BASE_SPI0 + AT91_SPI_RDR);
  
  }
  
 @@ -100,33 +109,33 @@ void AT91F_SpiEnable(int cs)
  
   switch (cs) {
   case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
 - mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
 + mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
   mode = 0xFFF0;
   writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD16)  
 AT91_SPI_PCS),
 -AT91_BASE_SPI + AT91_SPI_MR);
 +ATMEL_BASE_SPI0 + AT91_SPI_MR);
   break;
   case 1: /* Configure SPI CS1 for Serial DataFlash AT45DBxx */
 - mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
 + mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
   mode = 0xFFF0;
   writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD16)  
 AT91_SPI_PCS),
 -AT91_BASE_SPI + AT91_SPI_MR);
 +ATMEL_BASE_SPI0 + AT91_SPI_MR);
   break;
   case 2: /* Configure SPI CS2 for Serial DataFlash AT45DBxx */
 - mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
 + mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
   mode = 0xFFF0;
   writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD16)  
 AT91_SPI_PCS),
 -AT91_BASE_SPI + AT91_SPI_MR);
 +ATMEL_BASE_SPI0 + AT91_SPI_MR);
   break;
   case 3:

Re: [U-Boot] [PATCH 12/15] ATMEL: fix dataflash (dirty)

2011-02-18 Thread Reinhard Meyer

Dear Andreas Bießmann,
   #ifndef CONFIG_AT91_LEGACY
 -#define CONFIG_AT91_LEGACY
 -#warning Please update to use C structur SoC access !
 +# define CONFIG_AT91_LEGACY

 this would be CONFIG_ATMEL_LEGACY

 +# warning Please update to use C structur SoC access !
   #endif
Interesting.. It did build although the (wrong) define should not have been set.
Either it is set somewhere, or it is actually not required.

Anyway, when the driver is converted to struct SoC access, this will be removed.
Reinhard
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[U-Boot] [PATCH 12/15] ATMEL: fix dataflash (dirty)

Re: [U-Boot] [PATCH 12/15] ATMEL: fix dataflash (dirty)

Re: [U-Boot] [PATCH 12/15] ATMEL: fix dataflash (dirty)

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