From: Haiying Wang haiying.w...@freescale.com
There are some differences between CoreNet (P2040, P3041, P5020, P4080)
and and non-CoreNet (P1017, P1023) based SoCs in what features exist and
the memory maps.
* Rename various immap defines to remove _CORENET_ if they are shared
* Added P1023/P1017 specific memory offsets
* Only setup LIODNs or LIODN related code on CORENET based SoCs
(features doesn't exist on P1023/P1017)
Signed-off-by: Haiying Wang haiying.w...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/Makefile |2 +-
arch/powerpc/cpu/mpc85xx/portals.c| 32 +++-
arch/powerpc/cpu/mpc85xx/speed.c |7 +++
arch/powerpc/include/asm/fsl_liodn.h | 10 +-
arch/powerpc/include/asm/immap_85xx.h | 12 ++--
include/configs/corenet_ds.h |1 +
6 files changed, 43 insertions(+), 21 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile
b/arch/powerpc/cpu/mpc85xx/Makefile
index cc16db3..5791be0 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -69,7 +69,7 @@ COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
COBJS-$(CONFIG_FSL_CORENET) += liodn.o
COBJS-$(CONFIG_MP) += mp.o
COBJS-$(CONFIG_PCI)+= pci.o
-COBJS-$(CONFIG_FSL_CORENET) += portals.o
+COBJS-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
# various SoC specific assignments
COBJS-$(CONFIG_PPC_P3041) += p3041_ids.o
diff --git a/arch/powerpc/cpu/mpc85xx/portals.c
b/arch/powerpc/cpu/mpc85xx/portals.c
index 01aec6e..e8d53bb 100644
--- a/arch/powerpc/cpu/mpc85xx/portals.c
+++ b/arch/powerpc/cpu/mpc85xx/portals.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2008-2010 Freescale Semiconductor, Inc.
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -30,18 +30,13 @@
#include asm/fsl_portals.h
#include asm/fsl_liodn.h
-static ccsr_qman_t *qman = (void *)CONFIG_SYS_FSL_CORENET_QMAN_ADDR;
+static ccsr_qman_t *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR;
void setup_portals(void)
{
+#ifdef CONFIG_FSL_CORENET
int i;
- /* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */
-#ifdef CONFIG_PHYS_64BIT
- out_be32(qman-qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS 32));
-#endif
- out_be32(qman-qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS);
-
for (i = 0; i CONFIG_SYS_QMAN_NUM_PORTALS; i++) {
u8 sdest = qp_info[i].sdest;
u16 fliodn = qp_info[i].fliodn;
@@ -53,6 +48,13 @@ void setup_portals(void)
/* set frame liodn */
out_be32(qman-qcsp[i].qcsp_io_cfg, (sdest 16) | fliodn);
}
+#endif
+
+ /* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */
+#ifdef CONFIG_PHYS_64BIT
+ out_be32(qman-qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS 32));
+#endif
+ out_be32(qman-qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS);
}
/* Update portal containter to match LAW setup of portal in phy map */
@@ -118,9 +120,12 @@ void fdt_portal(void *blob, const char *compat, const char
*container,
static int fdt_qportal(void *blob, int off, int id, char *name,
enum fsl_dpaa_dev dev, int create)
{
- int childoff, dev_off, num, ret = 0;
+ int childoff, dev_off, ret = 0;
uint32_t dev_handle;
+#ifdef CONFIG_FSL_CORENET
+ int num;
u32 liodns[2];
+#endif
childoff = fdt_subnode_offset(blob, off, name);
if (create) {
@@ -154,9 +159,11 @@ static int fdt_qportal(void *blob, int off, int id, char
*name,
if (ret 0)
return ret;
+#ifdef CONFIG_FSL_CORENET
num = get_dpaa_liodn(dev, liodns[0], id);
ret = fdt_setprop(blob, childoff, fsl,liodn,
liodns[0], sizeof(u32) * num);
+#endif
} else {
return childoff;
}
@@ -184,7 +191,9 @@ void fdt_fixup_qportals(void *blob)
off = fdt_node_offset_by_compatible(blob, -1, fsl,qman-portal);
while (off != -FDT_ERR_NOTFOUND) {
+#ifdef CONFIG_FSL_CORENET
u32 liodns[2];
+#endif
const int *ci = fdt_getprop(blob, off, cell-index, NULL);
int j, i = *ci;
@@ -192,6 +201,7 @@ void fdt_fixup_qportals(void *blob)
if (err 0)
goto err;
+#ifdef CONFIG_FSL_CORENET
liodns[0] = qp_info[i].dliodn;
liodns[1] = qp_info[i].fliodn;
@@ -199,6 +209,7 @@ void fdt_fixup_qportals(void *blob)
liodns, sizeof(u32) * 2);
if (err 0)
goto err;
+#endif
i++;
@@ -207,6 +218,7 @@ void fdt_fixup_qportals(void *blob)
if (err 0)
goto err;
+#ifdef CONFIG_FSL_CORENET
#ifdef
