Secure Boot Target is added for T2080RDB
Changes:
For Secure boot, CPC is configured as SRAM and used as house
keeping area which needs to be disabled.
So CONFIG_SYS_CPC_REINIT_F is defined for CONFIG_T2080RDB.
Signed-off-by: Aneesh Bansal
---
arch/powerpc/include/asm/fsl_secure_boot.h | 1 +
boards.cfg | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h
b/arch/powerpc/include/asm/fsl_secure_boot.h
index 9a0cb20..74c5d8f 100644
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -20,6 +20,7 @@
#if defined(CONFIG_B4860QDS) || \
defined(CONFIG_T4240QDS) || \
defined(CONFIG_T2080QDS) || \
+ defined(CONFIG_T2080RDB) || \
defined(CONFIG_T1040QDS) || \
defined(CONFIG_T104xRDB)
#define CONFIG_SYS_CPC_REINIT_F
diff --git a/boards.cfg b/boards.cfg
index aac8b10..831c35d 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -969,6 +969,7 @@ Active powerpc mpc85xx- freescale
t208xqds
Active powerpc mpc85xx- freescale t208xqds
T2081QDS_SPIFLASH
T208xQDS:PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH
-
Active powerpc mpc85xx- freescale t208xqds
T2081QDS_SRIO_PCIE_BOOT
T208xQDS:PPC_T2081,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF4
-
Active powerpc mpc85xx- freescale t208xrdb
T2080RDB T208xRDB:PPC_T2080
-
+Active powerpc mpc85xx- freescale t208xrdb
T2080RDB_SECURE_BOOT T208xRDB:PPC_T2080,SECURE_BOOT
Aneesh Bansal
Active powerpc mpc85xx- freescale t208xrdb
T2080RDB_NAND
T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND
Active powerpc mpc85xx- freescale t208xrdb
T2080RDB_SDCARD
T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD
Active powerpc mpc85xx- freescale t208xrdb
T2080RDB_SPIFLASH
T208xRDB:PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH
--
1.8.1.4
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