Re: [U-Boot] [PATCH 2/3] at91: Update meesc board to new SoC access

[Wolfgang Denk]

Dear Daniel Gorsulowski,

In message <12785794723562-git-send-email-daniel.gorsulow...@esd.eu> you wrote:
> * convert meesc board to use c stucture SoC access
> * change gpio access to at91_gpio syntax
> * moved CONFIG_SYS_HZ below board and cpu defines (purely cosmetic)
> 
> Signed-off-by: Daniel Gorsulowski 
> ---
>  board/esd/meesc/meesc.c |  118 
> ---
>  include/configs/meesc.h |9 ++--
>  2 files changed, 65 insertions(+), 62 deletions(-)
> 
> diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
> index a1b66cb..1477fab 100644
> --- a/board/esd/meesc/meesc.c
> +++ b/board/esd/meesc/meesc.c
> @@ -1,12 +1,12 @@
>  /*
> + * (C) Copyright 2010
> + * Daniel Gorsulowski 
> + * esd electronic system design gmbh 
> + *
>   * (C) Copyright 2007-2008
>   * Stelian Pop 
>   * Lead Tech Design 
>   *
> - * (C) Copyright 2009
> - * Daniel Gorsulowski 
> - * esd electronic system design gmbh 
> - *

Are you really sure that the 2009 copyright should be removed? that
looks strange to me!


Best regards,

Wolfgang Denk

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[U-Boot] [PATCH 2/3] at91: Update meesc board to new SoC access

[Daniel Gorsulowski]

* convert meesc board to use c stucture SoC access
* change gpio access to at91_gpio syntax
* moved CONFIG_SYS_HZ below board and cpu defines (purely cosmetic)

Signed-off-by: Daniel Gorsulowski 
---
 board/esd/meesc/meesc.c |  118 ---
 include/configs/meesc.h |9 ++--
 2 files changed, 65 insertions(+), 62 deletions(-)

diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
index a1b66cb..1477fab 100644
--- a/board/esd/meesc/meesc.c
+++ b/board/esd/meesc/meesc.c
@@ -1,12 +1,12 @@
 /*
+ * (C) Copyright 2010
+ * Daniel Gorsulowski 
+ * esd electronic system design gmbh 
+ *
  * (C) Copyright 2007-2008
  * Stelian Pop 
  * Lead Tech Design 
  *
- * (C) Copyright 2009
- * Daniel Gorsulowski 
- * esd electronic system design gmbh 
- *
  * See file CREDITS for list of people who contributed to this
  * project.
  *
@@ -28,13 +28,13 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -52,10 +52,10 @@ int get_hw_rev(void)
if (hw_rev >= 0)
return hw_rev;
 
-   hw_rev = at91_get_gpio_value(AT91_PIN_PB19);
-   hw_rev |= at91_get_gpio_value(AT91_PIN_PB20) << 1;
-   hw_rev |= at91_get_gpio_value(AT91_PIN_PB21) << 2;
-   hw_rev |= at91_get_gpio_value(AT91_PIN_PB22) << 3;
+   hw_rev = at91_get_pio_value(AT91_PIO_PORTB, 19);
+   hw_rev |= at91_get_pio_value(AT91_PIO_PORTB, 20) << 1;
+   hw_rev |= at91_get_pio_value(AT91_PIO_PORTB, 21) << 2;
+   hw_rev |= at91_get_pio_value(AT91_PIO_PORTB, 22) << 3;
 
if (hw_rev == 15)
hw_rev = 0;
@@ -67,44 +67,44 @@ int get_hw_rev(void)
 static void meesc_nand_hw_init(void)
 {
unsigned long csa;
+   at91_smc_t  *smc= (at91_smc_t *) AT91_SMC0_BASE;
+   at91_matrix_t   *matrix = (at91_matrix_t *) AT91_MATRIX_BASE;
 
/* Enable CS3 */
-   csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
-   at91_sys_write(AT91_MATRIX_EBI0CSA,
-   csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
+   csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A;
+   writel(csa, &matrix->csa[0]);
 
/* Configure SMC CS3 for NAND/SmartMedia */
-   at91_sys_write(AT91_SMC_SETUP(3),
-   AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
-   AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-   at91_sys_write(AT91_SMC_PULSE(3),
-   AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
-   AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
-   at91_sys_write(AT91_SMC_CYCLE(3),
-   AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
-   at91_sys_write(AT91_SMC_MODE(3),
-   AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-   AT91_SMC_EXNWMODE_DISABLE |
-#ifdef CONFIG_SYS_NAND_DBW_16
-   AT91_SMC_DBW_16 |
-#else /* CONFIG_SYS_NAND_DBW_8 */
-   AT91_SMC_DBW_8 |
-#endif
-   AT91_SMC_TDF_(2));
+   writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
+   AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
+   &smc->cs[3].setup);
+
+   writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
+   AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
+   &smc->cs[3].pulse);
+
+   writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
+   &smc->cs[3].cycle);
+   writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
+   AT91_SMC_MODE_EXNW_DISABLE |
+  AT91_SMC_MODE_DBW_8 |
+  AT91_SMC_MODE_TDF_CYCLE(2),
+   &smc->cs[3].mode);
 
/* Configure RDY/BSY */
-   at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+   at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
 
/* Enable NandFlash */
-   at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+   at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 }
 #endif /* CONFIG_CMD_NAND */
 
 #ifdef CONFIG_MACB
 static void meesc_macb_hw_init(void)
 {
+   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
/* Enable clock */
-   at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC);
+   writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer);
at91_macb_hw_init();
 }
 #endif
@@ -117,26 +117,27 @@ static void meesc_macb_hw_init(void)
  */
 static void meesc_ethercat_hw_init(void)
 {
+   at91_smc_t  *smc1   = (at91_smc_t *) AT91_SMC1_BASE;
+
/* Configure SMC EBI1_CS0 for EtherCAT */
-   at91_sys_write(AT91_SMC1_SETUP(0),
-   AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
-   AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
-   at91_sys_write(AT91_SMC1_PULSE(0),
-   AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(9) |
-   AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(9));
-   at91_sys_write(AT91_SMC1_CYCLE(0),
-