Create a common header file for the RTC IP block that is shared between
davinci and am33xx.
Signed-off-by: Tom Rini tr...@ti.com
---
arch/arm/cpu/armv7/am33xx/board.c|7 ++--
arch/arm/include/asm/arch-am33xx/cpu.h |9 -
arch/arm/include/asm/arch-davinci/hardware.h | 38 ---
arch/arm/include/asm/davinci_rtc.h | 52 ++
board/enbw/enbw_cmc/enbw_cmc.c |1 +
drivers/bootcount/bootcount_davinci.c|3 +-
drivers/rtc/davinci.c|2 +-
7 files changed, 59 insertions(+), 53 deletions(-)
create mode 100644 arch/arm/include/asm/davinci_rtc.h
diff --git a/arch/arm/cpu/armv7/am33xx/board.c
b/arch/arm/cpu/armv7/am33xx/board.c
index 2ea3d69..8141fce 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -31,6 +31,7 @@
#include linux/usb/gadget.h
#include linux/usb/musb.h
#include asm/omap_musb.h
+#include asm/davinci_rtc.h
DECLARE_GLOBAL_DATA_PTR;
@@ -139,15 +140,15 @@ int arch_misc_init(void)
#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
static void rtc32k_enable(void)
{
- struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;
+ struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE;
/*
* Unlock the RTC's registers. For more details please see the
* RTC_SS section of the TRM. In order to unlock we need to
* write these specific values (keys) in this order.
*/
- writel(0x83e70b13, rtc-kick0r);
- writel(0x95a4f1e0, rtc-kick1r);
+ writel(RTC_KICK0R_WE, rtc-kick0r);
+ writel(RTC_KICK1R_WE, rtc-kick1r);
/* Enable the RTC 32K OSC by setting bits 3 and 6. */
writel((1 3) | (1 6), rtc-osc);
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h
b/arch/arm/include/asm/arch-am33xx/cpu.h
index 10b56e0..8626821 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -423,15 +423,6 @@ struct gptimer {
unsigned int tcar2; /* offset 0x58 */
};
-/* RTC Registers */
-struct rtc_regs {
- unsigned int res[21];
- unsigned int osc; /* offset 0x54 */
- unsigned int res2[5];
- unsigned int kick0r;/* offset 0x6c */
- unsigned int kick1r;/* offset 0x70 */
-};
-
/* UART Registers */
struct uart_sys {
unsigned int resv1[21];
diff --git a/arch/arm/include/asm/arch-davinci/hardware.h
b/arch/arm/include/asm/arch-davinci/hardware.h
index 05ecc78..7aaf4bf 100644
--- a/arch/arm/include/asm/arch-davinci/hardware.h
+++ b/arch/arm/include/asm/arch-davinci/hardware.h
@@ -613,42 +613,4 @@ static inline enum davinci_clk_ids get_async3_src(void)
#endif
-struct davinci_rtc {
- dv_reg second;
- dv_reg minutes;
- dv_reg hours;
- dv_reg day;
- dv_reg month; /* 0x10 */
- dv_reg year;
- dv_reg dotw;
- dv_reg resv1;
- dv_reg alarmsecond; /* 0x20 */
- dv_reg alarmminute;
- dv_reg alarmhour;
- dv_reg alarmday;
- dv_reg alarmmonth; /* 0x30 */
- dv_reg alarmyear;
- dv_reg resv2[2];
- dv_reg ctrl; /* 0x40 */
- dv_reg status;
- dv_reg irq;
- dv_reg complsb;
- dv_reg compmsb; /* 0x50 */
- dv_reg osc;
- dv_reg resv3[2];
- dv_reg scratch0; /* 0x60 */
- dv_reg scratch1;
- dv_reg scratch2;
- dv_reg kick0r;
- dv_reg kick1r; /* 0x70 */
-};
-
-#define RTC_STATE_BUSY 0x01
-#define RTC_STATE_RUN 0x02
-
-#define RTC_KICK0R_WE 0x83e70b13
-#define RTC_KICK1R_WE 0x95a4f1e0
-
-#define davinci_rtc_base ((struct davinci_rtc *)DAVINCI_RTC_BASE)
-
#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/include/asm/davinci_rtc.h
b/arch/arm/include/asm/davinci_rtc.h
new file mode 100644
index 000..575b590
--- /dev/null
+++ b/arch/arm/include/asm/davinci_rtc.h
@@ -0,0 +1,52 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn k...@koi8.net
+ *
+ * Based on:
+ *
+ * -
+ *
+ * linux/include/asm-arm/arch-davinci/hardware.h
+ *
+ * Copyright (C) 2006 Texas Instruments.
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+#ifndef __ASM_DAVINCI_RTC_H
+#define __ASM_DAVINCI_RTC_H
+
+struct davinci_rtc {
+ unsigned intsecond;
+ unsigned intminutes;
+ unsigned inthours;
+ unsigned intday;
+ unsigned intmonth; /* 0x10 */
+ unsigned intyear;
+ unsigned intdotw;
+ unsigned intresv1;
+ unsigned intalarmsecond; /* 0x20 */
+ unsigned intalarmminute;
+ unsigned intalarmhour;
+ unsigned intalarmday;
+ unsigned intalarmmonth; /* 0x30 */
+ unsigned intalarmyear;
+ unsigned intresv2[2];
+ unsigned intctrl; /* 0x40 */
+ unsigned intstatus;
+
