[U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-23 Thread Alan Carvalho de Assis
This patch adds support to iMX31PDK board to boot directly from NAND
Flash. In order to it works the previous patches (which reduces start.S
size and copy NAND code to RAM) need be applied first.

Signed-off-by: Alan Carvalho de Assis <[EMAIL PROTECTED]>
---
 board/freescale/mx31pdk/lowlevel_init.S |   95 +-
 board/freescale/mx31pdk/u-boot.lds  |3 +
 include/configs/mx31pdk.h   |   15 +++--
 3 files changed, 104 insertions(+), 9 deletions(-)

diff --git a/board/freescale/mx31pdk/lowlevel_init.S
b/board/freescale/mx31pdk/lowlevel_init.S
index f368d10..58f6d3d 100644
--- a/board/freescale/mx31pdk/lowlevel_init.S
+++ b/board/freescale/mx31pdk/lowlevel_init.S
@@ -20,11 +20,98 @@
  * MA 02111-1307 USA
  */

-/*
- * This is just to keep the linker happy.
- */
+#include 
+
+.macro REG reg, val
+   ldr r2, =\reg
+   ldr r3, =\val
+   str r3, [r2]
+.endm
+
+.macro REG8 reg, val
+   ldr r2, =\reg
+   ldr r3, =\val
+   strb r3, [r2]
+.endm
+
+.macro DELAY loops
+   ldr r2, =\loops
+1:
+   subsr2, r2, #1
+   nop
+   bcs 1b
+.endm

 .globl lowlevel_init
 lowlevel_init:
-   mov pc, lr
+   /* Store return address on the stack since lr is re-used in this file */
+   /* and all other registers are re-used as well */
+   str lr, [sp]
+
+   /* Also setup the Peripheral Port Remap register inside the core */
+   ldr r0, =ARM_PPMRR  /* start from AIPS 2GB region */
+   mcr p15, 0, r0, c15, c2, 4
+
+   REG IPU_CONF, IPU_CONF_DI_EN
+   REG CCM_CCMR, 0x074B0BF5
+
+   DELAY 0x4
+
+   REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE
+   REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS
+
+   /* Set up clock to 532MHz */
+   REG CCM_PDR0, 0xFF871D58
+   REG CCM_MPCTL, 0x0033280C
+   REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
+
+   /* Set up CPLD on CS5 */
+   REG CSCR_U(5), 0xD843
+   REG CSCR_L(5), 0x22252521
+   REG CSCR_A(5), 0x0A00
+
+   /* Set up MX31 DDR Memory Controller */
+   REG 0x43FAC26C, 0 /* SDCLK */
+   REG 0x43FAC270, 0 /* CAS */
+   REG 0x43FAC274, 0 /* RAS */
+   REG 0x43FAC27C, 0x1000 /* CS2   CSD0) */
+   REG 0x43FAC284, 0 /* DQM3 */
+   REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10   
0x288..0x2DC) */
+   REG 0x43FAC28C, 0
+   REG 0x43FAC290, 0
+   REG 0x43FAC294, 0
+   REG 0x43FAC298, 0
+   REG 0x43FAC29C, 0
+   REG 0x43FAC2A0, 0
+   REG 0x43FAC2A4, 0
+   REG 0x43FAC2A8, 0
+   REG 0x43FAC2AC, 0
+   REG 0x43FAC2B0, 0
+   REG 0x43FAC2B4, 0
+   REG 0x43FAC2B8, 0
+   REG 0x43FAC2BC, 0
+   REG 0x43FAC2C0, 0
+   REG 0x43FAC2C4, 0
+   REG 0x43FAC2C8, 0
+   REG 0x43FAC2CC, 0
+   REG 0x43FAC2D0, 0
+   REG 0x43FAC2D4, 0
+   REG 0x43FAC2D8, 0
+   REG 0x43FAC2DC, 0
+   REG 0xB8001010, 0x0004
+   REG 0xB8001004, 0x006ac73a
+   REG 0xB8001000, 0x9210
+   REG 0x8f00, 0x12344321
+   REG 0xB8001000, 0xa210
+   REG 0x8000, 0x12344321
+   REG 0x8000, 0x12344321
+   REG 0xB8001000, 0xb210
+   REG80x8033, 0xda
+   REG80x8100, 0xff
+   REG 0xB8001000, 0x82226080
+   REG 0x8000, 0xDEADBEEF
+   REG 0xB8001010, 0x000c
+
+   /* Copy from NAND to RAM */
+   b nand_copy

diff --git a/board/freescale/mx31pdk/u-boot.lds
b/board/freescale/mx31pdk/u-boot.lds
index 04a8f77..1cfa3ca 100644
--- a/board/freescale/mx31pdk/u-boot.lds
+++ b/board/freescale/mx31pdk/u-boot.lds
@@ -35,6 +35,9 @@ SECTIONS
.text  :
{
cpu/arm1136/start.o (.text)
+   board/freescale/mx31pdk/lowlevel_init.o (.text)
+   cpu/arm1136/mx31/nand_copy.o(.text)
+   . = 2K; /* lowlevel NAND needs to fit in 2KB of NFC buffer */
*(.text)
}

diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 5752856..183b0f3 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -38,6 +38,9 @@
 #define CONFIG_MX31_HCLK_FREQ  2600
 #define CONFIG_MX31_CLK32  32768

+/* We are booting from NAND. Used to shrink start.S */
+#define CONFIG_BOOT_FROM_NAND  1
+
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO

@@ -45,11 +48,6 @@
 #define CONFIG_SETUP_MEMORY_TAGS   1
 #define CONFIG_INITRD_TAG  1

-/* No support for NAND boot for i.MX31 PDK yet, so we rely on some other
- * program to initialize the SDRAM.
- */
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
 /*
  * Size of malloc() pool
  */
@@ -136,6 +134,13 @@
 #define CONFIG_CMDLINE_EDITING 1

 /*---

Re: [U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-23 Thread Magnus Lilja
> Yes, I confirmed with the schematics. There is a 32768kHz crystal connected 
> to the PMIC that drives the MX31 clock.
>
> Regards,
>
> Fabio Estevam
>
>> I haven't tried my new patch on real hardware yet, but
>> I'll do that
>> tomorrow and post a patch (without the do_div() fix though,
>> perhaps
>> someone else can do that?).

Ok, the patches have been posted now. The first one is a quick
workaround for the div-problem, if someone has a better solution
please use that instead. The second one is my updated basic i.MX31 PDK
patch, now rebased and tested on hardware using a JTAG debugger to
load it.

Regards, Magnus
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Re: [U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-22 Thread Fabio Estevam

Magnus,

--- On Wed, 10/22/08, Magnus Lilja <[EMAIL PROTECTED]> wrote:

> From: Magnus Lilja <[EMAIL PROTECTED]>
> Subject: Re: [U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots 
> from NAND Flash
> To: "Wolfgang Denk" <[EMAIL PROTECTED]>
> Cc: u-boot@lists.denx.de, "Alan Carvalho de Assis" <[EMAIL PROTECTED]>
> Date: Wednesday, October 22, 2008, 4:52 PM
> 2008/10/22 Magnus Lilja <[EMAIL PROTECTED]>:
> > Wolfgang,
> >
> >
> > 2008/10/22 Wolfgang Denk <[EMAIL PROTECTED]>:
> >> Dear Magnus,
> >>
> >> In message
> <[EMAIL PROTECTED]>
> you wrote:
> >>>
> >>> I've updated the patch and it now almost
> compiles. There's a problem
> >>> at the last link stage where gnu-ld complains
> about multiple __udivsi3
> >>> definitions and incompatible EABI formats (see
> below, modulo gmail
> >>> wrapping).
> >>
> >> Try this patch which I posted today:
> >> ARM: Use do_div() instead of division for
> "long long".
> >
> > That patch doesn't seem to touch any files that
> are involved in
> > building i.MX31 boards. I might try the equivalent
> change though.
> > Although it is a bit puzzling that I can build the
> i.MX31 Litekit
> > board with the same toolchain.
> 
> Ok, I've found what's triggering this. The PDK
> board has
> CONFIG_MX31_CLK32=32768 while Litekit has
> CONIFG_MX31_CLK32=32000.
> That difference nowadays causes problems when linking, I
> suppose that
> happened after the merging of
> CONFIG_MX31_TIMER_HIGH_PRECISION.
> 
> Changing the TICK_TO_TIME macro in
> arm1176/mx31/interrupts.c to a
> construction that uses do_div()  solves the problem.
> 
> I don't have the PDK schematics here but since I
> decided to set CLK32
> to 32768 I suppose the board uses that frequency.

Yes, I confirmed with the schematics. There is a 32768kHz crystal connected to 
the PMIC that drives the MX31 clock.

Regards,

Fabio Estevam

> I haven't tried my new patch on real hardware yet, but
> I'll do that
> tomorrow and post a patch (without the do_div() fix though,
> perhaps
> someone else can do that?).
> 
> /Magnus
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Re: [U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-22 Thread Magnus Lilja
2008/10/22 Magnus Lilja <[EMAIL PROTECTED]>:
> Wolfgang,
>
>
> 2008/10/22 Wolfgang Denk <[EMAIL PROTECTED]>:
>> Dear Magnus,
>>
>> In message <[EMAIL PROTECTED]> you wrote:
>>>
>>> I've updated the patch and it now almost compiles. There's a problem
>>> at the last link stage where gnu-ld complains about multiple __udivsi3
>>> definitions and incompatible EABI formats (see below, modulo gmail
>>> wrapping).
>>
>> Try this patch which I posted today:
>> ARM: Use do_div() instead of division for "long long".
>
> That patch doesn't seem to touch any files that are involved in
> building i.MX31 boards. I might try the equivalent change though.
> Although it is a bit puzzling that I can build the i.MX31 Litekit
> board with the same toolchain.

Ok, I've found what's triggering this. The PDK board has
CONFIG_MX31_CLK32=32768 while Litekit has CONIFG_MX31_CLK32=32000.
That difference nowadays causes problems when linking, I suppose that
happened after the merging of CONFIG_MX31_TIMER_HIGH_PRECISION.

Changing the TICK_TO_TIME macro in arm1176/mx31/interrupts.c to a
construction that uses do_div()  solves the problem.

I don't have the PDK schematics here but since I decided to set CLK32
to 32768 I suppose the board uses that frequency.

I haven't tried my new patch on real hardware yet, but I'll do that
tomorrow and post a patch (without the do_div() fix though, perhaps
someone else can do that?).

/Magnus
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Re: [U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-22 Thread Magnus Lilja
Wolfgang,


2008/10/22 Wolfgang Denk <[EMAIL PROTECTED]>:
> Dear Magnus,
>
> In message <[EMAIL PROTECTED]> you wrote:
>>
>> I've updated the patch and it now almost compiles. There's a problem
>> at the last link stage where gnu-ld complains about multiple __udivsi3
>> definitions and incompatible EABI formats (see below, modulo gmail
>> wrapping).
>
> Try this patch which I posted today:
> ARM: Use do_div() instead of division for "long long".

That patch doesn't seem to touch any files that are involved in
building i.MX31 boards. I might try the equivalent change though.
Although it is a bit puzzling that I can build the i.MX31 Litekit
board with the same toolchain.

/Magnus
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Re: [U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-22 Thread Wolfgang Denk
Dear Magnus,

In message <[EMAIL PROTECTED]> you wrote:
> 
> I've updated the patch and it now almost compiles. There's a problem
> at the last link stage where gnu-ld complains about multiple __udivsi3
> definitions and incompatible EABI formats (see below, modulo gmail
> wrapping).

Try this patch which I posted today:
ARM: Use do_div() instead of division for "long long".

Best regards,

Wolfgang Denk

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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-22 Thread Magnus Lilja
>> I can't rebase [PATCH 3/3] on u-boot-arm/master because it applies over
>> Magnus Lilja's patch "i.MX31: Add basic support for Freescale's i.MX31
>> PDK board." (968614d8c3f17eb834838de9a390ef4879fb1e77)
>>
>> Can you please pull this patch from u-boot-arm/testing to
>> u-boot-arm/master ?
>
> No the patch need to be rebased first.
>
> Magnus could you rebase it?
> It will save me times

I've updated the patch and it now almost compiles. There's a problem
at the last link stage where gnu-ld complains about multiple __udivsi3
definitions and incompatible EABI formats (see below, modulo gmail
wrapping).

I can compile the imx31_litekit just fine and that board is very
similar to the initial mx31pdk board.

Any ideas on what may be causing this?

/Magnus

UNDEF_SYM=`arm-none-linux-gnueabi-objdump -x
board/freescale/mx31pdk/libmx31pdk.a lib_generic/libgeneric.a
lib_generic/lzma/liblzma.a board/freescale/common/libfreescale.a
cpu/arm1136/libarm1136.a cpu/arm1136/mx31/libmx31.a lib_arm/libarm.a
fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a
fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a
fs/yaffs2/libyaffs2.a net/libnet.a disk/libdisk.a
drivers/bios_emulator/libatibiosemu.a drivers/block/libblock.a
drivers/dma/libdma.a drivers/hwmon/libhwmon.a drivers/i2c/libi2c.a
drivers/input/libinput.a drivers/misc/libmisc.a drivers/mmc/libmmc.a
drivers/mtd/libmtd.a drivers/mtd/nand/libnand.a
drivers/mtd/nand_legacy/libnand_legacy.a
drivers/mtd/onenand/libonenand.a drivers/mtd/spi/libspi_flash.a
drivers/net/libnet.a drivers/net/phy/libphy.a
drivers/net/sk98lin/libsk98lin.a drivers/pci/libpci.a
drivers/pcmcia/libpcmcia.a drivers/spi/libspi.a drivers/rtc/librtc.a
drivers/serial/libserial.a drivers/usb/libusb.a
drivers/video/libvideo.a common/libcommon.a libfdt/libfdt.a
api/libapi.a post/libpost.a | \
sed  -n -e 's/.*\(__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
cd /opt/git/u-boot && arm-none-linux-gnueabi-ld -Bstatic -T
/opt/git/u-boot/board/freescale/mx31pdk/u-boot.lds  -Ttext 0x87f0
$UNDEF_SYM cpu/arm1136/start.o \
--start-group lib_generic/libgeneric.a 
lib_generic/lzma/liblzma.a
board/freescale/common/libfreescale.a cpu/arm1136/libarm1136.a
cpu/arm1136/mx31/libmx31.a lib_arm/libarm.a fs/cramfs/libcramfs.a
fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a
fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a fs/yaffs2/libyaffs2.a
net/libnet.a disk/libdisk.a drivers/bios_emulator/libatibiosemu.a
drivers/block/libblock.a drivers/dma/libdma.a drivers/hwmon/libhwmon.a
drivers/i2c/libi2c.a drivers/input/libinput.a drivers/misc/libmisc.a
drivers/mmc/libmmc.a drivers/mtd/libmtd.a drivers/mtd/nand/libnand.a
drivers/mtd/nand_legacy/libnand_legacy.a
drivers/mtd/onenand/libonenand.a drivers/mtd/spi/libspi_flash.a
drivers/net/libnet.a drivers/net/phy/libphy.a
drivers/net/sk98lin/libsk98lin.a drivers/pci/libpci.a
drivers/pcmcia/libpcmcia.a drivers/spi/libspi.a drivers/rtc/librtc.a
drivers/serial/libserial.a drivers/usb/libusb.a
drivers/video/libvideo.a common/libcommon.a libfdt/libfdt.a
api/libapi.a post/libpost.a board/freescale/mx31pdk/libmx31pdk.a
--end-group -L 
/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/lib/gcc/arm-none-linux-gnueabi/4.1.2
-lgcc \
-Map u-boot.map -o u-boot
/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/lib/gcc/arm-none-linux-gnueabi/4.1.2/libgcc.a(_udivsi3.o):
In function `__aeabi_uidiv':
/usr/src/redhat/BUILD/cross-mlib/source/gcc-4.1.2/gcc/config/arm/lib1funcs.asm:730:
multiple definition of `__udivsi3'
lib_arm/libarm.a(_udivsi3.o):/opt/git/u-boot/lib_arm/_udivsi3.S:17:
first defined here
arm-none-linux-gnueabi-ld: Warning: size of symbol `__udivsi3' changed
from 152 in lib_arm/libarm.a(_udivsi3.o) to 496 in
/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/lib/gcc/arm-none-linux-gnueabi/4.1.2/libgcc.a(_udivsi3.o)
arm-none-linux-gnueabi-ld: ERROR: Source object
/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/lib/gcc/arm-none-linux-gnueabi/4.1.2/libgcc.a(_udivdi3.o)
has EABI version 4, but target u-boot has EABI version 0
arm-none-linux-gnueabi-ld: failed to merge target specific data of
file 
/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/lib/gcc/arm-none-linux-gnueabi/4.1.2/libgcc.a(_udivdi3.o)
arm-none-linux-gnueabi-ld: ERROR: Source object
/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/lib/gcc/arm-none-linux-gnueabi/4.1.2/libgcc.a(_udivsi3.o)
has EABI version 4, but target u-boot has EABI version 0
arm-none-linux-gnueabi-ld: failed to merge target specific data of
file 
/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/lib/gcc/arm-none-linux-gnueabi/4.1.2/libgcc.a(_udivsi3.o)
arm-none-linux-gnueabi-ld: ERROR: Source object
/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/lib/gcc/arm-none-linux

Re: [U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-22 Thread Jean-Christophe PLAGNIOL-VILLARD
> > > + REG80x8033, 0xda
> > > + REG80x8100, 0xff
> > > + REG 0xB8001000, 0x82226080
> > > + REG 0x8000, 0xDEADBEEF
> > > + REG 0xB8001010, 0x000c
> > > +
> > > + /* Copy from NAND to RAM */
> > > + b nand_copy
> > > 
> > > diff --git a/board/freescale/mx31pdk/u-boot.lds
> > > b/board/freescale/mx31pdk/u-boot.lds
> > > index 1460adc..8602f3e 100644
> > > --- a/board/freescale/mx31pdk/u-boot.lds
> > > +++ b/board/freescale/mx31pdk/u-boot.lds
> > > @@ -35,6 +35,9 @@ SECTIONS
> > >   .text  :
> > >   {
> > > cpu/arm1136/start.o   (.text)
> > ^^
> > please use tab
> > > +   board/freescale/mx31pdk/lowlevel_init.o   (.text)
> > ^^
> > > +   cpu/arm1136/mx31/nand_copy.o  (.text)
> > ^^
> > > +   . = 2K; /* lowlevel NAND needs to fit in 2KB of NFC buffer */
> > ^^
> > > *(.text)
> > ^^
> > >   }
> > 
> > Best Regards,
> > J.
> 
> I can't rebase [PATCH 3/3] on u-boot-arm/master because it applies over
> Magnus Lilja's patch "i.MX31: Add basic support for Freescale's i.MX31
> PDK board." (968614d8c3f17eb834838de9a390ef4879fb1e77)
> 
> Can you please pull this patch from u-boot-arm/testing to
> u-boot-arm/master ?

No the patch need to be rebased first.

Magnus could you rebase it?
It will save me times

Best Regards,
J.
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Re: [U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-22 Thread Alan Carvalho de Assis
Hi Jean,

On Wed, 2008-10-22 at 11:59 +0200, Jean-Christophe PLAGNIOL-VILLARD wrote:
> On 15:01 Tue 07 Oct , Alan Carvalho de Assis wrote:
> > >From ae5af322e53d00d021f6d4aa39c6916e1d3e12b7 Mon Sep 17 00:00:00 2001
> > From: Alan Carvalho de Assis <[EMAIL PROTECTED]>
> > Date: Sun, 5 Oct 2008 20:00:59 -0300
> > Subject: [PATCH] iMX31: Add support to iMX31PDK board boots from NAND Flash
> > 
> > This patch adds support to iMX31PDK board to boot directly from NAND
> > Flash. In order to it works the previous patches (which reduces start.S
> > size and copy NAND code to RAM) need be applied first.
> > 
> > Signed-off-by: Alan Carvalho de Assis <[EMAIL PROTECTED]>
> > ---
> >  board/freescale/mx31pdk/lowlevel_init.S |   95 
> > +-
> >  board/freescale/mx31pdk/u-boot.lds  |3 +
> >  include/configs/mx31pdk.h   |   16 --
> >  3 files changed, 105 insertions(+), 9 deletions(-)
> > 
>   Please rebase against u-boot-arm/master otherwhise ACK execpt some
>   whitespace see comment below
> 
>   Best Regards,
>   J.
> > diff --git a/board/freescale/mx31pdk/lowlevel_init.S
> > b/board/freescale/mx31pdk/lowlevel_init.S
> > index a94ea7f..71ab612 100644
> > --- a/board/freescale/mx31pdk/lowlevel_init.S
> > +++ b/board/freescale/mx31pdk/lowlevel_init.S
> > @@ -20,11 +20,98 @@
> >   * MA 02111-1307 USA
> >   */
> > 
> > -/*
> > - * This is just to keep the linker happy.
> > - */
> > +#include 
> > +
> > +.macro REG reg, val
> > +   ldr r2, =\reg
> > +   ldr r3, =\val
> > +   str r3, [r2]
> > +.endm
> > +
> > +.macro REG8 reg, val
> > +   ldr r2, =\reg
> > +   ldr r3, =\val
> > +   strb r3, [r2]
> > +.endm
> > +
> > +.macro DELAY loops
> > +   ldr r2, =\loops
> > +1:
> > +   subsr2, r2, #1
> > +   nop
> > +   bcs 1b
> > +.endm
> > 
> >  .globl lowlevel_init
> >  lowlevel_init:
> > -   mov pc, lr
> > +   /* Store return address on the stack since lr is re-used in this file */
> > +   /* and all other registers are re-used as well */
> > +   str lr, [sp]
> > +
> > +   /* Also setup the Peripheral Port Remap register inside the core */
> > +   ldr r0, =ARM_PPMRR/* start from AIPS 2GB region */
>   
>   please use tab
> > +   mcr p15, 0, r0, c15, c2, 4
> > +
> > +   REG IPU_CONF, IPU_CONF_DI_EN
> > +   REG CCM_CCMR, 0x074B0BF5
> > +
> > +   DELAY 0x4
> > +
> > +   REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE
> > +   REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS
> > +
> > +   /* Set up clock to 532MHz */
> > +   REG CCM_PDR0, 0xFF871D58
> > +   REG CCM_MPCTL, 0x0033280C
> > +   REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
> > +
> > +   /* Set up CPLD on CS5 */
> > +   REG CSCR_U(5), 0xD843
> > +   REG CSCR_L(5), 0x22252521
> > +   REG CSCR_A(5), 0x0A00
> > +
> > +   /* Set up MX31 DDR Memory Controller */
> > +   REG 0x43FAC26C, 0 /* SDCLK */
> > +   REG 0x43FAC270, 0 /* CAS */
> > +   REG 0x43FAC274, 0 /* RAS */
> > +   REG 0x43FAC27C, 0x1000 /* CS2   CSD0) */
> > +   REG 0x43FAC284, 0 /* DQM3 */
> > +   REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10   
> > 0x288..0x2DC) */
> > +   REG 0x43FAC28C, 0
> > +   REG 0x43FAC290, 0
> > +   REG 0x43FAC294, 0
> > +   REG 0x43FAC298, 0
> > +   REG 0x43FAC29C, 0
> > +   REG 0x43FAC2A0, 0
> > +   REG 0x43FAC2A4, 0
> > +   REG 0x43FAC2A8, 0
> > +   REG 0x43FAC2AC, 0
> > +   REG 0x43FAC2B0, 0
> > +   REG 0x43FAC2B4, 0
> > +   REG 0x43FAC2B8, 0
> > +   REG 0x43FAC2BC, 0
> > +   REG 0x43FAC2C0, 0
> > +   REG 0x43FAC2C4, 0
> > +   REG 0x43FAC2C8, 0
> > +   REG 0x43FAC2CC, 0
> > +   REG 0x43FAC2D0, 0
> > +   REG 0x43FAC2D4, 0
> > +   REG 0x43FAC2D8, 0
> > +   REG 0x43FAC2DC, 0
> > +   REG 0xB8001010, 0x0004
> > +   REG 0xB8001004, 0x006ac73a
> > +   REG 0xB8001000, 0x9210
> > +   REG 0x8f00, 0x12344321
> > +   REG 0xB8001000, 0xa210
> > +   REG 0x8000, 0x12344321
> > +   REG 0x8000, 0x12344321
> > +   REG 0xB8001000, 0xb210
> > +   REG80x8033, 0xda
> > +   REG80x8100, 0xff
> > +   REG 0xB8001000, 0x82226080
> > +   REG 0x8000, 0xDEADBEEF
> > +   REG 0xB8001010, 0x000c
> > +
> > +   /* Copy from NAND to RAM */
> > +   b nand_copy
> > 
> > diff --git a/board/freescale/mx31pdk/u-boot.lds
> > b/board/freescale/mx31pdk/u-boot.lds
> > index 1460adc..8602f3e 100644
> > --- a/board/freescale/mx31pdk/u-boot.lds
> > +++ b/board/freescale/mx31pdk/u-boot.lds
> > @@ -35,6 +35,9 @@ SECTIONS
> > .text  :
> > {
> >   cpu/arm1136/start.o   (.text)
> ^^
>   please use tab
> > + board/freescale/mx31pdk/lowlevel_init.o   (.text)
> ^^
> > + cpu/arm1136/mx31/nand_copy.o  (.text)
> ^^
> > + . = 2K; /* lowlevel NAND needs to fit in 2KB of NFC buffer */
> ^^
>

Re: [U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-22 Thread Jean-Christophe PLAGNIOL-VILLARD
On 15:01 Tue 07 Oct , Alan Carvalho de Assis wrote:
> >From ae5af322e53d00d021f6d4aa39c6916e1d3e12b7 Mon Sep 17 00:00:00 2001
> From: Alan Carvalho de Assis <[EMAIL PROTECTED]>
> Date: Sun, 5 Oct 2008 20:00:59 -0300
> Subject: [PATCH] iMX31: Add support to iMX31PDK board boots from NAND Flash
> 
> This patch adds support to iMX31PDK board to boot directly from NAND
> Flash. In order to it works the previous patches (which reduces start.S
> size and copy NAND code to RAM) need be applied first.
> 
> Signed-off-by: Alan Carvalho de Assis <[EMAIL PROTECTED]>
> ---
>  board/freescale/mx31pdk/lowlevel_init.S |   95 +-
>  board/freescale/mx31pdk/u-boot.lds  |3 +
>  include/configs/mx31pdk.h   |   16 --
>  3 files changed, 105 insertions(+), 9 deletions(-)
> 
  Please rebase against u-boot-arm/master otherwhise ACK execpt some
  whitespace see comment below

  Best Regards,
  J.
> diff --git a/board/freescale/mx31pdk/lowlevel_init.S
> b/board/freescale/mx31pdk/lowlevel_init.S
> index a94ea7f..71ab612 100644
> --- a/board/freescale/mx31pdk/lowlevel_init.S
> +++ b/board/freescale/mx31pdk/lowlevel_init.S
> @@ -20,11 +20,98 @@
>   * MA 02111-1307 USA
>   */
> 
> -/*
> - * This is just to keep the linker happy.
> - */
> +#include 
> +
> +.macro REG reg, val
> + ldr r2, =\reg
> + ldr r3, =\val
> + str r3, [r2]
> +.endm
> +
> +.macro REG8 reg, val
> + ldr r2, =\reg
> + ldr r3, =\val
> + strb r3, [r2]
> +.endm
> +
> +.macro DELAY loops
> + ldr r2, =\loops
> +1:
> + subsr2, r2, #1
> + nop
> + bcs 1b
> +.endm
> 
>  .globl lowlevel_init
>  lowlevel_init:
> - mov pc, lr
> + /* Store return address on the stack since lr is re-used in this file */
> + /* and all other registers are re-used as well */
> + str lr, [sp]
> +
> + /* Also setup the Peripheral Port Remap register inside the core */
> + ldr r0, =ARM_PPMRR/* start from AIPS 2GB region */
  
please use tab
> + mcr p15, 0, r0, c15, c2, 4
> +
> + REG IPU_CONF, IPU_CONF_DI_EN
> + REG CCM_CCMR, 0x074B0BF5
> +
> + DELAY 0x4
> +
> + REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE
> + REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS
> +
> + /* Set up clock to 532MHz */
> + REG CCM_PDR0, 0xFF871D58
> + REG CCM_MPCTL, 0x0033280C
> + REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
> +
> + /* Set up CPLD on CS5 */
> + REG CSCR_U(5), 0xD843
> + REG CSCR_L(5), 0x22252521
> + REG CSCR_A(5), 0x0A00
> +
> + /* Set up MX31 DDR Memory Controller */
> + REG 0x43FAC26C, 0 /* SDCLK */
> + REG 0x43FAC270, 0 /* CAS */
> + REG 0x43FAC274, 0 /* RAS */
> + REG 0x43FAC27C, 0x1000 /* CS2   CSD0) */
> + REG 0x43FAC284, 0 /* DQM3 */
> + REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10   
> 0x288..0x2DC) */
> + REG 0x43FAC28C, 0
> + REG 0x43FAC290, 0
> + REG 0x43FAC294, 0
> + REG 0x43FAC298, 0
> + REG 0x43FAC29C, 0
> + REG 0x43FAC2A0, 0
> + REG 0x43FAC2A4, 0
> + REG 0x43FAC2A8, 0
> + REG 0x43FAC2AC, 0
> + REG 0x43FAC2B0, 0
> + REG 0x43FAC2B4, 0
> + REG 0x43FAC2B8, 0
> + REG 0x43FAC2BC, 0
> + REG 0x43FAC2C0, 0
> + REG 0x43FAC2C4, 0
> + REG 0x43FAC2C8, 0
> + REG 0x43FAC2CC, 0
> + REG 0x43FAC2D0, 0
> + REG 0x43FAC2D4, 0
> + REG 0x43FAC2D8, 0
> + REG 0x43FAC2DC, 0
> + REG 0xB8001010, 0x0004
> + REG 0xB8001004, 0x006ac73a
> + REG 0xB8001000, 0x9210
> + REG 0x8f00, 0x12344321
> + REG 0xB8001000, 0xa210
> + REG 0x8000, 0x12344321
> + REG 0x8000, 0x12344321
> + REG 0xB8001000, 0xb210
> + REG80x8033, 0xda
> + REG80x8100, 0xff
> + REG 0xB8001000, 0x82226080
> + REG 0x8000, 0xDEADBEEF
> + REG 0xB8001010, 0x000c
> +
> + /* Copy from NAND to RAM */
> + b nand_copy
> 
> diff --git a/board/freescale/mx31pdk/u-boot.lds
> b/board/freescale/mx31pdk/u-boot.lds
> index 1460adc..8602f3e 100644
> --- a/board/freescale/mx31pdk/u-boot.lds
> +++ b/board/freescale/mx31pdk/u-boot.lds
> @@ -35,6 +35,9 @@ SECTIONS
>   .text  :
>   {
> cpu/arm1136/start.o   (.text)
^^
please use tab
> +   board/freescale/mx31pdk/lowlevel_init.o   (.text)
^^
> +   cpu/arm1136/mx31/nand_copy.o  (.text)
^^
> +   . = 2K; /* lowlevel NAND needs to fit in 2KB of NFC buffer */
^^
> *(.text)
^^
>   }

Best Regards,
J.
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[U-Boot] [PATCH 3/3] iMX31: Add support to iMX31PDK board boots from NAND Flash

2008-10-07 Thread Alan Carvalho de Assis
>From ae5af322e53d00d021f6d4aa39c6916e1d3e12b7 Mon Sep 17 00:00:00 2001
From: Alan Carvalho de Assis <[EMAIL PROTECTED]>
Date: Sun, 5 Oct 2008 20:00:59 -0300
Subject: [PATCH] iMX31: Add support to iMX31PDK board boots from NAND Flash

This patch adds support to iMX31PDK board to boot directly from NAND
Flash. In order to it works the previous patches (which reduces start.S
size and copy NAND code to RAM) need be applied first.

Signed-off-by: Alan Carvalho de Assis <[EMAIL PROTECTED]>
---
 board/freescale/mx31pdk/lowlevel_init.S |   95 +-
 board/freescale/mx31pdk/u-boot.lds  |3 +
 include/configs/mx31pdk.h   |   16 --
 3 files changed, 105 insertions(+), 9 deletions(-)

diff --git a/board/freescale/mx31pdk/lowlevel_init.S
b/board/freescale/mx31pdk/lowlevel_init.S
index a94ea7f..71ab612 100644
--- a/board/freescale/mx31pdk/lowlevel_init.S
+++ b/board/freescale/mx31pdk/lowlevel_init.S
@@ -20,11 +20,98 @@
  * MA 02111-1307 USA
  */

-/*
- * This is just to keep the linker happy.
- */
+#include 
+
+.macro REG reg, val
+   ldr r2, =\reg
+   ldr r3, =\val
+   str r3, [r2]
+.endm
+
+.macro REG8 reg, val
+   ldr r2, =\reg
+   ldr r3, =\val
+   strb r3, [r2]
+.endm
+
+.macro DELAY loops
+   ldr r2, =\loops
+1:
+   subsr2, r2, #1
+   nop
+   bcs 1b
+.endm

 .globl lowlevel_init
 lowlevel_init:
-   mov pc, lr
+   /* Store return address on the stack since lr is re-used in this file */
+   /* and all other registers are re-used as well */
+   str lr, [sp]
+
+   /* Also setup the Peripheral Port Remap register inside the core */
+   ldr r0, =ARM_PPMRR/* start from AIPS 2GB region */
+   mcr p15, 0, r0, c15, c2, 4
+
+   REG IPU_CONF, IPU_CONF_DI_EN
+   REG CCM_CCMR, 0x074B0BF5
+
+   DELAY 0x4
+
+   REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE
+   REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS
+
+   /* Set up clock to 532MHz */
+   REG CCM_PDR0, 0xFF871D58
+   REG CCM_MPCTL, 0x0033280C
+   REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1)
+
+   /* Set up CPLD on CS5 */
+   REG CSCR_U(5), 0xD843
+   REG CSCR_L(5), 0x22252521
+   REG CSCR_A(5), 0x0A00
+
+   /* Set up MX31 DDR Memory Controller */
+   REG 0x43FAC26C, 0 /* SDCLK */
+   REG 0x43FAC270, 0 /* CAS */
+   REG 0x43FAC274, 0 /* RAS */
+   REG 0x43FAC27C, 0x1000 /* CS2   CSD0) */
+   REG 0x43FAC284, 0 /* DQM3 */
+   REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10   
0x288..0x2DC) */
+   REG 0x43FAC28C, 0
+   REG 0x43FAC290, 0
+   REG 0x43FAC294, 0
+   REG 0x43FAC298, 0
+   REG 0x43FAC29C, 0
+   REG 0x43FAC2A0, 0
+   REG 0x43FAC2A4, 0
+   REG 0x43FAC2A8, 0
+   REG 0x43FAC2AC, 0
+   REG 0x43FAC2B0, 0
+   REG 0x43FAC2B4, 0
+   REG 0x43FAC2B8, 0
+   REG 0x43FAC2BC, 0
+   REG 0x43FAC2C0, 0
+   REG 0x43FAC2C4, 0
+   REG 0x43FAC2C8, 0
+   REG 0x43FAC2CC, 0
+   REG 0x43FAC2D0, 0
+   REG 0x43FAC2D4, 0
+   REG 0x43FAC2D8, 0
+   REG 0x43FAC2DC, 0
+   REG 0xB8001010, 0x0004
+   REG 0xB8001004, 0x006ac73a
+   REG 0xB8001000, 0x9210
+   REG 0x8f00, 0x12344321
+   REG 0xB8001000, 0xa210
+   REG 0x8000, 0x12344321
+   REG 0x8000, 0x12344321
+   REG 0xB8001000, 0xb210
+   REG80x8033, 0xda
+   REG80x8100, 0xff
+   REG 0xB8001000, 0x82226080
+   REG 0x8000, 0xDEADBEEF
+   REG 0xB8001010, 0x000c
+
+   /* Copy from NAND to RAM */
+   b nand_copy

diff --git a/board/freescale/mx31pdk/u-boot.lds
b/board/freescale/mx31pdk/u-boot.lds
index 1460adc..8602f3e 100644
--- a/board/freescale/mx31pdk/u-boot.lds
+++ b/board/freescale/mx31pdk/u-boot.lds
@@ -35,6 +35,9 @@ SECTIONS
.text  :
{
  cpu/arm1136/start.o   (.text)
+ board/freescale/mx31pdk/lowlevel_init.o   (.text)
+ cpu/arm1136/mx31/nand_copy.o  (.text)
+ . = 2K; /* lowlevel NAND needs to fit in 2KB of NFC buffer */
  *(.text)
}

diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 6df1a00..d4362e3 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -38,6 +38,9 @@
 #define CONFIG_MX31_HCLK_FREQ  2600
 #define CONFIG_MX31_CLK32  32768

+/* We are booting from NAND. Used to shrink start.S */
+#define CONFIG_BOOT_FROM_NAND  1
+
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO

@@ -45,11 +48,6 @@
 #define CONFIG_SETUP_MEMORY_TAGS   1
 #define CONFIG_INITRD_TAG  1

-/* No support for NAND boot for i.MX31 PDK yet, so we rely on some other
- * program to