Re: [U-Boot] [PATCH 3/4] apf27: add spl support for the apf27
On 26/11/12 19:02, Albert ARIBAUD wrote: Hi Philippe, On Mon, 29 Oct 2012 18:35:56 +0100, Philippe Reynes wrote: Signed-off-by: Philippe Reynes Signed-off-by: Eric Jarrige create mode 100644 board/armadeus/apf27/start.S create mode 100644 board/armadeus/apf27/u-boot-spl.lds This is needed by 2/4 to get truly useable support. Please merge both patches. I've done it, and send a v3 this weed-end. Thanks a lot for the review. regards, Philippe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] apf27: add spl support for the apf27
Hi Philippe,
On Mon, 29 Oct 2012 18:35:56 +0100, Philippe Reynes
wrote:
> Signed-off-by: Philippe Reynes
> Signed-off-by: Eric Jarrige
>
> create mode 100644 board/armadeus/apf27/start.S
> create mode 100644 board/armadeus/apf27/u-boot-spl.lds
This is needed by 2/4 to get truly useable support. Please merge both
patches.
Re Fabio's question: the start.S is generic to mx27 -- IIUC, it could
also be applied to e.g. imx27lite or magnesium if these boards'
maintainers felt so inclined. Therefore it could indeed move into
arch/arm/cpu/arm926ejs/mx27.
> diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
> index 1da9548..f57f405 100644
> --- a/board/armadeus/apf27/Makefile
> +++ b/board/armadeus/apf27/Makefile
> @@ -27,11 +27,14 @@ include $(TOPDIR)/config.mk
>
> LIB = $(obj)lib$(BOARD).o
>
> +ifndef CONFIG_SPL_BUILD
> COBJS:= apf27.o
> +endif
>
> -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
> OBJS := $(addprefix $(obj),$(COBJS))
> SOBJS:= $(addprefix $(obj),$(SOBJS))
> +START:= $(addprefix $(obj),$(START))
>
> $(LIB): $(obj).depend $(OBJS) $(SOBJS)
> $(call cmd_link_o_target, $(OBJS) $(SOBJS))
> diff --git a/board/armadeus/apf27/start.S b/board/armadeus/apf27/start.S
> new file mode 100644
> index 000..374b4ea
> --- /dev/null
> +++ b/board/armadeus/apf27/start.S
> @@ -0,0 +1,549 @@
> +/*
> + * IMX27 NAND Flash SPL (Secondary Program Loader)
> + *
> + * Copyright (c) 2008 Armadeus Project / eja
> + *
> + * Based on Freescale NAND SPL
> + *
> + * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
> + * Copyright (c) 2008-2012 Eric Jarrige
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include "apf27.h"
> +
> +/*
> + * Standard NAND flash commands
> + */
> +#define NAND_CMD_READ0 0
> +#define NAND_CMD_READ1 1
> +#define NAND_CMD_PAGEPROG0x10
> +#define NAND_CMD_READOOB 0x50
> +#define NAND_CMD_ERASE1 0x60
> +#define NAND_CMD_STATUS 0x70
> +#define NAND_CMD_STATUS_MULTI0x71
> +#define NAND_CMD_SEQIN 0x80
> +#define NAND_CMD_READID 0x90
> +#define NAND_CMD_ERASE2 0xd0
> +#define NAND_CMD_RESET 0xff
> +
> +/* Extended commands for large page devices */
> +#define NAND_CMD_READSTART 0x30
> +#define NAND_CMD_CACHEDPROG 0x15
> +
> +/* Status bits */
> +#define NAND_STATUS_FAIL 0x01
> +#define NAND_STATUS_FAIL_N1 0x02
> +#define NAND_STATUS_TRUE_READY 0x20
> +#define NAND_STATUS_READY0x40
> +#define NAND_STATUS_WP 0x80
> +
> + .macro nand_boot
> +
> +#ifdef CONFIG_BOOT_TRACE_REG
> +/*
> + * If CONFIG_BOOT_TRACE_REG is a SDRAM address then be sure to use the
> following
> + * 2 command after SDRAM init
> + */
> +
> +/* Backup state of previous boot to CONFIG_BOOT_TRACE_REG+4*/
> +#define BACKUP_TRACE() \
> + ldr r4, =CONFIG_BOOT_TRACE_REG; \
> + ldr r3, [r4]; \
> + str r3, [r4, #0x04];
> +
> +/* Save a state of boot at CONFIG_BOOT_TRACE_REG */
> +#define BOOT_TRACE(val) \
> + ldr r4, =CONFIG_BOOT_TRACE_REG; \
> + ldr r3, =val; \
> + str r3, [r4];
> +#else
> +#define BACKUP_TRACE()
> +#define BOOT_TRACE(val)
> +#endif
> +
> +nand_boot_setup:
> +
> + /* Copy SPL image from flash to SDRAM first */
> + BOOT_TRACE(1)
> + ldr r0, =IMX_NFC_MAIN_AREA0
> + add r2, r0, #(IMX_NFC_SPARE_AREA0-IMX_NFC_MAIN_AREA0) //2KB NFC Buff
> + ldr r1, =CONFIG_SYS_NAND_U_BOOT_DST
> +
> + BOOT_TRACE(2)
> +1: ldmia r0!, {r3-r10}
> + stmia r1!, {r3-r10}
> + cmp r0, r2
> + blo 1b
> +
> +
> +
> + /* Jump to SDRAM */
> + BOOT_TRACE(3)
> + ldr r1, =0x7FF
> + and r0, pc, r1 /* offset of pc */
> + ldr r1, =CONFIG_SYS_NAND_U_BOOT_DST
> + add r1, r1, #0x10
> + add pc, r0, r1
> + nop
> + nop
> + nop
> + nop
> +
> +NAND_Copy_Main:
> + BOOT_TRACE(4)
> + /* r0: nfc base. Reloaded after
Re: [U-Boot] [PATCH 3/4] apf27: add spl support for the apf27
On Mon, Oct 29, 2012 at 3:35 PM, Philippe Reynes wrote: > --- /dev/null > +++ b/board/armadeus/apf27/start.S > @@ -0,0 +1,549 @@ > +/* > + * IMX27 NAND Flash SPL (Secondary Program Loader) > + * > + * Copyright (c) 2008 Armadeus Project / eja > + * > + * Based on Freescale NAND SPL Shouldn't this start.S file be placed on some common location rather than board/armadeus directory? Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/4] apf27: add spl support for the apf27
Signed-off-by: Philippe Reynes
Signed-off-by: Eric Jarrige
create mode 100644 board/armadeus/apf27/start.S
create mode 100644 board/armadeus/apf27/u-boot-spl.lds
diff --git a/board/armadeus/apf27/Makefile b/board/armadeus/apf27/Makefile
index 1da9548..f57f405 100644
--- a/board/armadeus/apf27/Makefile
+++ b/board/armadeus/apf27/Makefile
@@ -27,11 +27,14 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(BOARD).o
+ifndef CONFIG_SPL_BUILD
COBJS := apf27.o
+endif
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
+START := $(addprefix $(obj),$(START))
$(LIB):$(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
diff --git a/board/armadeus/apf27/start.S b/board/armadeus/apf27/start.S
new file mode 100644
index 000..374b4ea
--- /dev/null
+++ b/board/armadeus/apf27/start.S
@@ -0,0 +1,549 @@
+/*
+ * IMX27 NAND Flash SPL (Secondary Program Loader)
+ *
+ * Copyright (c) 2008 Armadeus Project / eja
+ *
+ * Based on Freescale NAND SPL
+ *
+ * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+ * Copyright (c) 2008-2012 Eric Jarrige
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include "apf27.h"
+
+/*
+ * Standard NAND flash commands
+ */
+#define NAND_CMD_READ0 0
+#define NAND_CMD_READ1 1
+#define NAND_CMD_PAGEPROG 0x10
+#define NAND_CMD_READOOB 0x50
+#define NAND_CMD_ERASE10x60
+#define NAND_CMD_STATUS0x70
+#define NAND_CMD_STATUS_MULTI 0x71
+#define NAND_CMD_SEQIN 0x80
+#define NAND_CMD_READID0x90
+#define NAND_CMD_ERASE20xd0
+#define NAND_CMD_RESET 0xff
+
+/* Extended commands for large page devices */
+#define NAND_CMD_READSTART 0x30
+#define NAND_CMD_CACHEDPROG0x15
+
+/* Status bits */
+#define NAND_STATUS_FAIL 0x01
+#define NAND_STATUS_FAIL_N10x02
+#define NAND_STATUS_TRUE_READY 0x20
+#define NAND_STATUS_READY 0x40
+#define NAND_STATUS_WP 0x80
+
+ .macro nand_boot
+
+#ifdef CONFIG_BOOT_TRACE_REG
+/*
+ * If CONFIG_BOOT_TRACE_REG is a SDRAM address then be sure to use the
following
+ * 2 command after SDRAM init
+ */
+
+/* Backup state of previous boot to CONFIG_BOOT_TRACE_REG+4*/
+#define BACKUP_TRACE() \
+ ldr r4, =CONFIG_BOOT_TRACE_REG; \
+ ldr r3, [r4]; \
+ str r3, [r4, #0x04];
+
+/* Save a state of boot at CONFIG_BOOT_TRACE_REG */
+#define BOOT_TRACE(val)\
+ ldr r4, =CONFIG_BOOT_TRACE_REG; \
+ ldr r3, =val; \
+ str r3, [r4];
+#else
+#define BACKUP_TRACE()
+#define BOOT_TRACE(val)
+#endif
+
+nand_boot_setup:
+
+ /* Copy SPL image from flash to SDRAM first */
+ BOOT_TRACE(1)
+ ldr r0, =IMX_NFC_MAIN_AREA0
+ add r2, r0, #(IMX_NFC_SPARE_AREA0-IMX_NFC_MAIN_AREA0) //2KB NFC Buff
+ ldr r1, =CONFIG_SYS_NAND_U_BOOT_DST
+
+ BOOT_TRACE(2)
+1: ldmia r0!, {r3-r10}
+ stmia r1!, {r3-r10}
+ cmp r0, r2
+ blo 1b
+
+
+
+ /* Jump to SDRAM */
+ BOOT_TRACE(3)
+ ldr r1, =0x7FF
+ and r0, pc, r1 /* offset of pc */
+ ldr r1, =CONFIG_SYS_NAND_U_BOOT_DST
+ add r1, r1, #0x10
+ add pc, r0, r1
+ nop
+ nop
+ nop
+ nop
+
+NAND_Copy_Main:
+ BOOT_TRACE(4)
+ /* r0: nfc base. Reloaded after each page copying */
+ ldr r0, =IMX_NFC_MAIN_AREA0
+
+ /* r1: starting flash addr to be copied. Updated constantly */
+ /* bypass the first preloaded pages */
+ ldr r1, =(IMX_NFC_SPARE_AREA0-IMX_NFC_MAIN_AREA0)
+
+ /* r2: end of 1st RAM buf. Doesn't change */
+ ldr r2, =IMX_NFC_MAIN_AREA1
+
+ /* r12: NFC register base. Doesn't change */
+ ldr r12, =IMX_NFC_REGS
+
+ ldr r11, =CONFIG_SYS_NAND_U_BOOT_DST
+
+ /* r13: end of SDRAM address for copying. Doesn't change*/
+ add r13, r11, #CONFIG_SYS_NAN
