Re: [U-Boot] [PATCH 39/40] x86: Fix device-tree indentation

[Bin Meng]

On Wed, Jan 30, 2019 at 12:01 PM Simon Glass  wrote:
>
> With the use of a phandle we can outdent the device tree nodes a little.
> Fix this.
>
> Signed-off-by: Simon Glass 
> ---
>
>  arch/x86/dts/u-boot.dtsi | 147 +++
>  1 file changed, 73 insertions(+), 74 deletions(-)
>

Reviewed-by: Bin Meng 
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[U-Boot] [PATCH 39/40] x86: Fix device-tree indentation

[Simon Glass]

With the use of a phandle we can outdent the device tree nodes a little.
Fix this.

Signed-off-by: Simon Glass 
---

 arch/x86/dts/u-boot.dtsi | 147 +++
 1 file changed, 73 insertions(+), 74 deletions(-)

diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi
index 5943619b86..8bb1318a2c 100644
--- a/arch/x86/dts/u-boot.dtsi
+++ b/arch/x86/dts/u-boot.dtsi
@@ -23,104 +23,103 @@
 
 #ifdef CONFIG_ROM_SIZE
  {
-   filename = "u-boot.rom";
-   end-at-4gb;
-   sort-by-offset;
-   pad-byte = <0xff>;
-   size = ;
+   filename = "u-boot.rom";
+   end-at-4gb;
+   sort-by-offset;
+   pad-byte = <0xff>;
+   size = ;
 #ifdef CONFIG_HAVE_INTEL_ME
-   intel-descriptor {
-   filename = CONFIG_FLASH_DESCRIPTOR_FILE;
-   };
-   intel-me {
-   filename = CONFIG_INTEL_ME_FILE;
-   };
+   intel-descriptor {
+   filename = CONFIG_FLASH_DESCRIPTOR_FILE;
+   };
+   intel-me {
+   filename = CONFIG_INTEL_ME_FILE;
+   };
 #endif
 #ifdef CONFIG_TPL
-   u-boot-spl {
-   offset = ;
-   };
-   u-boot-spl-dtb {
-   };
-   u-boot-tpl-with-ucode-ptr {
-   offset = ;
-   };
-   u-boot-tpl-dtb {
-   };
-   u-boot {
-   offset = ;
-   };
+   u-boot-spl {
+   offset = ;
+   };
+   u-boot-spl-dtb {
+   };
+   u-boot-tpl-with-ucode-ptr {
+   offset = ;
+   };
+   u-boot-tpl-dtb {
+   };
+   u-boot {
+   offset = ;
+   };
 #elif defined(CONFIG_SPL)
-   u-boot-spl-with-ucode-ptr {
-   offset = ;
-   };
-
-   u-boot-dtb-with-ucode2 {
-   type = "u-boot-dtb-with-ucode";
-   };
-   u-boot {
+   u-boot-spl-with-ucode-ptr {
+   offset = ;
+   };
+   u-boot-dtb-with-ucode2 {
+   type = "u-boot-dtb-with-ucode";
+   };
+   u-boot {
 #if CONFIG_SYS_TEXT_BASE == 0x111
-   offset = <0xfff0>;
+   offset = <0xfff0>;
 #else
-   offset = ;
+   offset = ;
 #endif
-   };
+   };
 #else
-   u-boot-with-ucode-ptr {
-   offset = ;
-   };
+   u-boot-with-ucode-ptr {
+   offset = ;
+   };
 #endif
-   u-boot-dtb-with-ucode {
-   };
-   u-boot-ucode {
-   align = <16>;
-   };
+   u-boot-dtb-with-ucode {
+   };
+   u-boot-ucode {
+   align = <16>;
+   };
 #ifdef CONFIG_HAVE_MRC
-   intel-mrc {
-   offset = ;
-   };
+   intel-mrc {
+   offset = ;
+   };
 #endif
 #ifdef CONFIG_HAVE_FSP
-   intel-fsp {
-   filename = CONFIG_FSP_FILE;
-   offset = ;
-   };
+   intel-fsp {
+   filename = CONFIG_FSP_FILE;
+   offset = ;
+   };
 #endif
 #ifdef CONFIG_HAVE_CMC
-   intel-cmc {
-   filename = CONFIG_CMC_FILE;
-   offset = ;
-   };
+   intel-cmc {
+   filename = CONFIG_CMC_FILE;
+   offset = ;
+   };
 #endif
 #ifdef CONFIG_HAVE_VGA_BIOS
-   intel-vga {
-   filename = CONFIG_VGA_BIOS_FILE;
-   offset = ;
-   };
+   intel-vga {
+   filename = CONFIG_VGA_BIOS_FILE;
+   offset = ;
+   };
 #endif
 #ifdef CONFIG_HAVE_VBT
-   intel-vbt {
-   filename = CONFIG_VBT_FILE;
-   offset = ;
-   };
+   intel-vbt {
+   filename = CONFIG_VBT_FILE;
+   offset = ;
+   };
 #endif
 #ifdef CONFIG_HAVE_REFCODE
-   intel-refcode {
-   offset = ;
-   };
+   intel-refcode {
+   offset = ;
+   };
 #endif
 #ifdef CONFIG_TPL
-   x86-start16-tpl {
-   offset = ;
-   };
+   x86-start16-tpl {
+   offset = ;
+   };
 #elif defined(CONFIG_SPL)
-   x86-start16-spl {
-   offset = ;
-   };
+   x86-start16-spl {
+   offset = ;
+   };
 #else
-   x86-start16 {
-   offset = ;
-   };
+   x86-start16 {
+   offset = ;
+   };
 #endif
 };
 #endif
-- 
2.20.1.495.gaa96b0ce6b-goog

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