Re: [U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg
On Friday, November 07, 2014 at 03:33:10 PM, Lukasz Majewski wrote:
> Hi Marek,
>
> > On Friday, November 07, 2014 at 10:11:35 AM, Lukasz Majewski wrote:
> > > Hi Marek,
> > >
> > > > On Tuesday, November 04, 2014 at 08:36:57 PM, Pavel Machek wrote:
> > > > > On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> > > > > > Allow passing in a custom configuration of the gusbcfg
> > > > > > register via platform data.
> > > > > >
> > > > > > Signed-off-by: Marek Vasut
> > > > > > Cc: Chin Liang See
> > > > > > Cc: Dinh Nguyen
> > > > > > Cc: Vince Bridgers
> > > > >
> > > > > Acked-by: Pavel Machek
> > > > >
> > > > > > debug("Reseting OTG controller\n");
> > > > > >
> > > > > > - writel(0<<15/* PHY Low Power Clock
> > > > > > sel*/
> > > > > > + dflt_gusbcfg =
> > > > > > + 0<<15 /* PHY Low Power Clock
> > > > > > sel*/
> > > > > >
> > > > > > |1<<14 /* Non-Periodic TxFIFO
> > > > > >
> > > > > > Rewind Enable*/ |0x5<<10/* Turnaround time*/
> > > > > >
> > > > > > |0<<9 | 0<<8/* [0:HNP disable,1:HNP
> > > > > >
> > > > > > enable][ 0:SRP disable*/
> > > > > >
> > > > > > @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> > > > > >
> > > > > > |0<<6 /* 0: high speed utmi+,
> > > > > >
> > > > > > 1: full speed serial*/ |0<<4/* 0: utmi+,
> > > > > > 1:ulpi*/
> > > > > >
> > > > > > |1<<3 /* phy i/f 0:8bit,
> > > > > >
> > > > > > 1:16bit*/
> > > > > >
> > > > > > - |0x7<<0,/* HS/FS Timeout**/
> > > > > > - ®->gusbcfg);
> > > > > > + |0x7<<0;/* HS/FS Timeout**/
> > > > > > +
> > > > >
> > > > > "Interesting" comment style. And I'd remove 0x prefixes from
> > > > > constants <8...
> > > >
> > > > Lukasz, what do you say to just convert those four boards to use
> > > > the gusbcfg platform data afterward ?
> > >
> > > +1
> > >
> > > It is a very good idea since we are using the same dwc2 IP block for
> > > host (./usb/host/dwc2.c) and device (s3c_hsotg).
> >
> > Yep ... I'm just wondering if we should do that rename in the next MW.
> > If you're fine with this MW though, then I will do just that.
> >
> > > > btw. you can find the latest version in u-boot-usb:topic/s3c-otg
> > >
> > > I've read comments from Pavel and tested the code up till first
> > > build error :-).
> >
> > I rewrote that branch, so feel free to use that as a base for your
> > testing. I will repost the corrected patches once I get feedback from
> > you.
> >
> > Best regards,
> > Marek Vasut
>
> Reviewed-by: Lukasz Majewski
>
> Tested-by: Lukasz Majewski
>
> Test HW: Trats2 (Exynos4412)
Queued for master, thanks!
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Re: [U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg
Hi Marek,
> On Friday, November 07, 2014 at 10:11:35 AM, Lukasz Majewski wrote:
> > Hi Marek,
> >
> > > On Tuesday, November 04, 2014 at 08:36:57 PM, Pavel Machek wrote:
> > > > On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> > > > > Allow passing in a custom configuration of the gusbcfg
> > > > > register via platform data.
> > > > >
> > > > > Signed-off-by: Marek Vasut
> > > > > Cc: Chin Liang See
> > > > > Cc: Dinh Nguyen
> > > > > Cc: Vince Bridgers
> > > >
> > > > Acked-by: Pavel Machek
> > > >
> > > > > debug("Reseting OTG controller\n");
> > > > >
> > > > > - writel(0<<15/* PHY Low Power Clock
> > > > > sel*/
> > > > > + dflt_gusbcfg =
> > > > > + 0<<15 /* PHY Low Power Clock
> > > > > sel*/
> > > > >
> > > > > |1<<14 /* Non-Periodic TxFIFO
> > > > >
> > > > > Rewind Enable*/ |0x5<<10 /* Turnaround time*/
> > > > >
> > > > > |0<<9 | 0<<8/* [0:HNP disable,1:HNP
> > > > >
> > > > > enable][ 0:SRP disable*/
> > > > >
> > > > > @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> > > > >
> > > > > |0<<6 /* 0: high speed utmi+,
> > > > > 1: full speed serial*/ |0<<4 /* 0: utmi+,
> > > > > 1:ulpi*/
> > > > >
> > > > > |1<<3 /* phy i/f 0:8bit,
> > > > >
> > > > > 1:16bit*/
> > > > >
> > > > > - |0x7<<0,/* HS/FS Timeout**/
> > > > > - ®->gusbcfg);
> > > > > + |0x7<<0;/* HS/FS Timeout**/
> > > > > +
> > > >
> > > > "Interesting" comment style. And I'd remove 0x prefixes from
> > > > constants <8...
> > >
> > > Lukasz, what do you say to just convert those four boards to use
> > > the gusbcfg platform data afterward ?
> >
> > +1
> >
> > It is a very good idea since we are using the same dwc2 IP block for
> > host (./usb/host/dwc2.c) and device (s3c_hsotg).
>
> Yep ... I'm just wondering if we should do that rename in the next MW.
> If you're fine with this MW though, then I will do just that.
>
> > > btw. you can find the latest version in u-boot-usb:topic/s3c-otg
> >
> > I've read comments from Pavel and tested the code up till first
> > build error :-).
>
> I rewrote that branch, so feel free to use that as a base for your
> testing. I will repost the corrected patches once I get feedback from
> you.
>
> Best regards,
> Marek Vasut
Reviewed-by: Lukasz Majewski
Tested-by: Lukasz Majewski
Test HW: Trats2 (Exynos4412)
--
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Lukasz Majewski
Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg
Hi Marek,
> On Friday, November 07, 2014 at 10:11:35 AM, Lukasz Majewski wrote:
> > Hi Marek,
> >
> > > On Tuesday, November 04, 2014 at 08:36:57 PM, Pavel Machek wrote:
> > > > On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> > > > > Allow passing in a custom configuration of the gusbcfg
> > > > > register via platform data.
> > > > >
> > > > > Signed-off-by: Marek Vasut
> > > > > Cc: Chin Liang See
> > > > > Cc: Dinh Nguyen
> > > > > Cc: Vince Bridgers
> > > >
> > > > Acked-by: Pavel Machek
> > > >
> > > > > debug("Reseting OTG controller\n");
> > > > >
> > > > > - writel(0<<15/* PHY Low Power Clock
> > > > > sel*/
> > > > > + dflt_gusbcfg =
> > > > > + 0<<15 /* PHY Low Power Clock
> > > > > sel*/
> > > > >
> > > > > |1<<14 /* Non-Periodic TxFIFO
> > > > >
> > > > > Rewind Enable*/ |0x5<<10 /* Turnaround time*/
> > > > >
> > > > > |0<<9 | 0<<8/* [0:HNP disable,1:HNP
> > > > >
> > > > > enable][ 0:SRP disable*/
> > > > >
> > > > > @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> > > > >
> > > > > |0<<6 /* 0: high speed utmi+,
> > > > > 1: full speed serial*/ |0<<4 /* 0: utmi+,
> > > > > 1:ulpi*/
> > > > >
> > > > > |1<<3 /* phy i/f 0:8bit,
> > > > >
> > > > > 1:16bit*/
> > > > >
> > > > > - |0x7<<0,/* HS/FS Timeout**/
> > > > > - ®->gusbcfg);
> > > > > + |0x7<<0;/* HS/FS Timeout**/
> > > > > +
> > > >
> > > > "Interesting" comment style. And I'd remove 0x prefixes from
> > > > constants <8...
> > >
> > > Lukasz, what do you say to just convert those four boards to use
> > > the gusbcfg platform data afterward ?
> >
> > +1
> >
> > It is a very good idea since we are using the same dwc2 IP block for
> > host (./usb/host/dwc2.c) and device (s3c_hsotg).
>
> Yep ... I'm just wondering if we should do that rename in the next MW.
> If you're fine with this MW though, then I will do just that.
I'd prefer to spent one MW only for s3c-hsotg rename. In other words we
do the "fixes" and "clean ups" now and only when the code gets stable
we perform the rename (at the MW).
Does it work for you?
>
> > > btw. you can find the latest version in u-boot-usb:topic/s3c-otg
> >
> > I've read comments from Pavel and tested the code up till first
> > build error :-).
>
> I rewrote that branch, so feel free to use that as a base for your
> testing. I will repost the corrected patches once I get feedback from
> you.
Ok.
>
> Best regards,
> Marek Vasut
--
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Lukasz Majewski
Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg
On Friday, November 07, 2014 at 10:11:35 AM, Lukasz Majewski wrote:
> Hi Marek,
>
> > On Tuesday, November 04, 2014 at 08:36:57 PM, Pavel Machek wrote:
> > > On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> > > > Allow passing in a custom configuration of the gusbcfg register
> > > > via platform data.
> > > >
> > > > Signed-off-by: Marek Vasut
> > > > Cc: Chin Liang See
> > > > Cc: Dinh Nguyen
> > > > Cc: Vince Bridgers
> > >
> > > Acked-by: Pavel Machek
> > >
> > > > debug("Reseting OTG controller\n");
> > > >
> > > > - writel(0<<15/* PHY Low Power Clock sel*/
> > > > + dflt_gusbcfg =
> > > > + 0<<15 /* PHY Low Power Clock sel*/
> > > >
> > > > |1<<14 /* Non-Periodic TxFIFO
> > > >
> > > > Rewind Enable*/ |0x5<<10/* Turnaround time*/
> > > >
> > > > |0<<9 | 0<<8/* [0:HNP disable,1:HNP
> > > >
> > > > enable][ 0:SRP disable*/
> > > >
> > > > @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> > > >
> > > > |0<<6 /* 0: high speed utmi+, 1:
> > > > full speed serial*/ |0<<4 /* 0: utmi+, 1:ulpi*/
> > > >
> > > > |1<<3 /* phy i/f 0:8bit,
> > > >
> > > > 1:16bit*/
> > > >
> > > > - |0x7<<0,/* HS/FS Timeout**/
> > > > - ®->gusbcfg);
> > > > + |0x7<<0;/* HS/FS Timeout**/
> > > > +
> > >
> > > "Interesting" comment style. And I'd remove 0x prefixes from
> > > constants <8...
> >
> > Lukasz, what do you say to just convert those four boards to use the
> > gusbcfg platform data afterward ?
>
> +1
>
> It is a very good idea since we are using the same dwc2 IP block for
> host (./usb/host/dwc2.c) and device (s3c_hsotg).
Yep ... I'm just wondering if we should do that rename in the next MW.
If you're fine with this MW though, then I will do just that.
> > btw. you can find the latest version in u-boot-usb:topic/s3c-otg
>
> I've read comments from Pavel and tested the code up till first build
> error :-).
I rewrote that branch, so feel free to use that as a base for your testing.
I will repost the corrected patches once I get feedback from you.
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg
Hi Marek,
> On Tuesday, November 04, 2014 at 08:36:57 PM, Pavel Machek wrote:
> > On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> > > Allow passing in a custom configuration of the gusbcfg register
> > > via platform data.
> > >
> > > Signed-off-by: Marek Vasut
> > > Cc: Chin Liang See
> > > Cc: Dinh Nguyen
> > > Cc: Vince Bridgers
> >
> > Acked-by: Pavel Machek
> >
> > > debug("Reseting OTG controller\n");
> > >
> > > - writel(0<<15/* PHY Low Power Clock sel*/
> > > + dflt_gusbcfg =
> > > + 0<<15 /* PHY Low Power Clock sel*/
> > >
> > > |1<<14 /* Non-Periodic TxFIFO
> > > Rewind Enable*/ |0x5<<10 /* Turnaround time*/
> > > |0<<9 | 0<<8/* [0:HNP disable,1:HNP
> > > enable][ 0:SRP disable*/
> > >
> > > @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> > >
> > > |0<<6 /* 0: high speed utmi+, 1:
> > > full speed serial*/ |0<<4 /* 0: utmi+, 1:ulpi*/
> > > |1<<3 /* phy i/f 0:8bit,
> > > 1:16bit*/
> > >
> > > - |0x7<<0,/* HS/FS Timeout**/
> > > - ®->gusbcfg);
> > > + |0x7<<0;/* HS/FS Timeout**/
> > > +
> >
> > "Interesting" comment style. And I'd remove 0x prefixes from
> > constants <8...
>
> Lukasz, what do you say to just convert those four boards to use the
> gusbcfg platform data afterward ?
+1
It is a very good idea since we are using the same dwc2 IP block for
host (./usb/host/dwc2.c) and device (s3c_hsotg).
>
> btw. you can find the latest version in u-boot-usb:topic/s3c-otg
I've read comments from Pavel and tested the code up till first build
error :-).
>
> Best regards,
> Marek Vasut
--
Best regards,
Lukasz Majewski
Samsung R&D Institute Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg
On Tuesday, November 04, 2014 at 08:36:57 PM, Pavel Machek wrote:
> On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> > Allow passing in a custom configuration of the gusbcfg register
> > via platform data.
> >
> > Signed-off-by: Marek Vasut
> > Cc: Chin Liang See
> > Cc: Dinh Nguyen
> > Cc: Vince Bridgers
>
> Acked-by: Pavel Machek
>
> > debug("Reseting OTG controller\n");
> >
> > - writel(0<<15/* PHY Low Power Clock sel*/
> > + dflt_gusbcfg =
> > + 0<<15 /* PHY Low Power Clock sel*/
> >
> > |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
> > |0x5<<10/* Turnaround time*/
> > |0<<9 | 0<<8/* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
> >
> > @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> >
> > |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
> > |0<<4 /* 0: utmi+, 1:ulpi*/
> > |1<<3 /* phy i/f 0:8bit, 1:16bit*/
> >
> > - |0x7<<0,/* HS/FS Timeout**/
> > - ®->gusbcfg);
> > + |0x7<<0;/* HS/FS Timeout**/
> > +
>
> "Interesting" comment style. And I'd remove 0x prefixes from constants
> <8...
Lukasz, what do you say to just convert those four boards to use the gusbcfg
platform data afterward ?
btw. you can find the latest version in u-boot-usb:topic/s3c-otg
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg
On Tue 2014-11-04 06:07:33, Marek Vasut wrote:
> Allow passing in a custom configuration of the gusbcfg register
> via platform data.
>
> Signed-off-by: Marek Vasut
> Cc: Chin Liang See
> Cc: Dinh Nguyen
> Cc: Vince Bridgers
Acked-by: Pavel Machek
> debug("Reseting OTG controller\n");
>
> - writel(0<<15/* PHY Low Power Clock sel*/
> + dflt_gusbcfg =
> + 0<<15 /* PHY Low Power Clock sel*/
> |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
> |0x5<<10/* Turnaround time*/
> |0<<9 | 0<<8/* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
> @@ -413,8 +415,12 @@ static void reconfig_usbd(void)
> |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
> |0<<4 /* 0: utmi+, 1:ulpi*/
> |1<<3 /* phy i/f 0:8bit, 1:16bit*/
> - |0x7<<0,/* HS/FS Timeout**/
> - ®->gusbcfg);
> + |0x7<<0;/* HS/FS Timeout**/
> +
"Interesting" comment style. And I'd remove 0x prefixes from constants
<8...
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[U-Boot] [PATCH 4/5] usb: s3c-otg: Allow custom gusbcfg
Allow passing in a custom configuration of the gusbcfg register
via platform data.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Vince Bridgers
Cc: Pavel Machek
Cc: Stefan Roese
Cc: Lukasz Majewski
---
drivers/usb/gadget/s3c_udc_otg.c | 18 --
drivers/usb/gadget/s3c_udc_otg_xfer_dma.c | 2 +-
include/usb/s3c_udc.h | 1 +
3 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c
index b910053..7653f03 100644
--- a/drivers/usb/gadget/s3c_udc_otg.c
+++ b/drivers/usb/gadget/s3c_udc_otg.c
@@ -104,7 +104,7 @@ static void stop_activity(struct s3c_udc *dev,
struct usb_gadget_driver *driver);
static int udc_enable(struct s3c_udc *dev);
static void udc_set_address(struct s3c_udc *dev, unsigned char address);
-static void reconfig_usbd(void);
+static void reconfig_usbd(struct s3c_udc *dev);
static void set_max_pktsize(struct s3c_udc *dev, enum usb_device_speed speed);
static void nuke(struct s3c_ep *ep, int status);
static int s3c_udc_set_halt(struct usb_ep *_ep, int value);
@@ -215,7 +215,7 @@ static int udc_enable(struct s3c_udc *dev)
debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
otg_phy_init(dev);
- reconfig_usbd();
+ reconfig_usbd(dev);
debug_cond(DEBUG_SETUP != 0,
"S3C USB 2.0 OTG Controller Core Initialized : 0x%x\n",
@@ -396,15 +396,17 @@ static void stop_activity(struct s3c_udc *dev,
udc_reinit(dev);
}
-static void reconfig_usbd(void)
+static void reconfig_usbd(struct s3c_udc *dev)
{
/* 2. Soft-reset OTG Core and then unreset again. */
int i;
unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl);
+ uint32_t dflt_gusbcfg;
debug("Reseting OTG controller\n");
- writel(0<<15/* PHY Low Power Clock sel*/
+ dflt_gusbcfg =
+ 0<<15 /* PHY Low Power Clock sel*/
|1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
|0x5<<10/* Turnaround time*/
|0<<9 | 0<<8/* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
@@ -413,8 +415,12 @@ static void reconfig_usbd(void)
|0<<6 /* 0: high speed utmi+, 1: full speed serial*/
|0<<4 /* 0: utmi+, 1:ulpi*/
|1<<3 /* phy i/f 0:8bit, 1:16bit*/
- |0x7<<0,/* HS/FS Timeout**/
- ®->gusbcfg);
+ |0x7<<0;/* HS/FS Timeout**/
+
+ if (dev->pdata->usb_gusbcfg)
+ dflt_gusbcfg = dev->pdata->usb_gusbcfg;
+
+ writel(dflt_gusbcfg, ®->gusbcfg);
/* 3. Put the OTG device core in the disconnected state.*/
uTemp = readl(®->dctl);
diff --git a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c
b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c
index 4f69b22..9c54b46 100644
--- a/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/s3c_udc_otg_xfer_dma.c
@@ -551,7 +551,7 @@ static int s3c_udc_irq(int irq, void *_dev)
debug_cond(DEBUG_ISR,
"\t\tOTG core got reset (%d)!!\n",
reset_available);
- reconfig_usbd();
+ reconfig_usbd(dev);
dev->ep0state = WAIT_FOR_SETUP;
reset_available = 0;
s3c_udc_pre_setup();
diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h
index 70e48f8..7f49a4e 100644
--- a/include/usb/s3c_udc.h
+++ b/include/usb/s3c_udc.h
@@ -108,5 +108,6 @@ struct s3c_plat_otg_data {
unsigned intregs_otg;
unsigned intusb_phy_ctrl;
unsigned intusb_flags;
+ unsigned intusb_gusbcfg;
};
#endif
--
2.0.0
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