Re: [U-Boot] [PATCH 4/6] net: gmac_rockchip: Define the gmac grf register struct at gmac_rockchip.c

2017-09-27 Thread Joe Hershberger
On Thu, Sep 21, 2017 at 9:17 AM, David Wu  wrote:
> If we include both the rk3288_grf.h and rv1108_grf.h, there is a
> number of compiling error for redefinition. So we define the reg
> structs of mac_grf at gmac_rockchip.c. Remove the rk**_grf.h files,
> give them own grf offset for their use.
>
> Signed-off-by: David Wu 
> ---
>
>  drivers/net/gmac_rockchip.c | 144 
> +++-
>  1 file changed, 116 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
> index 586ccbf..5f8f0cd 100644
> --- a/drivers/net/gmac_rockchip.c
> +++ b/drivers/net/gmac_rockchip.c
> @@ -15,9 +15,6 @@
>  #include 
>  #include 
>  #include 
> -#include 
> -#include 
> -#include 

You should also delete these header files as part of the patch.

>  #include 
>  #include 
>  #include "designware.h"
> @@ -31,15 +28,37 @@ DECLARE_GLOBAL_DATA_PTR;
>   */
>  struct gmac_rockchip_platdata {
> struct dw_eth_pdata dw_eth_pdata;
> +   void *grf;
> int tx_delay;
> int rx_delay;
>  };
>
>  struct rk_gmac_ops {
> -   int (*fix_mac_speed)(struct dw_eth_dev *priv);
> +   int (*fix_mac_speed)(struct gmac_rockchip_platdata *pdata,
> +struct dw_eth_dev *priv);
> void (*set_to_rgmii)(struct gmac_rockchip_platdata *pdata);
>  };
>
> +struct gmac_rockchip_driver_data {
> +   const struct rk_gmac_ops *ops;
> +   unsigned int grf_offset;
> +};
> +
> +struct rk3288_mac_grf {
> +   u32 soc_con1;
> +   u32 reserved;
> +   u32 soc_con3;
> +};
> +
> +struct rk3368_mac_grf {
> +   u32 soc_con15;
> +   u32 soc_con16;
> +};
> +
> +struct rk3399_mac_grf {
> +   u32 soc_con5;
> +   u32 soc_con6;
> +};
>
>  static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
>  {
> @@ -58,10 +77,18 @@ static int gmac_rockchip_ofdata_to_platdata(struct 
> udevice *dev)
> return designware_eth_ofdata_to_platdata(dev);
>  }
>
> -static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
> +static int rk3288_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
> +struct dw_eth_dev *priv)
>  {
> -   struct rk3288_grf *grf;
> +   struct rk3288_mac_grf *grf = (struct rk3288_mac_grf *)pdata->grf;
> int clk;
> +   enum {
> +   RK3288_GMAC_CLK_SEL_SHIFT = 12,
> +   RK3288_GMAC_CLK_SEL_MASK  = GENMASK(13, 12),
> +   RK3288_GMAC_CLK_SEL_125M  = 0 << 12,
> +   RK3288_GMAC_CLK_SEL_25M   = 3 << 12,
> +   RK3288_GMAC_CLK_SEL_2_5M  = 2 << 12,
> +   };
>
> switch (priv->phydev->speed) {
> case 10:
> @@ -78,15 +105,15 @@ static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev 
> *priv)
> return -EINVAL;
> }
>
> -   grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
> rk_clrsetreg(>soc_con1, RK3288_GMAC_CLK_SEL_MASK, clk);
>
> return 0;
>  }
>
> -static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev *priv)
> +static int rk3368_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
> +struct dw_eth_dev *priv)
>  {
> -   struct rk3368_grf *grf;
> +   struct rk3368_mac_grf *grf = (struct rk3368_mac_grf *)pdata->grf;
> int clk;
> enum {
> RK3368_GMAC_CLK_SEL_2_5M = 2 << 4,
> @@ -110,16 +137,22 @@ static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev 
> *priv)
> return -EINVAL;
> }
>
> -   grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
> rk_clrsetreg(>soc_con15, RK3368_GMAC_CLK_SEL_MASK, clk);
>
> return 0;
>  }
>
> -static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv)
> +static int rk3399_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
> +struct dw_eth_dev *priv)
>  {
> -   struct rk3399_grf_regs *grf;
> +   struct rk3399_mac_grf *grf = (struct rk3399_mac_grf *)pdata->grf;
> int clk;
> +   enum {
> +   RK3399_GMAC_CLK_SEL_MASK  = GENMASK(6, 4),
> +   RK3399_GMAC_CLK_SEL_125M  = 0 << 4,
> +   RK3399_GMAC_CLK_SEL_25M   = 3 << 4,
> +   RK3399_GMAC_CLK_SEL_2_5M  = 2 << 4,
> +   };
>
> switch (priv->phydev->speed) {
> case 10:
> @@ -136,7 +169,6 @@ static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev 
> *priv)
> return -EINVAL;
> }
>
> -   grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
> rk_clrsetreg(>soc_con5, RK3399_GMAC_CLK_SEL_MASK, clk);
>
> return 0;
> @@ -144,9 +176,31 @@ static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev 
> *priv)
>
>  static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
>  {
> -   struct rk3288_grf *grf;
> +   struct rk3288_mac_grf *grf = (struct rk3288_mac_grf *)pdata->grf;
> +   enum {
> 

[U-Boot] [PATCH 4/6] net: gmac_rockchip: Define the gmac grf register struct at gmac_rockchip.c

2017-09-21 Thread David Wu
If we include both the rk3288_grf.h and rv1108_grf.h, there is a
number of compiling error for redefinition. So we define the reg
structs of mac_grf at gmac_rockchip.c. Remove the rk**_grf.h files,
give them own grf offset for their use.

Signed-off-by: David Wu 
---

 drivers/net/gmac_rockchip.c | 144 +++-
 1 file changed, 116 insertions(+), 28 deletions(-)

diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index 586ccbf..5f8f0cd 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -15,9 +15,6 @@
 #include 
 #include 
 #include 
-#include 
-#include 
-#include 
 #include 
 #include 
 #include "designware.h"
@@ -31,15 +28,37 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 struct gmac_rockchip_platdata {
struct dw_eth_pdata dw_eth_pdata;
+   void *grf;
int tx_delay;
int rx_delay;
 };
 
 struct rk_gmac_ops {
-   int (*fix_mac_speed)(struct dw_eth_dev *priv);
+   int (*fix_mac_speed)(struct gmac_rockchip_platdata *pdata,
+struct dw_eth_dev *priv);
void (*set_to_rgmii)(struct gmac_rockchip_platdata *pdata);
 };
 
+struct gmac_rockchip_driver_data {
+   const struct rk_gmac_ops *ops;
+   unsigned int grf_offset;
+};
+
+struct rk3288_mac_grf {
+   u32 soc_con1;
+   u32 reserved;
+   u32 soc_con3;
+};
+
+struct rk3368_mac_grf {
+   u32 soc_con15;
+   u32 soc_con16;
+};
+
+struct rk3399_mac_grf {
+   u32 soc_con5;
+   u32 soc_con6;
+};
 
 static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)
 {
@@ -58,10 +77,18 @@ static int gmac_rockchip_ofdata_to_platdata(struct udevice 
*dev)
return designware_eth_ofdata_to_platdata(dev);
 }
 
-static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+static int rk3288_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
+struct dw_eth_dev *priv)
 {
-   struct rk3288_grf *grf;
+   struct rk3288_mac_grf *grf = (struct rk3288_mac_grf *)pdata->grf;
int clk;
+   enum {
+   RK3288_GMAC_CLK_SEL_SHIFT = 12,
+   RK3288_GMAC_CLK_SEL_MASK  = GENMASK(13, 12),
+   RK3288_GMAC_CLK_SEL_125M  = 0 << 12,
+   RK3288_GMAC_CLK_SEL_25M   = 3 << 12,
+   RK3288_GMAC_CLK_SEL_2_5M  = 2 << 12,
+   };
 
switch (priv->phydev->speed) {
case 10:
@@ -78,15 +105,15 @@ static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev 
*priv)
return -EINVAL;
}
 
-   grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
rk_clrsetreg(>soc_con1, RK3288_GMAC_CLK_SEL_MASK, clk);
 
return 0;
 }
 
-static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+static int rk3368_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
+struct dw_eth_dev *priv)
 {
-   struct rk3368_grf *grf;
+   struct rk3368_mac_grf *grf = (struct rk3368_mac_grf *)pdata->grf;
int clk;
enum {
RK3368_GMAC_CLK_SEL_2_5M = 2 << 4,
@@ -110,16 +137,22 @@ static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev 
*priv)
return -EINVAL;
}
 
-   grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
rk_clrsetreg(>soc_con15, RK3368_GMAC_CLK_SEL_MASK, clk);
 
return 0;
 }
 
-static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv)
+static int rk3399_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,
+struct dw_eth_dev *priv)
 {
-   struct rk3399_grf_regs *grf;
+   struct rk3399_mac_grf *grf = (struct rk3399_mac_grf *)pdata->grf;
int clk;
+   enum {
+   RK3399_GMAC_CLK_SEL_MASK  = GENMASK(6, 4),
+   RK3399_GMAC_CLK_SEL_125M  = 0 << 4,
+   RK3399_GMAC_CLK_SEL_25M   = 3 << 4,
+   RK3399_GMAC_CLK_SEL_2_5M  = 2 << 4,
+   };
 
switch (priv->phydev->speed) {
case 10:
@@ -136,7 +169,6 @@ static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev 
*priv)
return -EINVAL;
}
 
-   grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
rk_clrsetreg(>soc_con5, RK3399_GMAC_CLK_SEL_MASK, clk);
 
return 0;
@@ -144,9 +176,31 @@ static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev 
*priv)
 
 static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
 {
-   struct rk3288_grf *grf;
+   struct rk3288_mac_grf *grf = (struct rk3288_mac_grf *)pdata->grf;
+   enum {
+   RK3288_RMII_MODE_SHIFT = 14,
+   RK3288_RMII_MODE_MASK  = BIT(14),
+
+   RK3288_GMAC_PHY_INTF_SEL_SHIFT = 6,
+   RK3288_GMAC_PHY_INTF_SEL_MASK  = GENMASK(8, 6),
+   RK3288_GMAC_PHY_INTF_SEL_RGMII = BIT(6),
+   };
+   enum {
+   RK3288_RXCLK_DLY_ENA_GMAC_MASK = BIT(15),
+   RK3288_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
+