Re: [U-Boot] [PATCH 4/7] tegra30: fdt: add SPI SLINK nodes

[Allen Martin]

On Fri, Jan 11, 2013 at 04:17:18PM -0800, Stephen Warren wrote:
> On 01/11/2013 11:44 AM, Allen Martin wrote:
> > Add tegra30 SPI SLINK nodes to fdt.
> 
> > diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi
> 
> > /* PERIPH_ID_I2C_DVC, CLK_M */
> > clocks = <&tegra_car 47>;
> > };
> > +   spi@7000d400 {
> 
> Blank line needed before the new node.

ok

> 
> > +   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
> > +   reg = <0x7000d400 0x200>;
> 
> I can't tell if the sort order is correct here; not enough context in
> the diff.

It's not, I'll fix.

> 
> > +   interrupts = <0 59 0x04>;
> > +   nvidia,dma-request-selector = <&apbdma 15>;
> > +   spi-max-frequency = <2500>;
> 
> Same comment about that property being board-specific.

ok

> 
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   status = "disabled";
> > +   /* PERIPH_ID_SBC1, PLLP_OUT0 */
> > +   clocks = <&tegra_car 41>;
> > +   };
> 

-Allen
-- 
nvpublic
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Re: [U-Boot] [PATCH 4/7] tegra30: fdt: add SPI SLINK nodes

[Stephen Warren]

On 01/11/2013 11:44 AM, Allen Martin wrote:
> Add tegra30 SPI SLINK nodes to fdt.

> diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi

>   /* PERIPH_ID_I2C_DVC, CLK_M */
>   clocks = <&tegra_car 47>;
>   };
> + spi@7000d400 {

Blank line needed before the new node.

> + compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
> + reg = <0x7000d400 0x200>;

I can't tell if the sort order is correct here; not enough context in
the diff.

> + interrupts = <0 59 0x04>;
> + nvidia,dma-request-selector = <&apbdma 15>;
> + spi-max-frequency = <2500>;

Same comment about that property being board-specific.

> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + /* PERIPH_ID_SBC1, PLLP_OUT0 */
> + clocks = <&tegra_car 41>;
> + };

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[U-Boot] [PATCH 4/7] tegra30: fdt: add SPI SLINK nodes

[Allen Martin]

Add tegra30 SPI SLINK nodes to fdt.

Signed-off-by: Allen Martin 
---
 arch/arm/dts/tegra30.dtsi |   77 +
 include/fdtdec.h  |1 +
 lib/fdtdec.c  |1 +
 3 files changed, 79 insertions(+)

diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi
index d5f761e..e58e112 100644
--- a/arch/arm/dts/tegra30.dtsi
+++ b/arch/arm/dts/tegra30.dtsi
@@ -100,4 +100,81 @@
/* PERIPH_ID_I2C_DVC, CLK_M */
clocks = <&tegra_car 47>;
};
+   spi@7000d400 {
+   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+   reg = <0x7000d400 0x200>;
+   interrupts = <0 59 0x04>;
+   nvidia,dma-request-selector = <&apbdma 15>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SBC1, PLLP_OUT0 */
+   clocks = <&tegra_car 41>;
+   };
+
+   spi@7000d600 {
+   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+   reg = <0x7000d600 0x200>;
+   interrupts = <0 82 0x04>;
+   nvidia,dma-request-selector = <&apbdma 16>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SBC2, PLLP_OUT0 */
+   clocks = <&tegra_car 44>;
+   };
+
+   spi@7000d800 {
+   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+   reg = <0x7000d480 0x200>;
+   interrupts = <0 83 0x04>;
+   nvidia,dma-request-selector = <&apbdma 17>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SBC3, PLLP_OUT0 */
+   clocks = <&tegra_car 46>;
+   };
+
+   spi@7000da00 {
+   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+   reg = <0x7000da00 0x200>;
+   interrupts = <0 93 0x04>;
+   nvidia,dma-request-selector = <&apbdma 18>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SBC4, PLLP_OUT0 */
+   clocks = <&tegra_car 68>;
+   };
+
+   spi@7000dc00 {
+   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+   reg = <0x7000dc00 0x200>;
+   interrupts = <0 94 0x04>;
+   nvidia,dma-request-selector = <&apbdma 27>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SBC5, PLLP_OUT0 */
+   clocks = <&tegra_car 104>;
+   };
+
+   spi@7000de00 {
+   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+   reg = <0x7000de00 0x200>;
+   interrupts = <0 79 0x04>;
+   nvidia,dma-request-selector = <&apbdma 28>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SBC6, PLLP_OUT0 */
+   clocks = <&tegra_car 105>;
+   };
 };
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 1504336..14aa308 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -71,6 +71,7 @@ enum fdt_compat_id {
COMPAT_NVIDIA_TEGRA20_PWM,  /* Tegra 2 PWM controller */
COMPAT_NVIDIA_TEGRA20_DC,   /* Tegra 2 Display controller */
COMPAT_NVIDIA_TEGRA20_SFLASH,   /* Tegra 2 SPI flash controller */
+   COMPAT_NVIDIA_TEGRA20_SLINK,/* Tegra 2 SPI SLINK controller */
 
COMPAT_COUNT,
 };
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 6779278..4fef428 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -46,6 +46,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"),
COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
COMPAT(NVIDIA_TEGRA20_SFLASH, "nvidia,tegra20-sflash"),
+   COMPAT(NVIDIA_TEGRA20_SLINK, "nvidia,tegra20-slink"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)
-- 
1.7.10.4

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